Merge branch 'kvm-updates/2.6.35' of git://git.kernel.org/pub/scm/virt/kvm/kvm

[safe/jmp/linux-2.6] / arch / powerpc / include / asm / reg.h

diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index d17af2b..d62fdf4 100644 (file)
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -98,19 +98,15 @@
 #define MSR_RI         __MASK(MSR_RI_LG)       /* Recoverable Exception */
 #define MSR_LE         __MASK(MSR_LE_LG)       /* Little Endian */
 
-#ifdef CONFIG_PPC64
+#if defined(CONFIG_PPC_BOOK3S_64)
+/* Server variant */
 #define MSR_           MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_ISF |MSR_HV
 #define MSR_KERNEL      MSR_ | MSR_SF
-
 #define MSR_USER32     MSR_ | MSR_PR | MSR_EE
 #define MSR_USER64     MSR_USER32 | MSR_SF
-
-#else /* 32-bit */
+#elif defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_8xx)
 /* Default MSR for kernel mode. */
-#ifndef MSR_KERNEL     /* reg_booke.h also defines this */
 #define MSR_KERNEL     (MSR_ME|MSR_RI|MSR_IR|MSR_DR)
-#endif
-
 #define MSR_USER       (MSR_KERNEL|MSR_PR|MSR_EE)
 #endif
 
@@ -297,10 +293,12 @@
 #define HID1_ABE       (1<<10)         /* 7450 Address Broadcast Enable */
 #define HID1_PS                (1<<16)         /* 750FX PLL selection */
 #define SPRN_HID2      0x3F8           /* Hardware Implementation Register 2 */
+#define SPRN_HID2_GEKKO        0x398           /* Gekko HID2 Register */
 #define SPRN_IABR      0x3F2   /* Instruction Address Breakpoint Register */
 #define SPRN_IABR2     0x3FA           /* 83xx */
 #define SPRN_IBCR      0x135           /* 83xx Insn Breakpoint Control Reg */
 #define SPRN_HID4      0x3F4           /* 970 HID4 */
+#define SPRN_HID4_GEKKO        0x3F3           /* Gekko HID4 */
 #define SPRN_HID5      0x3F6           /* 970 HID5 */
 #define SPRN_HID6      0x3F9   /* BE HID 6 */
 #define   HID6_LB      (0x0F<<12) /* Concurrent Large Page Modes */
@@ -430,6 +428,10 @@
 #define   SRR1_WAKEMT          0x00280000 /* mtctrl */
 #define   SRR1_WAKEDEC         0x00180000 /* Decrementer interrupt */
 #define   SRR1_WAKETHERM       0x00100000 /* Thermal management interrupt */
+#define   SRR1_PROGFPE         0x00100000 /* Floating Point Enabled */
+#define   SRR1_PROGPRIV                0x00040000 /* Privileged instruction */
+#define   SRR1_PROGTRAP                0x00020000 /* Trap */
+#define   SRR1_PROGADDR                0x00010000 /* SRR0 contains subsequent addr */
 #define SPRN_HSRR0     0x13A   /* Save/Restore Register 0 */
 #define SPRN_HSRR1     0x13B   /* Save/Restore Register 1 */
 
@@ -465,6 +467,14 @@
 #define SPRN_VRSAVE    0x100   /* Vector Register Save Register */
 #define SPRN_XER       0x001   /* Fixed Point Exception Register */
 
+#define SPRN_MMCR0_GEKKO 0x3B8 /* Gekko Monitor Mode Control Register 0 */
+#define SPRN_MMCR1_GEKKO 0x3BC /* Gekko Monitor Mode Control Register 1 */
+#define SPRN_PMC1_GEKKO  0x3B9 /* Gekko Performance Monitor Control 1 */
+#define SPRN_PMC2_GEKKO  0x3BA /* Gekko Performance Monitor Control 2 */
+#define SPRN_PMC3_GEKKO  0x3BD /* Gekko Performance Monitor Control 3 */
+#define SPRN_PMC4_GEKKO  0x3BE /* Gekko Performance Monitor Control 4 */
+#define SPRN_WPAR_GEKKO  0x399 /* Gekko Write Pipe Address Register */
+
 #define SPRN_SCOMC     0x114   /* SCOM Access Control */
 #define SPRN_SCOMD     0x115   /* SCOM Access DATA */
 
@@ -493,6 +503,8 @@
 #define SPRN_MMCR1     798
 #define SPRN_MMCRA     0x312
 #define   MMCRA_SDSYNC 0x80000000UL /* SDAR synced with SIAR */
+#define   MMCRA_SDAR_DCACHE_MISS 0x40000000UL
+#define   MMCRA_SDAR_ERAT_MISS   0x20000000UL
 #define   MMCRA_SIHV   0x10000000UL /* state of MSR HV when SIAR set */
 #define   MMCRA_SIPR   0x08000000UL /* state of MSR PR when SIAR set */
 #define   MMCRA_SLOT   0x07000000UL /* SLOT bits (37-39) */
@@ -649,12 +661,22 @@
  * SPRG usage:
  *
  * All 64-bit:
- *     - SPRG3 stores PACA pointer
+ *     - SPRG1 stores PACA pointer
  *
  * 64-bit server:
  *     - SPRG0 unused (reserved for HV on Power4)
- *     - SPRG1 scratch for exception vectors
- *     - SPRG2 unused
+ *     - SPRG2 scratch for exception vectors
+ *     - SPRG3 unused (user visible)
+ *
+ * 64-bit embedded
+ *     - SPRG0 generic exception scratch
+ *     - SPRG2 TLB exception stack
+ *     - SPRG3 unused (user visible)
+ *     - SPRG4 unused (user visible)
+ *     - SPRG6 TLB miss scratch (user visible, sorry !)
+ *     - SPRG7 critical exception scratch
+ *     - SPRG8 machine check exception scratch
+ *     - SPRG9 debug exception scratch
  *
  * All 32-bit:
  *     - SPRG3 current thread_info pointer
@@ -700,13 +722,22 @@
  *
  */
 #ifdef CONFIG_PPC64
-#define SPRN_SPRG_PACA                 SPRN_SPRG3
+#define SPRN_SPRG_PACA                 SPRN_SPRG1
 #else
 #define SPRN_SPRG_THREAD       SPRN_SPRG3
 #endif
 
 #ifdef CONFIG_PPC_BOOK3S_64
-#define SPRN_SPRG_SCRATCH0     SPRN_SPRG1
+#define SPRN_SPRG_SCRATCH0     SPRN_SPRG2
+#endif
+
+#ifdef CONFIG_PPC_BOOK3E_64
+#define SPRN_SPRG_MC_SCRATCH   SPRN_SPRG8
+#define SPRN_SPRG_CRIT_SCRATCH SPRN_SPRG7
+#define SPRN_SPRG_DBG_SCRATCH  SPRN_SPRG9
+#define SPRN_SPRG_TLB_EXFRAME  SPRN_SPRG2
+#define SPRN_SPRG_TLB_SCRATCH  SPRN_SPRG6
+#define SPRN_SPRG_GEN_SCRATCH  SPRN_SPRG0
 #endif
 
 #ifdef CONFIG_PPC_BOOK3S_32
@@ -796,6 +827,7 @@
 #define PVR_403GC      0x00200200
 #define PVR_403GCX     0x00201400
 #define PVR_405GP      0x40110000
+#define PVR_476                0x11a52000
 #define PVR_STB03XXX   0x40310000
 #define PVR_NP405H     0x41410000
 #define PVR_NP405L     0x41610000
@@ -832,6 +864,9 @@
 #define PVR_8245       0x80811014
 #define PVR_8260       PVR_8240
 
+/* 476 Simulator seems to currently have the PVR of the 602... */
+#define PVR_476_ISS    0x00052000
+
 /* 64-bit processors */
 /* XXX the prefix should be PVR_, we'll do a global sweep to fix it one day */
 #define PV_NORTHSTAR   0x0033