include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...

[safe/jmp/linux-2.6] / arch / mips / sgi-ip27 / ip27-irq.c

diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c
index 270ecd3..6a123ea 100644 (file)
--- a/arch/mips/sgi-ip27/ip27-irq.c
+++ b/arch/mips/sgi-ip27/ip27-irq.c
@@ -17,9 +17,8 @@
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
 #include <linux/timex.h>
-#include <linux/slab.h>
+#include <linux/smp.h>
 #include <linux/random.h>
-#include <linux/smp_lock.h>
 #include <linux/kernel.h>
 #include <linux/kernel_stat.h>
 #include <linux/delay.h>
@@ -208,11 +207,9 @@ static int intr_connect_level(int cpu, int bit)
 {
        nasid_t nasid = COMPACT_TO_NASID_NODEID(cpu_to_node(cpu));
        struct slice_data *si = cpu_data[cpu].data;
-       unsigned long flags;
 
        set_bit(bit, si->irq_enable_mask);
 
-       local_irq_save(flags);
        if (!cputoslice(cpu)) {
                REMOTE_HUB_S(nasid, PI_INT_MASK0_A, si->irq_enable_mask[0]);
                REMOTE_HUB_S(nasid, PI_INT_MASK1_A, si->irq_enable_mask[1]);
@@ -220,7 +217,6 @@ static int intr_connect_level(int cpu, int bit)
                REMOTE_HUB_S(nasid, PI_INT_MASK0_B, si->irq_enable_mask[0]);
                REMOTE_HUB_S(nasid, PI_INT_MASK1_B, si->irq_enable_mask[1]);
        }
-       local_irq_restore(flags);
 
        return 0;
 }
@@ -286,6 +282,8 @@ static unsigned int startup_bridge_irq(unsigned int irq)
 
         bridge->b_wid_tflush;
 
+       intr_connect_level(cpu, swlevel);
+
         return 0;       /* Never anything pending.  */
 }
 
@@ -293,7 +291,6 @@ static unsigned int startup_bridge_irq(unsigned int irq)
 static void shutdown_bridge_irq(unsigned int irq)
 {
        struct bridge_controller *bc = IRQ_TO_BRIDGE(irq);
-       struct hub_data *hub = hub_data(cpu_to_node(bc->irq_cpu));
        bridge_t *bridge = bc->base;
        int pin, swlevel;
        cpuid_t cpu;
@@ -308,8 +305,6 @@ static void shutdown_bridge_irq(unsigned int irq)
        swlevel = find_level(&cpu, irq);
        intr_disconnect_level(cpu, swlevel);
 
-       __clear_bit(swlevel, hub->irq_alloc_mask);
-
        bridge->b_int_enable &= ~(1 << pin);
        bridge->b_wid_tflush;
 }
@@ -332,34 +327,19 @@ static inline void disable_bridge_irq(unsigned int irq)
        intr_disconnect_level(cpu, swlevel);
 }
 
-static void mask_and_ack_bridge_irq(unsigned int irq)
-{
-       disable_bridge_irq(irq);
-}
-
-static void end_bridge_irq(unsigned int irq)
-{
-       if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)) &&
-           irq_desc[irq].action)
-               enable_bridge_irq(irq);
-}
-
 static struct irq_chip bridge_irq_type = {
-       .typename       = "bridge",
+       .name           = "bridge",
        .startup        = startup_bridge_irq,
        .shutdown       = shutdown_bridge_irq,
-       .enable         = enable_bridge_irq,
-       .disable        = disable_bridge_irq,
-       .ack            = mask_and_ack_bridge_irq,
-       .end            = end_bridge_irq,
+       .ack            = disable_bridge_irq,
+       .mask           = disable_bridge_irq,
+       .mask_ack       = disable_bridge_irq,
+       .unmask         = enable_bridge_irq,
 };
 
 void __devinit register_bridge_irq(unsigned int irq)
 {
-       irq_desc[irq].status    = IRQ_DISABLED;
-       irq_desc[irq].action    = 0;
-       irq_desc[irq].depth     = 1;
-       irq_desc[irq].chip      = &bridge_irq_type;
+       set_irq_chip_and_handler(irq, &bridge_irq_type, handle_level_irq);
 }
 
 int __devinit request_bridge_irq(struct bridge_controller *bc)
@@ -394,14 +374,13 @@ int __devinit request_bridge_irq(struct bridge_controller *bc)
        return irq;
 }
 
-extern void ip27_rt_timer_interrupt(void);
-
 asmlinkage void plat_irq_dispatch(void)
 {
        unsigned long pending = read_c0_cause() & read_c0_status();
+       extern unsigned int rt_timer_irq;
 
        if (pending & CAUSEF_IP4)
-               ip27_rt_timer_interrupt();
+               do_IRQ(rt_timer_irq);
        else if (pending & CAUSEF_IP2)  /* PI_INT_PEND_0 or CC_PEND_{A|B} */
                ip27_do_irq_mask0();
        else if (pending & CAUSEF_IP3)  /* PI_INT_PEND_1 */