config MIPS
bool
default y
+ select HAVE_IDE
+ select HAVE_OPROFILE
# Horrible source of confusion. Die, die, die ...
select EMBEDDED
select RTC_LIB
config BASLER_EXCITE
bool "Basler eXcite smart camera"
+ select CEVT_R4K
+ select CSRC_R4K
select DMA_COHERENT
select HW_HAS_PCI
select IRQ_CPU
The eXcite is a smart camera platform manufactured by
Basler Vision Technologies AG.
-config BASLER_EXCITE_PROTOTYPE
- bool "Support for pre-release units"
- depends on BASLER_EXCITE
- default n
- help
- Pre-series (prototype) units are different from later ones in
- some ways. Select this option if you have one of these. Please
- note that a kernel built with this option selected will not be
- able to run on normal units.
-
config BCM47XX
bool "BCM47XX based boards"
+ select CEVT_R4K
+ select CSRC_R4K
select DMA_NONCOHERENT
select HW_HAS_PCI
select IRQ_CPU
select SYS_SUPPORTS_LITTLE_ENDIAN
select SSB
select SSB_DRIVER_MIPS
+ select SSB_DRIVER_EXTIF
+ select SSB_PCICORE_HOSTMODE if PCI
select GENERIC_GPIO
select SYS_HAS_EARLY_PRINTK
select CFE
config MIPS_COBALT
bool "Cobalt Server"
+ select CEVT_R4K
+ select CSRC_R4K
+ select CEVT_GT641XX
select DMA_NONCOHERENT
select HW_HAS_PCI
+ select I8253
select I8259
select IRQ_CPU
select IRQ_GT641XX
select SYS_HAS_CPU_NEVADA
select SYS_HAS_EARLY_PRINTK
select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
+ select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_LITTLE_ENDIAN
select GENERIC_HARDIRQS_NO__DO_IRQ
config MACH_DECSTATION
bool "DECstations"
select BOOT_ELF32
+ select CEVT_DS1287
+ select CEVT_R4K
+ select CSRC_IOASIC
+ select CSRC_R4K
+ select CPU_DADDI_WORKAROUNDS if 64BIT
+ select CPU_R4000_WORKAROUNDS if 64BIT
+ select CPU_R4400_WORKAROUNDS if 64BIT
select DMA_NONCOHERENT
select NO_IOPORT
select IRQ_CPU
select ARC
select ARC32
select ARCH_MAY_HAVE_PC_FDC
+ select CEVT_R4K
+ select CSRC_R4K
+ select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
select GENERIC_ISA_DMA
select IRQ_CPU
+ select I8253
select I8259
select ISA
- select PCSPEAKER
select SYS_HAS_CPU_R4X00
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
config LASAT
bool "LASAT Networks platforms"
+ select CEVT_R4K
+ select CSRC_R4K
select DMA_NONCOHERENT
select SYS_HAS_EARLY_PRINTK
select HW_HAS_PCI
+ select IRQ_CPU
select PCI_GT64XXX_PCI0
select MIPS_NILE4
select R5000_CPU_SCACHE
config LEMOTE_FULONG
bool "Lemote Fulong mini-PC"
select ARCH_SPARSEMEM_ENABLE
+ select CEVT_R4K
+ select CSRC_R4K
select SYS_HAS_CPU_LOONGSON2
select DMA_NONCOHERENT
select BOOT_ELF32
config MIPS_ATLAS
bool "MIPS Atlas board"
select BOOT_ELF32
+ select BOOT_RAW
+ select CEVT_R4K
+ select CSRC_R4K
select DMA_NONCOHERENT
select SYS_HAS_EARLY_PRINTK
select IRQ_CPU
bool "MIPS Malta board"
select ARCH_MAY_HAVE_PC_FDC
select BOOT_ELF32
+ select BOOT_RAW
+ select CEVT_R4K
+ select CSRC_R4K
select DMA_NONCOHERENT
select GENERIC_ISA_DMA
select IRQ_CPU
+ select IRQ_GIC
select HW_HAS_PCI
+ select I8253
select I8259
select MIPS_BOARDS_GEN
select MIPS_BONITO64
config MIPS_SEAD
bool "MIPS SEAD board"
+ select CEVT_R4K
+ select CSRC_R4K
select IRQ_CPU
select DMA_NONCOHERENT
select SYS_HAS_EARLY_PRINTK
config MIPS_SIM
bool 'MIPS simulator (MIPSsim)'
+ select CEVT_R4K
+ select CSRC_R4K
select DMA_NONCOHERENT
select SYS_HAS_EARLY_PRINTK
select IRQ_CPU
config MARKEINS
bool "NEC EMMA2RH Mark-eins"
+ select CEVT_R4K
+ select CSRC_R4K
select DMA_NONCOHERENT
select HW_HAS_PCI
select IRQ_CPU
config MACH_VR41XX
bool "NEC VR4100 series based machines"
+ select CEVT_R4K
+ select CSRC_R4K
select SYS_HAS_CPU_VR41XX
select GENERIC_HARDIRQS_NO__DO_IRQ
config PNX8550_JBS
- bool "Philips PNX8550 based JBS board"
+ bool "NXP PNX8550 based JBS board"
select PNX8550
select SYS_SUPPORTS_LITTLE_ENDIAN
config PNX8550_STB810
- bool "Philips PNX8550 based STB810 board"
+ bool "NXP PNX8550 based STB810 board"
select PNX8550
select SYS_SUPPORTS_LITTLE_ENDIAN
config PMC_YOSEMITE
bool "PMC-Sierra Yosemite eval board"
+ select CEVT_R4K
+ select CSRC_R4K
select DMA_COHERENT
select HW_HAS_PCI
select IRQ_CPU
Yosemite is an evaluation board for the RM9000x2 processor
manufactured by PMC-Sierra.
-config QEMU
- bool "Qemu"
- select DMA_COHERENT
- select GENERIC_ISA_DMA
- select HAVE_STD_PC_SERIAL_PORT
- select I8259
- select IRQ_CPU
- select ISA
- select PCSPEAKER
- select SWAP_IO_SPACE
- select SYS_HAS_CPU_MIPS32_R1
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_BIG_ENDIAN
- select SYS_SUPPORTS_LITTLE_ENDIAN
- select ARCH_SPARSEMEM_ENABLE
- select GENERIC_HARDIRQS_NO__DO_IRQ
- select NR_CPUS_DEFAULT_1
- select SYS_SUPPORTS_SMP
- help
- Qemu is a software emulator which among other architectures also
- can simulate a MIPS32 4Kc system. This patch adds support for the
- system architecture that currently is being simulated by Qemu. It
- will eventually be removed again when Qemu has the capability to
- simulate actual MIPS hardware platforms. More information on Qemu
- can be found at http://www.linux-mips.org/wiki/Qemu.
-
config SGI_IP22
bool "SGI IP22 (Indy/Indigo2)"
select ARC
select ARC32
select BOOT_ELF32
+ select CEVT_R4K
+ select CSRC_R4K
+ select DEFAULT_SGI_PARTITION
select DMA_NONCOHERENT
select HW_HAS_EISA
+ select I8253
+ select I8259
select IP22_CPU_SCACHE
select IRQ_CPU
select GENERIC_ISA_DMA_SUPPORT_BROKEN
+ select SGI_HAS_DS1286
+ select SGI_HAS_I8042
+ select SGI_HAS_INDYDOG
+ select SGI_HAS_SEEQ
+ select SGI_HAS_WD93
+ select SGI_HAS_ZILOG
select SWAP_IO_SPACE
select SYS_HAS_CPU_R4X00
select SYS_HAS_CPU_R5000
select ARC
select ARC64
select BOOT_ELF64
+ select DEFAULT_SGI_PARTITION
select DMA_IP27
select SYS_HAS_EARLY_PRINTK
select HW_HAS_PCI
workstations. To compile a Linux kernel that runs on these, say Y
here.
+config SGI_IP28
+ bool "SGI IP28 (Indigo2 R10k) (EXPERIMENTAL)"
+ depends on EXPERIMENTAL
+ select ARC
+ select ARC64
+ select BOOT_ELF64
+ select CEVT_R4K
+ select CSRC_R4K
+ select DEFAULT_SGI_PARTITION
+ select DMA_NONCOHERENT
+ select GENERIC_ISA_DMA_SUPPORT_BROKEN
+ select IRQ_CPU
+ select HW_HAS_EISA
+ select I8253
+ select I8259
+ select SGI_HAS_DS1286
+ select SGI_HAS_I8042
+ select SGI_HAS_INDYDOG
+ select SGI_HAS_SEEQ
+ select SGI_HAS_WD93
+ select SGI_HAS_ZILOG
+ select SWAP_IO_SPACE
+ select SYS_HAS_CPU_R10000
+ select SYS_HAS_EARLY_PRINTK
+ select SYS_SUPPORTS_64BIT_KERNEL
+ select SYS_SUPPORTS_BIG_ENDIAN
+ help
+ This is the SGI Indigo2 with R10000 processor. To compile a Linux
+ kernel that runs on these, say Y here.
+
config SGI_IP32
bool "SGI IP32 (O2)"
select ARC
select ARC32
select BOOT_ELF32
+ select CEVT_R4K
+ select CSRC_R4K
select DMA_NONCOHERENT
select HW_HAS_PCI
+ select IRQ_CPU
select R5000_CPU_SCACHE
select RM7000_CPU_SCACHE
select SYS_HAS_CPU_R5000
select SYS_SUPPORTS_HIGHMEM
select SYS_SUPPORTS_KGDB
select SYS_SUPPORTS_LITTLE_ENDIAN
+ select ZONE_DMA32 if 64BIT
config SIBYTE_LITTLESUR
bool "Sibyte BCM91250C2-LittleSur"
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_LITTLE_ENDIAN
-config SIBYTE_PTSWARM
- bool "Sibyte BCM91250PT-PTSWARM"
- depends on EXPERIMENTAL
- select BOOT_ELF32
- select DMA_COHERENT
- select NR_CPUS_DEFAULT_2
- select SIBYTE_SB1250
- select SWAP_IO_SPACE
- select SYS_HAS_CPU_SB1
- select SYS_SUPPORTS_BIG_ENDIAN
- select SYS_SUPPORTS_HIGHMEM
- select SYS_SUPPORTS_LITTLE_ENDIAN
-
config SIBYTE_BIGSUR
bool "Sibyte BCM91480B-BigSur"
select BOOT_ELF32
select SWAP_IO_SPACE
select SYS_HAS_CPU_SB1
select SYS_SUPPORTS_BIG_ENDIAN
+ select SYS_SUPPORTS_HIGHMEM
select SYS_SUPPORTS_LITTLE_ENDIAN
+ select ZONE_DMA32 if 64BIT
config SNI_RM
bool "SNI RM200/300/400"
select ARC if CPU_LITTLE_ENDIAN
select ARC32 if CPU_LITTLE_ENDIAN
+ select SNIPROM if CPU_BIG_ENDIAN
select ARCH_MAY_HAVE_PC_FDC
select BOOT_ELF32
+ select CEVT_R4K
+ select CSRC_R4K
+ select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
select DMA_NONCOHERENT
select GENERIC_ISA_DMA
select HW_HAS_EISA
select HW_HAS_PCI
select IRQ_CPU
+ select I8253
select I8259
select ISA
- select PCSPEAKER
select SWAP_IO_SPACE if CPU_BIG_ENDIAN
select SYS_HAS_CPU_R4X00
select SYS_HAS_CPU_R5000
config TOSHIBA_JMR3927
bool "Toshiba JMR-TX3927 board"
+ select CEVT_TXX9
select DMA_NONCOHERENT
select HW_HAS_PCI
select MIPS_TX3927
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_SUPPORTS_BIG_ENDIAN
select GENERIC_HARDIRQS_NO__DO_IRQ
+ select GPIO_TXX9
config TOSHIBA_RBTX4927
bool "Toshiba RBTX49[23]7 board"
+ select CEVT_R4K
+ select CSRC_R4K
+ select CEVT_TXX9
select DMA_NONCOHERENT
select HAS_TXX9_SERIAL
select HW_HAS_PCI
config TOSHIBA_RBTX4938
bool "Toshiba RBTX4938 board"
+ select CEVT_R4K
+ select CSRC_R4K
+ select CEVT_TXX9
select DMA_NONCOHERENT
select HAS_TXX9_SERIAL
select HW_HAS_PCI
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_KGDB
select GENERIC_HARDIRQS_NO__DO_IRQ
- select GENERIC_GPIO
+ select GPIO_TXX9
help
This Toshiba board is based on the TX4938 processor. Say Y here to
support this machine type
config WR_PPMC
bool "Wind River PPMC board"
+ select CEVT_R4K
+ select CSRC_R4K
select IRQ_CPU
select BOOT_ELF32
select DMA_NONCOHERENT
endchoice
source "arch/mips/au1000/Kconfig"
+source "arch/mips/basler/excite/Kconfig"
source "arch/mips/jazz/Kconfig"
source "arch/mips/lasat/Kconfig"
source "arch/mips/pmc-sierra/Kconfig"
endmenu
+config GENERIC_LOCKBREAK
+ bool
+ default y
+ depends on SMP && PREEMPT
+
config RWSEM_GENERIC_SPINLOCK
bool
default y
bool
default n
+config ARCH_SUPPORTS_OPROFILE
+ bool
+ default y if !MIPS_MT_SMTC
+
config GENERIC_FIND_NEXT_BIT
bool
default y
config BOOT_RAW
bool
+config CEVT_BCM1480
+ bool
+
+config CEVT_DS1287
+ bool
+
+config CEVT_GT641XX
+ bool
+
+config CEVT_R4K
+ bool
+
+config CEVT_SB1250
+ bool
+
+config CEVT_TXX9
+ bool
+
+config CSRC_BCM1480
+ bool
+
+config CSRC_IOASIC
+ bool
+
+config CSRC_R4K
+ bool
+
+config CSRC_SB1250
+ bool
+
+config GPIO_TXX9
+ select GENERIC_GPIO
+ select HAVE_GPIO_LIB
+ bool
+
config CFE
bool
config DMA_IP27
bool
-config DMA_IP32
- bool
- select DMA_NEED_PCI_MAP_STATE
-
config DMA_NONCOHERENT
bool
select DMA_NEED_PCI_MAP_STATE
config MIPS_DISABLE_OBSOLETE_IDE
bool
+config SYNC_R4K
+ bool
+
config NO_IOPORT
def_bool n
config IRQ_GT641XX
bool
+config IRQ_GIC
+ bool
+
config MIPS_BOARDS_GEN
bool
config SERIAL_RM9000
bool
+config SGI_HAS_DS1286
+ bool
+
+config SGI_HAS_INDYDOG
+ bool
+
+config SGI_HAS_SEEQ
+ bool
+
+config SGI_HAS_WD93
+ bool
+
+config SGI_HAS_ZILOG
+ bool
+
+config SGI_HAS_I8042
+ bool
+
+config DEFAULT_SGI_PARTITION
+ bool
+
config ARC32
bool
+config SNIPROM
+ bool
+
config BOOT_ELF32
bool
config MIPS_L1_CACHE_SHIFT
int
default "4" if MACH_DECSTATION
- default "7" if SGI_IP27 || SNI_RM
+ default "7" if SGI_IP22 || SGI_IP27 || SGI_IP28 || SNI_RM
default "4" if PMC_MSP4200_EVAL
default "5"
config ARC_CONSOLE
bool "ARC console support"
- depends on SGI_IP22 || (SNI_RM && CPU_LITTLE_ENDIAN)
+ depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
config ARC_MEMORY
bool
config ARC_PROMLIB
bool
- depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP32
+ depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
default y
config ARC64
menu "CPU selection"
-source "kernel/time/Kconfig"
-
choice
prompt "CPU type"
default CPU_R4X00
depends on SYS_SUPPORTS_MULTITHREADING
select CPU_MIPSR2_IRQ_VI
select CPU_MIPSR2_IRQ_EI
- select CPU_MIPSR2_SRS
select MIPS_MT
select NR_CPUS_DEFAULT_2
select SMP
+ select SYS_SUPPORTS_SCHED_SMT if SMP
select SYS_SUPPORTS_SMP
+ select SMP_UP
help
This is a kernel model which is also known a VSMP or lately
has been marketesed into SMVP.
depends on CPU_MIPS32_R2
#depends on CPU_MIPS64_R2 # once there is hardware ...
depends on SYS_SUPPORTS_MULTITHREADING
+ select GENERIC_CLOCKEVENTS_BROADCAST
select CPU_MIPSR2_IRQ_VI
select CPU_MIPSR2_IRQ_EI
- select CPU_MIPSR2_SRS
select MIPS_MT
select NR_CPUS_DEFAULT_8
select SMP
select SYS_SUPPORTS_SMP
+ select SMP_UP
help
This is a kernel model which is known a SMTC or lately has been
marketesed into SMVP.
config MIPS_MT
bool
+config SCHED_SMT
+ bool "SMT (multithreading) scheduler support"
+ depends on SYS_SUPPORTS_SCHED_SMT
+ default n
+ help
+ SMT scheduler support improves the CPU scheduler's decision making
+ when dealing with MIPS MT enabled cores at a cost of slightly
+ increased overhead in some places. If unsure say N here.
+
+config SYS_SUPPORTS_SCHED_SMT
+ bool
+
+
config SYS_SUPPORTS_MULTITHREADING
bool
depends on SYS_SUPPORTS_MULTITHREADING
select CPU_MIPSR2_IRQ_VI
select CPU_MIPSR2_IRQ_EI
- select CPU_MIPSR2_SRS
select MIPS_MT
help
Includes a loader for loading an elf relocatable object
config CPU_HAS_WB
bool
-config 64BIT_CONTEXT
- bool "Save 64bit integer registers"
- depends on 32BIT && CPU_LOONGSON2
- help
- Loongson2 CPU is 64bit , when used in 32BIT mode, its integer
- registers can still be accessed as 64bit, mainly for multimedia
- instructions. We must have all 64bit save/restored to make sure
- those instructions to get correct result.
-
#
# Vectored interrupt mode is an R2 feature
#
config CPU_MIPSR2_IRQ_EI
bool
+config CPU_HAS_SYNC
+ bool
+ depends on !CPU_R3000
+ default y
+
+config GENERIC_CLOCKEVENTS_BROADCAST
+ bool
+
#
-# Shadow registers are an R2 feature
+# CPU non-features
#
-config CPU_MIPSR2_SRS
+config CPU_DADDI_WORKAROUNDS
bool
-config CPU_HAS_SYNC
+config CPU_R4000_WORKAROUNDS
+ bool
+ select CPU_R4400_WORKAROUNDS
+
+config CPU_R4400_WORKAROUNDS
bool
- depends on !CPU_R3000
- default y
#
# Use the generic interrupt handling code in kernel/irq/:
or have huge holes in the physical address space for other reasons.
See <file:Documentation/vm/numa> for more.
+config ARCH_POPULATES_NODE_MAP
+ def_bool y
+
config ARCH_SPARSEMEM_ENABLE
bool
select SPARSEMEM_STATIC
bool "Multi-Processing support"
depends on SYS_SUPPORTS_SMP
select IRQ_PER_CPU
+ select USE_GENERIC_SMP_HELPERS
help
This enables support for systems with more than one CPU. If you have
a system with only one CPU, like most personal computers, say N. If
People using multiprocessor machines who say Y here should also say
Y to "Enhanced Real Time Clock Support", below.
- See also the <file:Documentation/smp.txt> and the SMP-HOWTO
- available at <http://www.tldp.org/docs.html#howto>.
+ See also the SMP-HOWTO available at
+ <http://www.tldp.org/docs.html#howto>.
If you don't know what to do here, say N.
+config SMP_UP
+ bool
+
config SYS_SUPPORTS_SMP
bool
performance should round up your number of processors to the next
power of two.
+config MIPS_CMP
+ bool "MIPS CMP framework support"
+ depends on SMP
+ select SYNC_R4K
+ select SYS_SUPPORTS_SCHED_SMT
+ select WEAK_ORDERING
+ default n
+ help
+ This is a placeholder option for the GCMP work. It will need to
+ be handled differently...
+
+source "kernel/time/Kconfig"
+
#
# Timer Interrupt Frequency Configuration
#
Allows the configuration of the timer frequency.
config HZ_48
- bool "48 HZ" if SYS_SUPPORTS_48HZ
+ bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
config HZ_100
bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
but it is independent of the system firmware. And like a reboot
you can start any kernel with it, not just Linux.
- The name comes from the similiarity to the exec system call.
+ The name comes from the similarity to the exec system call.
It is an ongoing process to be certain the hardware in a machine
is properly shutdown, so do not be surprised if this code does not
your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
say Y, otherwise N.
- The PCI-HOWTO, available from
- <http://www.tldp.org/docs.html#howto>, contains valuable
- information about which PCI hardware does work under Linux and which
- doesn't.
-
config PCI_DOMAINS
bool
bool
default y
-config PCSPEAKER
+config I8253
+ bool
+
+config ZONE_DMA32
bool
source "drivers/pcmcia/Kconfig"
menu "Power management options"
+config ARCH_SUSPEND_POSSIBLE
+ def_bool y
+ depends on !SMP
+
source "kernel/power/Kconfig"
endmenu
source "fs/Kconfig"
-source "arch/mips/oprofile/Kconfig"
-
source "arch/mips/Kconfig.debug"
source "security/Kconfig"
git://ftp.safe.ca / safe / jmp / linux-2.6 / blobdiff