/*
- * File: arch/blackfin/mm/sram-alloc.c
- * Based on:
- * Author:
+ * SRAM allocator for Blackfin on-chip memory
*
- * Created:
- * Description: SRAM allocator for Blackfin L1 and L2 memory
+ * Copyright 2004-2009 Analog Devices Inc.
*
- * Modified:
- * Copyright 2004-2008 Analog Devices Inc.
- *
- * Bugs: Enter bugs at http://blackfin.uclinux.org/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, see the file COPYING, or write
- * to the Free Software Foundation, Inc.,
- * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ * Licensed under the GPL-2 or later.
*/
#include <linux/module.h>
#include <linux/proc_fs.h>
#include <linux/spinlock.h>
#include <linux/rtc.h>
+#include <linux/slab.h>
#include <asm/blackfin.h>
+#include <asm/mem_map.h>
#include "blackfin_sram.h"
-static DEFINE_PER_CPU(spinlock_t, l1sram_lock) ____cacheline_aligned_in_smp;
-static DEFINE_PER_CPU(spinlock_t, l1_data_sram_lock) ____cacheline_aligned_in_smp;
-static DEFINE_PER_CPU(spinlock_t, l1_inst_sram_lock) ____cacheline_aligned_in_smp;
-static spinlock_t l2_sram_lock ____cacheline_aligned_in_smp;
-
/* the data structure for L1 scratchpad and DATA SRAM */
struct sram_piece {
void *paddr;
struct sram_piece *next;
};
+static DEFINE_PER_CPU_SHARED_ALIGNED(spinlock_t, l1sram_lock);
static DEFINE_PER_CPU(struct sram_piece, free_l1_ssram_head);
static DEFINE_PER_CPU(struct sram_piece, used_l1_ssram_head);
static DEFINE_PER_CPU(struct sram_piece, used_l1_data_B_sram_head);
#endif
+#if L1_DATA_A_LENGTH || L1_DATA_B_LENGTH
+static DEFINE_PER_CPU_SHARED_ALIGNED(spinlock_t, l1_data_sram_lock);
+#endif
+
#if L1_CODE_LENGTH != 0
+static DEFINE_PER_CPU_SHARED_ALIGNED(spinlock_t, l1_inst_sram_lock);
static DEFINE_PER_CPU(struct sram_piece, free_l1_inst_sram_head);
static DEFINE_PER_CPU(struct sram_piece, used_l1_inst_sram_head);
#endif
#if L2_LENGTH != 0
+static spinlock_t l2_sram_lock ____cacheline_aligned_in_smp;
static struct sram_piece free_l2_sram_head, used_l2_sram_head;
#endif
static void __init l1sram_init(void)
{
unsigned int cpu;
+ unsigned long reserve;
+
+#ifdef CONFIG_SMP
+ reserve = 0;
+#else
+ reserve = sizeof(struct l1_scratch_task_info);
+#endif
+
for (cpu = 0; cpu < num_possible_cpus(); ++cpu) {
per_cpu(free_l1_ssram_head, cpu).next =
kmem_cache_alloc(sram_piece_cache, GFP_KERNEL);
return;
}
- per_cpu(free_l1_ssram_head, cpu).next->paddr = (void *)get_l1_scratch_start_cpu(cpu);
- per_cpu(free_l1_ssram_head, cpu).next->size = L1_SCRATCH_LENGTH;
+ per_cpu(free_l1_ssram_head, cpu).next->paddr = (void *)get_l1_scratch_start_cpu(cpu) + reserve;
+ per_cpu(free_l1_ssram_head, cpu).next->size = L1_SCRATCH_LENGTH - reserve;
per_cpu(free_l1_ssram_head, cpu).next->pid = 0;
per_cpu(free_l1_ssram_head, cpu).next->next = NULL;
static void __init l1_data_sram_init(void)
{
+#if L1_DATA_A_LENGTH != 0 || L1_DATA_B_LENGTH != 0
unsigned int cpu;
+#endif
#if L1_DATA_A_LENGTH != 0
for (cpu = 0; cpu < num_possible_cpus(); ++cpu) {
per_cpu(free_l1_data_A_sram_head, cpu).next =
printk(KERN_INFO "Blackfin L2 SRAM: %d KB (%d KB free)\n",
L2_LENGTH >> 10,
free_l2_sram_head.next->size >> 10);
-#endif
/* mutex initialize */
spin_lock_init(&l2_sram_lock);
+#endif
}
-void __init bfin_sram_init(void)
+static int __init bfin_sram_init(void)
{
sram_piece_cache = kmem_cache_create("sram_piece_cache",
sizeof(struct sram_piece),
l1_data_sram_init();
l1_inst_sram_init();
l2_sram_init();
+
+ return 0;
}
+pure_initcall(bfin_sram_init);
/* SRAM allocate function */
static void *_sram_alloc(size_t size, struct sram_piece *pfree_head,
void *l1_data_A_sram_alloc(size_t size)
{
+#if L1_DATA_A_LENGTH != 0
unsigned long flags;
- void *addr = NULL;
+ void *addr;
unsigned int cpu;
- cpu = get_cpu();
+ cpu = smp_processor_id();
/* add mutex operation */
spin_lock_irqsave(&per_cpu(l1_data_sram_lock, cpu), flags);
-#if L1_DATA_A_LENGTH != 0
addr = _sram_alloc(size, &per_cpu(free_l1_data_A_sram_head, cpu),
&per_cpu(used_l1_data_A_sram_head, cpu));
-#endif
/* add mutex operation */
spin_unlock_irqrestore(&per_cpu(l1_data_sram_lock, cpu), flags);
- put_cpu();
pr_debug("Allocated address in l1_data_A_sram_alloc is 0x%lx+0x%lx\n",
(long unsigned int)addr, size);
return addr;
+#else
+ return NULL;
+#endif
}
EXPORT_SYMBOL(l1_data_A_sram_alloc);
int l1_data_A_sram_free(const void *addr)
{
+#if L1_DATA_A_LENGTH != 0
unsigned long flags;
int ret;
unsigned int cpu;
- cpu = get_cpu();
+ cpu = smp_processor_id();
/* add mutex operation */
spin_lock_irqsave(&per_cpu(l1_data_sram_lock, cpu), flags);
-#if L1_DATA_A_LENGTH != 0
ret = _sram_free(addr, &per_cpu(free_l1_data_A_sram_head, cpu),
&per_cpu(used_l1_data_A_sram_head, cpu));
-#else
- ret = -1;
-#endif
/* add mutex operation */
spin_unlock_irqrestore(&per_cpu(l1_data_sram_lock, cpu), flags);
- put_cpu();
return ret;
+#else
+ return -1;
+#endif
}
EXPORT_SYMBOL(l1_data_A_sram_free);
void *addr;
unsigned int cpu;
- cpu = get_cpu();
+ cpu = smp_processor_id();
/* add mutex operation */
spin_lock_irqsave(&per_cpu(l1_data_sram_lock, cpu), flags);
/* add mutex operation */
spin_unlock_irqrestore(&per_cpu(l1_data_sram_lock, cpu), flags);
- put_cpu();
pr_debug("Allocated address in l1_data_B_sram_alloc is 0x%lx+0x%lx\n",
(long unsigned int)addr, size);
int ret;
unsigned int cpu;
- cpu = get_cpu();
+ cpu = smp_processor_id();
/* add mutex operation */
spin_lock_irqsave(&per_cpu(l1_data_sram_lock, cpu), flags);
/* add mutex operation */
spin_unlock_irqrestore(&per_cpu(l1_data_sram_lock, cpu), flags);
- put_cpu();
return ret;
#else
void *addr;
unsigned int cpu;
- cpu = get_cpu();
+ cpu = smp_processor_id();
/* add mutex operation */
spin_lock_irqsave(&per_cpu(l1_inst_sram_lock, cpu), flags);
/* add mutex operation */
spin_unlock_irqrestore(&per_cpu(l1_inst_sram_lock, cpu), flags);
- put_cpu();
pr_debug("Allocated address in l1_inst_sram_alloc is 0x%lx+0x%lx\n",
(long unsigned int)addr, size);
int ret;
unsigned int cpu;
- cpu = get_cpu();
+ cpu = smp_processor_id();
/* add mutex operation */
spin_lock_irqsave(&per_cpu(l1_inst_sram_lock, cpu), flags);
/* add mutex operation */
spin_unlock_irqrestore(&per_cpu(l1_inst_sram_lock, cpu), flags);
- put_cpu();
return ret;
#else
void *addr;
unsigned int cpu;
- cpu = get_cpu();
+ cpu = smp_processor_id();
/* add mutex operation */
spin_lock_irqsave(&per_cpu(l1sram_lock, cpu), flags);
/* add mutex operation */
spin_unlock_irqrestore(&per_cpu(l1sram_lock, cpu), flags);
- put_cpu();
return addr;
}
void *addr;
unsigned int cpu;
- cpu = get_cpu();
+ cpu = smp_processor_id();
/* add mutex operation */
spin_lock_irqsave(&per_cpu(l1sram_lock, cpu), flags);
/* add mutex operation */
spin_unlock_irqrestore(&per_cpu(l1sram_lock, cpu), flags);
- put_cpu();
return addr;
}
int ret;
unsigned int cpu;
- cpu = get_cpu();
+ cpu = smp_processor_id();
/* add mutex operation */
spin_lock_irqsave(&per_cpu(l1sram_lock, cpu), flags);
/* add mutex operation */
spin_unlock_irqrestore(&per_cpu(l1sram_lock, cpu), flags);
- put_cpu();
return ret;
}
}
EXPORT_SYMBOL(sram_free_with_lsl);
+/* Allocate memory and keep in L1 SRAM List (lsl) so that the resources are
+ * tracked. These are designed for userspace so that when a process exits,
+ * we can safely reap their resources.
+ */
void *sram_alloc_with_lsl(size_t size, unsigned long flags)
{
void *addr = NULL;
printk(KERN_WARNING "unable to create /proc/sram\n");
return -1;
}
- ptr->owner = THIS_MODULE;
ptr->read_proc = sram_proc_read;
return 0;
}
git://ftp.safe.ca / safe / jmp / linux-2.6 / blobdiff