#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
-#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
#include <linux/usb/musb.h>
-#endif
#include <asm/bfin5xx_spi.h>
-#include <asm/cplb.h>
#include <asm/dma.h>
#include <asm/gpio.h>
#include <asm/nand.h>
#include <asm/portmux.h>
+#include <asm/bfin_sdh.h>
#include <mach/bf54x_keys.h>
#include <asm/dpmc.h>
#include <linux/input.h>
{
.start = 0xFFC03100,
.end = 0xFFC031FF,
+ .flags = IORESOURCE_MEM,
},
#endif
};
#endif
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
-static struct resource bfin_sir_resources[] = {
#ifdef CONFIG_BFIN_SIR0
+static struct resource bfin_sir0_resources[] = {
{
.start = 0xFFC00400,
.end = 0xFFC004FF,
.flags = IORESOURCE_MEM,
},
+ {
+ .start = IRQ_UART0_RX,
+ .end = IRQ_UART0_RX+1,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = CH_UART0_RX,
+ .end = CH_UART0_RX+1,
+ .flags = IORESOURCE_DMA,
+ },
+};
+static struct platform_device bfin_sir0_device = {
+ .name = "bfin_sir",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(bfin_sir0_resources),
+ .resource = bfin_sir0_resources,
+};
#endif
#ifdef CONFIG_BFIN_SIR1
+static struct resource bfin_sir1_resources[] = {
{
.start = 0xFFC02000,
.end = 0xFFC020FF,
.flags = IORESOURCE_MEM,
},
+ {
+ .start = IRQ_UART1_RX,
+ .end = IRQ_UART1_RX+1,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = CH_UART1_RX,
+ .end = CH_UART1_RX+1,
+ .flags = IORESOURCE_DMA,
+ },
+};
+static struct platform_device bfin_sir1_device = {
+ .name = "bfin_sir",
+ .id = 1,
+ .num_resources = ARRAY_SIZE(bfin_sir1_resources),
+ .resource = bfin_sir1_resources,
+};
#endif
#ifdef CONFIG_BFIN_SIR2
+static struct resource bfin_sir2_resources[] = {
{
.start = 0xFFC02100,
.end = 0xFFC021FF,
.flags = IORESOURCE_MEM,
},
+ {
+ .start = IRQ_UART2_RX,
+ .end = IRQ_UART2_RX+1,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = CH_UART2_RX,
+ .end = CH_UART2_RX+1,
+ .flags = IORESOURCE_DMA,
+ },
+};
+static struct platform_device bfin_sir2_device = {
+ .name = "bfin_sir",
+ .id = 2,
+ .num_resources = ARRAY_SIZE(bfin_sir2_resources),
+ .resource = bfin_sir2_resources,
+};
#endif
#ifdef CONFIG_BFIN_SIR3
+static struct resource bfin_sir3_resources[] = {
{
.start = 0xFFC03100,
.end = 0xFFC031FF,
.flags = IORESOURCE_MEM,
},
-#endif
+ {
+ .start = IRQ_UART3_RX,
+ .end = IRQ_UART3_RX+1,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = CH_UART3_RX,
+ .end = CH_UART3_RX+1,
+ .flags = IORESOURCE_DMA,
+ },
};
-
-static struct platform_device bfin_sir_device = {
+static struct platform_device bfin_sir3_device = {
.name = "bfin_sir",
- .id = 0,
- .num_resources = ARRAY_SIZE(bfin_sir_resources),
- .resource = bfin_sir_resources,
+ .id = 3,
+ .num_resources = ARRAY_SIZE(bfin_sir3_resources),
+ .resource = bfin_sir3_resources,
};
#endif
+#endif
#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
static struct resource smsc911x_resources[] = {
},
};
+static struct musb_hdrc_config musb_config = {
+ .multipoint = 0,
+ .dyn_fifo = 0,
+ .soft_con = 1,
+ .dma = 1,
+ .num_eps = 8,
+ .dma_channels = 8,
+ .gpio_vrsel = GPIO_PH6,
+};
+
static struct musb_hdrc_platform_data musb_plat = {
#if defined(CONFIG_USB_MUSB_OTG)
.mode = MUSB_OTG,
#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
.mode = MUSB_PERIPHERAL,
#endif
- .multipoint = 0,
+ .config = &musb_config,
};
static u64 musb_dmamask = ~(u32)0;
};
#endif
+static struct resource bfin_gpios_resources = {
+ .start = 0,
+ .end = MAX_BLACKFIN_GPIOS - 1,
+ .flags = IORESOURCE_IRQ,
+};
+
+static struct platform_device bfin_gpios_device = {
+ .name = "simple-gpio",
+ .id = -1,
+ .num_resources = 1,
+ .resource = &bfin_gpios_resources,
+};
+
#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
static struct resource bfin_atapi_resources[] = {
{
{
.name = "linux kernel(nand)",
.offset = 0,
- .size = 4 * SIZE_1M,
+ .size = 4 * 1024 * 1024,
},
{
.name = "file system(nand)",
- .offset = 4 * SIZE_1M,
- .size = (256 - 4) * SIZE_1M,
+ .offset = 4 * 1024 * 1024,
+ .size = (256 - 4) * 1024 * 1024,
},
};
#endif
#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
+static struct bfin_sd_host bfin_sdh_data = {
+ .dma_chan = CH_SDH,
+ .irq_int0 = IRQ_SDH_MASK0,
+ .pin_req = {P_SD_D0, P_SD_D1, P_SD_D2, P_SD_D3, P_SD_CLK, P_SD_CMD, 0},
+};
+
static struct platform_device bf54x_sdh_device = {
.name = "bfin-sdh",
.id = 0,
+ .dev = {
+ .platform_data = &bfin_sdh_data,
+ },
+};
+#endif
+
+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
+static struct mtd_partition para_partitions[] = {
+ {
+ .name = "bootloader(nor)",
+ .size = 0x40000,
+ .offset = 0,
+ }, {
+ .name = "linux kernel(nor)",
+ .size = 0x400000,
+ .offset = MTDPART_OFS_APPEND,
+ }, {
+ .name = "file system(nor)",
+ .size = MTDPART_SIZ_FULL,
+ .offset = MTDPART_OFS_APPEND,
+ }
+};
+
+static struct physmap_flash_data para_flash_data = {
+ .width = 2,
+ .parts = para_partitions,
+ .nr_parts = ARRAY_SIZE(para_partitions),
+};
+
+static struct resource para_flash_resource = {
+ .start = 0x20000000,
+ .end = 0x207fffff,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device para_flash_device = {
+ .name = "physmap-flash",
+ .id = 0,
+ .dev = {
+ .platform_data = ¶_flash_data,
+ },
+ .num_resources = 1,
+ .resource = ¶_flash_resource,
};
#endif
[1] = {
.start = CH_SPI0,
.end = CH_SPI0,
+ .flags = IORESOURCE_DMA,
+ },
+ [2] = {
+ .start = IRQ_SPI0,
+ .end = IRQ_SPI0,
.flags = IORESOURCE_IRQ,
}
};
[1] = {
.start = CH_SPI1,
.end = CH_SPI1,
+ .flags = IORESOURCE_DMA,
+ },
+ [2] = {
+ .start = IRQ_SPI1,
+ .end = IRQ_SPI1,
.flags = IORESOURCE_IRQ,
}
};
/* SPI controller data */
static struct bfin5xx_spi_master bf54x_spi_master_info0 = {
- .num_chipselect = 8,
+ .num_chipselect = 3,
.enable_dma = 1, /* master has the ability to do dma transfer */
.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
};
};
static struct bfin5xx_spi_master bf54x_spi_master_info1 = {
- .num_chipselect = 8,
+ .num_chipselect = 3,
.enable_dma = 1, /* master has the ability to do dma transfer */
.pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
};
#endif
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
- &bfin_sir_device,
+#ifdef CONFIG_BFIN_SIR0
+ &bfin_sir0_device,
+#endif
+#ifdef CONFIG_BFIN_SIR1
+ &bfin_sir1_device,
+#endif
+#ifdef CONFIG_BFIN_SIR2
+ &bfin_sir2_device,
+#endif
+#ifdef CONFIG_BFIN_SIR3
+ &bfin_sir3_device,
+#endif
#endif
#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
#endif
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
-/* &i2c_bfin_twi0_device, */
+ &i2c_bfin_twi0_device,
#if !defined(CONFIG_BF542)
&i2c_bfin_twi1_device,
#endif
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
&bfin_device_gpiokeys,
#endif
+
+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
+ ¶_flash_device,
+#endif
+
+ &bfin_gpios_device,
};
static int __init cm_bf548_init(void)