Blackfin: push BF5Xx configs down into mach-specific Kconfigs

[safe/jmp/linux-2.6] / arch / blackfin / mach-bf548 / Kconfig

diff --git a/arch/blackfin/mach-bf548/Kconfig b/arch/blackfin/mach-bf548/Kconfig
index b28625e..70189a0 100644 (file)
--- a/arch/blackfin/mach-bf548/Kconfig
+++ b/arch/blackfin/mach-bf548/Kconfig
@@ -1,7 +1,47 @@
+config BF542
+       def_bool y
+       depends on BF542_std || BF542M
+config BF544
+       def_bool y
+       depends on BF544_std || BF544M
+config BF547
+       def_bool y
+       depends on BF547_std || BF547M
+config BF548
+       def_bool y
+       depends on BF548_std || BF548M
+config BF549
+       def_bool y
+       depends on BF549_std || BF549M
+
+config BF54xM
+       def_bool y
+       depends on (BF542M || BF544M || BF547M || BF548M || BF549M)
+
+config BF54x
+       def_bool y
+       depends on (BF542 || BF544 || BF547 || BF548 || BF549)
+
 if (BF54x)
 
+source "arch/blackfin/mach-bf548/boards/Kconfig"
+
 menu "BF548 Specific Configuration"
 
+config DEB_DMA_URGENT
+       bool "DMA has priority over core for ext. accesses"
+       depends on BF54x
+       default y
+       help
+         Treat any DEB1, DEB2 and DEB3 request as Urgent
+
+config BF548_ATAPI_ALTERNATIVE_PORT
+       bool "BF548 ATAPI alternative port via GPIO"
+       help
+         BF548 ATAPI data and address PINs can be routed through
+         async address or GPIO port F and G. Select y to route it
+         to GPIO.
+
 comment "Interrupt Priority Assignment"
 menu "Priority"
 
@@ -241,7 +281,8 @@ config IRQ_OTPSEC
        default 11
 config IRQ_TIMER0
        int "IRQ_TIMER0"
-       default 11
+       default 7 if TICKSOURCE_GPTMR0
+       default 8
 config IRQ_TIMER1
        int "IRQ_TIMER1"
        default 11
@@ -277,6 +318,40 @@ config IRQ_PINT3
 
 endmenu
 
+comment "Pin Interrupt to Port Assignment"
+menu "Assignment"
+
+config PINTx_REASSIGN
+       bool "Reprogram PINT Assignment"
+       default y
+       help
+         The interrupt assignment registers controls the pin-to-interrupt
+         assignment in a byte-wide manner. Each option allows you to select
+         a set of pins (High/Low Byte) of an specific Port being mapped
+         to one of the four PIN Interrupts IRQ_PINTx.
+
+         You shouldn't change any of these unless you know exactly what you're doing.
+         Please consult the Blackfin BF54x Processor Hardware Reference Manual.
+
+config PINT0_ASSIGN
+       hex "PINT0_ASSIGN"
+       depends on PINTx_REASSIGN
+       default 0x00000101
+config PINT1_ASSIGN
+       hex "PINT1_ASSIGN"
+       depends on PINTx_REASSIGN
+       default 0x01010000
+config PINT2_ASSIGN
+       hex "PINT2_ASSIGN"
+       depends on PINTx_REASSIGN
+       default 0x07000101
+config PINT3_ASSIGN
+       hex "PINT3_ASSIGN"
+       depends on PINTx_REASSIGN
+       default 0x02020303
+
+endmenu
+
 endmenu
 
 endif