Blackfin: mass clean up of copyright/licensing info

[safe/jmp/linux-2.6] / arch / blackfin / mach-bf537 / include / mach / cdefBF534.h

diff --git a/arch/blackfin/mach-bf537/include/mach/cdefBF534.h b/arch/blackfin/mach-bf537/include/mach/cdefBF534.h
index f341692..91825c9 100644 (file)
--- a/arch/blackfin/mach-bf537/include/mach/cdefBF534.h
+++ b/arch/blackfin/mach-bf537/include/mach/cdefBF534.h
@@ -1,32 +1,7 @@
 /*
- * File:         include/asm-blackfin/mach-bf537/cdefbf534.h
- * Based on:
- * Author:
+ * Copyright 2005-2008 Analog Devices Inc.
  *
- * Created:
- * Description:  system mmr register map
- *
- * Rev:
- *
- * Modified:
- *
- *
- * Bugs:         Enter bugs at http://blackfin.uclinux.org/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; see the file COPYING.
- * If not, write to the Free Software Foundation,
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ * Licensed under the GPL-2 or later
  */
 
 #ifndef _CDEF_BF534_H
@@ -1783,7 +1758,7 @@ static __inline__ void bfin_write_PLL_CTL(unsigned int val)
        if (val == bfin_read_PLL_CTL())
                return;
 
-       local_irq_save(flags);
+       local_irq_save_hw(flags);
        /* Enable the PLL Wakeup bit in SIC IWR */
        iwr = bfin_read32(SIC_IWR);
        /* Only allow PPL Wakeup) */
@@ -1794,7 +1769,7 @@ static __inline__ void bfin_write_PLL_CTL(unsigned int val)
        asm("IDLE;");
 
        bfin_write32(SIC_IWR, iwr);
-       local_irq_restore(flags);
+       local_irq_restore_hw(flags);
 }
 
 /* Writing to VR_CTL initiates a PLL relock sequence. */
@@ -1805,7 +1780,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
        if (val == bfin_read_VR_CTL())
                return;
 
-       local_irq_save(flags);
+       local_irq_save_hw(flags);
        /* Enable the PLL Wakeup bit in SIC IWR */
        iwr = bfin_read32(SIC_IWR);
        /* Only allow PPL Wakeup) */
@@ -1816,7 +1791,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
        asm("IDLE;");
 
        bfin_write32(SIC_IWR, iwr);
-       local_irq_restore(flags);
+       local_irq_restore_hw(flags);
 }
 
 #endif                         /* _CDEF_BF534_H */