Blackfin: mass clean up of copyright/licensing info

[safe/jmp/linux-2.6] / arch / blackfin / mach-bf537 / boards / minotaur.c

diff --git a/arch/blackfin/mach-bf537/boards/minotaur.c b/arch/blackfin/mach-bf537/boards/minotaur.c
index 4ea7173..0da9272 100644 (file)
--- a/arch/blackfin/mach-bf537/boards/minotaur.c
+++ b/arch/blackfin/mach-bf537/boards/minotaur.c
@@ -1,4 +1,10 @@
 /*
+ * Copyright 2004-2009 Analog Devices Inc.
+ *           2008-2009 Cambridge Signal Processing
+ *                2005 National ICT Australia (NICTA)
+ *                      Aidan Williams <aidan@nicta.com.au>
+ *
+ * Licensed under the GPL-2 or later.
  */
 
 #include <linux/device.h>
@@ -61,8 +67,13 @@ static struct platform_device rtc_device = {
 #endif
 
 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+static struct platform_device bfin_mii_bus = {
+       .name = "bfin_mii_bus",
+};
+
 static struct platform_device bfin_mac_device = {
        .name = "bfin_mac",
+       .dev.platform_data = &bfin_mii_bus,
 };
 #endif
 
@@ -100,16 +111,16 @@ static struct platform_device net2272_bfin_device = {
 
 static struct mtd_partition bfin_spi_flash_partitions[] = {
        {
-               .name       = "uboot",
+               .name       = "bootloader(spi)",
                .size       = PSIZE_UBOOT,
                .offset     = 0x000000,
                .mask_flags = MTD_CAP_ROM
        }, {
-               .name       = "initramfs",
+               .name       = "initramfs(spi)",
                .size       = PSIZE_INITRAMFS,
                .offset     = PSIZE_UBOOT
        }, {
-               .name       = "opt",
+               .name       = "opt(spi)",
                .size       = FLASH_SIZE - (PSIZE_UBOOT + PSIZE_INITRAMFS),
                .offset     = PSIZE_UBOOT + PSIZE_INITRAMFS,
        }
@@ -129,9 +140,9 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
-static struct bfin5xx_spi_chip spi_mmc_chip_info = {
-       .enable_dma = 1,
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+static struct bfin5xx_spi_chip mmc_spi_chip_info = {
+       .enable_dma = 0,
        .bits_per_word = 8,
 };
 #endif
@@ -151,23 +162,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
        },
 #endif
 
-#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
        {
-               .modalias = "spi_mmc_dummy",
+               .modalias = "mmc_spi",
                .max_speed_hz = 5000000,     /* max spi clock (SCK) speed in HZ */
                .bus_num = 0,
-               .chip_select = 0,
-               .platform_data = NULL,
-               .controller_data = &spi_mmc_chip_info,
-               .mode = SPI_MODE_3,
-       },
-       {
-               .modalias = "spi_mmc",
-               .max_speed_hz = 5000000,     /* max spi clock (SCK) speed in HZ */
-               .bus_num = 0,
-               .chip_select = CONFIG_SPI_MMC_CS_CHAN,
-               .platform_data = NULL,
-               .controller_data = &spi_mmc_chip_info,
+               .chip_select = 5,
+               .controller_data = &mmc_spi_chip_info,
                .mode = SPI_MODE_3,
        },
 #endif
@@ -189,6 +190,11 @@ static struct resource bfin_spi0_resource[] = {
        [1] = {
                .start = CH_SPI,
                .end   = CH_SPI,
+               .flags = IORESOURCE_DMA,
+       },
+       [2] = {
+               .start = IRQ_SPI,
+               .end   = IRQ_SPI,
                .flags = IORESOURCE_IRQ,
        },
 };
@@ -225,6 +231,61 @@ static struct platform_device bfin_uart_device = {
 };
 #endif
 
+#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
+#ifdef CONFIG_BFIN_SIR0
+static struct resource bfin_sir0_resources[] = {
+       {
+               .start = 0xFFC00400,
+               .end = 0xFFC004FF,
+               .flags = IORESOURCE_MEM,
+       },
+       {
+               .start = IRQ_UART0_RX,
+               .end = IRQ_UART0_RX+1,
+               .flags = IORESOURCE_IRQ,
+       },
+       {
+               .start = CH_UART0_RX,
+               .end = CH_UART0_RX+1,
+               .flags = IORESOURCE_DMA,
+       },
+};
+
+static struct platform_device bfin_sir0_device = {
+       .name = "bfin_sir",
+       .id = 0,
+       .num_resources = ARRAY_SIZE(bfin_sir0_resources),
+       .resource = bfin_sir0_resources,
+};
+#endif
+#ifdef CONFIG_BFIN_SIR1
+static struct resource bfin_sir1_resources[] = {
+       {
+               .start = 0xFFC02000,
+               .end = 0xFFC020FF,
+               .flags = IORESOURCE_MEM,
+       },
+       {
+               .start = IRQ_UART1_RX,
+               .end = IRQ_UART1_RX+1,
+               .flags = IORESOURCE_IRQ,
+       },
+       {
+               .start = CH_UART1_RX,
+               .end = CH_UART1_RX+1,
+               .flags = IORESOURCE_DMA,
+       },
+};
+
+static struct platform_device bfin_sir1_device = {
+       .name = "bfin_sir",
+       .id = 1,
+       .num_resources = ARRAY_SIZE(bfin_sir1_resources),
+       .resource = bfin_sir1_resources,
+};
+#endif
+#endif
+
 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 static struct resource bfin_twi0_resource[] = {
        [0] = {
@@ -269,6 +330,7 @@ static struct platform_device *minotaur_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+       &bfin_mii_bus,
        &bfin_mac_device,
 #endif
 
@@ -284,6 +346,15 @@ static struct platform_device *minotaur_devices[] __initdata = {
        &bfin_uart_device,
 #endif
 
+#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
+#ifdef CONFIG_BFIN_SIR0
+       &bfin_sir0_device,
+#endif
+#ifdef CONFIG_BFIN_SIR1
+       &bfin_sir1_device,
+#endif
+#endif
+
 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
        &i2c_bfin_twi_device,
 #endif
@@ -313,5 +384,5 @@ void native_machine_restart(char *cmd)
 {
        /* workaround reboot hang when booting from SPI */
        if ((bfin_read_SYSCR() & 0x7) == 0x3)
-               bfin_gpio_reset_spi0_ssel1();
+               bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 }