ARM: Merge for-2635/s5pv210-clock

[safe/jmp/linux-2.6] / arch / arm / plat-s5p / clock.c

diff --git a/arch/arm/plat-s5p/clock.c b/arch/arm/plat-s5p/clock.c
index 3d3c0f1..a8bfabf 100644 (file)
--- a/arch/arm/plat-s5p/clock.c
+++ b/arch/arm/plat-s5p/clock.c
@@ -33,6 +33,17 @@ struct clk clk_ext_xtal_mux = {
        .id             = -1,
 };
 
+struct clk clk_xusbxti = {
+       .name           = "xusbxti",
+       .id             = -1,
+};
+
+static struct clk s5p_clk_27m = {
+       .name           = "clk_27m",
+       .id             = -1,
+       .rate           = 27000000,
+};
+
 /* 48MHz USB Phy clock output */
 struct clk clk_48m = {
        .name           = "clk_48m",
@@ -63,6 +74,13 @@ struct clk clk_fout_epll = {
        .ctrlbit        = (1 << 31),
 };
 
+/* VPLL clock output */
+struct clk clk_fout_vpll = {
+       .name           = "fout_vpll",
+       .id             = -1,
+       .ctrlbit        = (1 << 31),
+};
+
 /* ARM clock */
 struct clk clk_arm = {
        .name           = "armclk",
@@ -104,6 +122,11 @@ struct clksrc_sources clk_src_epll = {
        .nr_sources     = ARRAY_SIZE(clk_src_epll_list),
 };
 
+struct clk clk_vpll = {
+       .name           = "vpll",
+       .id             = -1,
+};
+
 int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable)
 {
        unsigned int ctrlbit = clk->ctrlbit;
@@ -118,10 +141,13 @@ int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable)
 static struct clk *s5p_clks[] __initdata = {
        &clk_ext_xtal_mux,
        &clk_48m,
+       &s5p_clk_27m,
        &clk_fout_apll,
        &clk_fout_mpll,
        &clk_fout_epll,
+       &clk_fout_vpll,
        &clk_arm,
+       &clk_vpll,
 };
 
 void __init s5p_register_clocks(unsigned long xtal_freq)