include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...

[safe/jmp/linux-2.6] / arch / arm / mach-orion5x / pci.c

diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index 256a4f6..e8706f1 100644 (file)
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -12,9 +12,11 @@
 
 #include <linux/kernel.h>
 #include <linux/pci.h>
+#include <linux/slab.h>
 #include <linux/mbus.h>
+#include <asm/irq.h>
 #include <asm/mach/pci.h>
-#include <asm/plat-orion/pcie.h>
+#include <plat/pcie.h>
 #include "common.h"
 
 /*****************************************************************************
@@ -195,6 +197,7 @@ static int __init pcie_setup(struct pci_sys_data *sys)
 /*****************************************************************************
  * PCI controller
  ****************************************************************************/
+#define ORION5X_PCI_REG(x)     (ORION5X_PCI_VIRT_BASE | (x))
 #define PCI_MODE               ORION5X_PCI_REG(0xd00)
 #define PCI_CMD                        ORION5X_PCI_REG(0xc00)
 #define PCI_P2P_CONF           ORION5X_PCI_REG(0x1d14)
@@ -461,7 +464,7 @@ static void __init orion5x_setup_pci_wins(struct mbus_dram_target_info *dram)
        writel(win_enable, PCI_BAR_ENABLE);
 
        /*
-        * Disable automatic update of address remaping when writing to BARs.
+        * Disable automatic update of address remapping when writing to BARs.
         */
        orion5x_setbits(PCI_ADDR_DECODE_CTRL, 1);
 }
@@ -541,6 +544,13 @@ static void __devinit rc_pci_fixup(struct pci_dev *dev)
 }
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_ANY_ID, rc_pci_fixup);
 
+static int orion5x_pci_disabled __initdata;
+
+void __init orion5x_pci_disable(void)
+{
+       orion5x_pci_disabled = 1;
+}
+
 void __init orion5x_pci_set_cardbus_mode(void)
 {
        orion5x_pci_cardbus_mode = 1;
@@ -553,7 +563,7 @@ int __init orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys)
        if (nr == 0) {
                orion_pcie_set_local_bus_nr(PCIE_BASE, sys->busnr);
                ret = pcie_setup(sys);
-       } else if (nr == 1) {
+       } else if (nr == 1 && !orion5x_pci_disabled) {
                orion5x_pci_set_bus_nr(sys->busnr);
                ret = pci_setup(sys);
        }
@@ -567,7 +577,7 @@ struct pci_bus __init *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys
 
        if (nr == 0) {
                bus = pci_scan_bus(sys->busnr, &pcie_ops, sys);
-       } else if (nr == 1) {
+       } else if (nr == 1 && !orion5x_pci_disabled) {
                bus = pci_scan_bus(sys->busnr, &pci_ops, sys);
        } else {
                bus = NULL;
@@ -584,7 +594,7 @@ int __init orion5x_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
        /*
         * PCIe endpoint?
         */
-       if (bus < orion5x_pci_local_bus_nr())
+       if (orion5x_pci_disabled || bus < orion5x_pci_local_bus_nr())
                return IRQ_ORION5X_PCIE0_INT;
 
        return -1;