ARM: Integrator: pass 'khz' to integrator_time_init
[safe/jmp/linux-2.6] / arch / arm / mach-integrator / core.c
index 096f899..d02f0e3 100644 (file)
@@ -19,6 +19,8 @@
 #include <linux/termios.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/serial.h>
+#include <linux/clocksource.h>
+#include <linux/clockchips.h>
 #include <linux/io.h>
 
 #include <asm/clkdev.h>
@@ -225,7 +227,6 @@ EXPORT_SYMBOL(cm_control);
 #define TIMER0_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000000)
 #define TIMER1_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000100)
 #define TIMER2_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000200)
-#define VA_IC_BASE     IO_ADDRESS(INTEGRATOR_IC_BASE) 
 
 /*
  * How long is the timer interval?
@@ -241,97 +242,133 @@ EXPORT_SYMBOL(cm_control);
 
 static unsigned long timer_reload;
 
-/*
- * Returns number of ms since last clock interrupt.  Note that interrupts
- * will have been disabled by do_gettimeoffset()
- */
-unsigned long integrator_gettimeoffset(void)
+static void __iomem * const clksrc_base = (void __iomem *)TIMER2_VA_BASE;
+
+static cycle_t timersp_read(struct clocksource *cs)
 {
-       unsigned long ticks1, ticks2, status;
-
-       /*
-        * Get the current number of ticks.  Note that there is a race
-        * condition between us reading the timer and checking for
-        * an interrupt.  We get around this by ensuring that the
-        * counter has not reloaded between our two reads.
-        */
-       ticks2 = readl(TIMER1_VA_BASE + TIMER_VALUE) & 0xffff;
-       do {
-               ticks1 = ticks2;
-               status = __raw_readl(VA_IC_BASE + IRQ_RAW_STATUS);
-               ticks2 = readl(TIMER1_VA_BASE + TIMER_VALUE) & 0xffff;
-       } while (ticks2 > ticks1);
-
-       /*
-        * Number of ticks since last interrupt.
-        */
-       ticks1 = timer_reload - ticks2;
-
-       /*
-        * Interrupt pending?  If so, we've reloaded once already.
-        */
-       if (status & (1 << IRQ_TIMERINT1))
-               ticks1 += timer_reload;
-
-       /*
-        * Convert the ticks to usecs
-        */
-       return TICKS2USECS(ticks1);
+       return ~(readl(clksrc_base + TIMER_VALUE) & 0xffff);
 }
 
+static struct clocksource clocksource_timersp = {
+       .name           = "timer2",
+       .rating         = 200,
+       .read           = timersp_read,
+       .mask           = CLOCKSOURCE_MASK(16),
+       .shift          = 16,
+       .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
+static void integrator_clocksource_init(u32 khz)
+{
+       struct clocksource *cs = &clocksource_timersp;
+       void __iomem *base = clksrc_base;
+       u32 ctrl = TIMER_CTRL_ENABLE;
+
+       if (khz >= 1500) {
+               khz /= 16;
+               ctrl = TIMER_CTRL_DIV16;
+       }
+
+       writel(ctrl, base + TIMER_CTRL);
+       writel(0xffff, base + TIMER_LOAD);
+
+       cs->mult = clocksource_khz2mult(khz, cs->shift);
+       clocksource_register(cs);
+}
+
+static void __iomem * const clkevt_base = (void __iomem *)TIMER1_VA_BASE;
+
 /*
  * IRQ handler for the timer
  */
-static irqreturn_t
-integrator_timer_interrupt(int irq, void *dev_id)
+static irqreturn_t integrator_timer_interrupt(int irq, void *dev_id)
 {
-       /*
-        * clear the interrupt
-        */
-       writel(1, TIMER1_VA_BASE + TIMER_INTCLR);
+       struct clock_event_device *evt = dev_id;
+
+       /* clear the interrupt */
+       writel(1, clkevt_base + TIMER_INTCLR);
 
-       timer_tick();
+       evt->event_handler(evt);
 
        return IRQ_HANDLED;
 }
 
+static void clkevt_set_mode(enum clock_event_mode mode, struct clock_event_device *evt)
+{
+       u32 ctrl = readl(clkevt_base + TIMER_CTRL) & ~TIMER_CTRL_ENABLE;
+
+       BUG_ON(mode == CLOCK_EVT_MODE_ONESHOT);
+
+       if (mode == CLOCK_EVT_MODE_PERIODIC) {
+               writel(ctrl, clkevt_base + TIMER_CTRL);
+               writel(timer_reload, clkevt_base + TIMER_LOAD);
+               ctrl |= TIMER_CTRL_PERIODIC | TIMER_CTRL_ENABLE;
+       }
+
+       writel(ctrl, clkevt_base + TIMER_CTRL);
+}
+
+static int clkevt_set_next_event(unsigned long next, struct clock_event_device *evt)
+{
+       unsigned long ctrl = readl(clkevt_base + TIMER_CTRL);
+
+       writel(ctrl & ~TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL);
+       writel(next, clkevt_base + TIMER_LOAD);
+       writel(ctrl | TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL);
+
+       return 0;
+}
+
+static struct clock_event_device integrator_clockevent = {
+       .name           = "timer1",
+       .shift          = 34,
+       .features       = CLOCK_EVT_FEAT_PERIODIC,
+       .set_mode       = clkevt_set_mode,
+       .set_next_event = clkevt_set_next_event,
+       .rating         = 300,
+       .cpumask        = cpu_all_mask,
+};
+
 static struct irqaction integrator_timer_irq = {
-       .name           = "Integrator Timer Tick",
+       .name           = "timer",
        .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
        .handler        = integrator_timer_interrupt,
+       .dev_id         = &integrator_clockevent,
 };
 
-/*
- * Set up timer interrupt, and return the current time in seconds.
- */
-void __init integrator_time_init(unsigned long reload, unsigned int ctrl)
+static void integrator_clockevent_init(u32 khz, unsigned int ctrl)
 {
-       unsigned int timer_ctrl = TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC;
+       struct clock_event_device *evt = &integrator_clockevent;
+
+       if (khz * 1000 > 0x100000 * HZ) {
+               khz /= 256;
+               ctrl |= TIMER_CTRL_DIV256;
+       } else if (khz * 1000 > 0x10000 * HZ) {
+               khz /= 16;
+               ctrl |= TIMER_CTRL_DIV16;
+       }
 
-       timer_reload = reload;
-       timer_ctrl |= ctrl;
+       timer_reload = khz * 1000 / HZ;
+       writel(ctrl, clkevt_base + TIMER_CTRL);
 
-       if (timer_reload > 0x100000) {
-               timer_reload >>= 8;
-               timer_ctrl |= TIMER_CTRL_DIV256;
-       } else if (timer_reload > 0x010000) {
-               timer_reload >>= 4;
-               timer_ctrl |= TIMER_CTRL_DIV16;
-       }
+       evt->irq = IRQ_TIMERINT1;
+       evt->mult = div_sc(khz, NSEC_PER_MSEC, evt->shift);
+       evt->max_delta_ns = clockevent_delta2ns(0xffff, evt);
+       evt->min_delta_ns = clockevent_delta2ns(0xf, evt);
+
+       setup_irq(IRQ_TIMERINT1, &integrator_timer_irq);
+       clockevents_register_device(evt);
+}
 
-       /*
-        * Initialise to a known state (all timers off)
-        */
+/*
+ * Set up timer(s).
+ */
+void __init integrator_time_init(u32 khz, unsigned int ctrl)
+{
        writel(0, TIMER0_VA_BASE + TIMER_CTRL);
        writel(0, TIMER1_VA_BASE + TIMER_CTRL);
        writel(0, TIMER2_VA_BASE + TIMER_CTRL);
 
-       writel(timer_reload, TIMER1_VA_BASE + TIMER_LOAD);
-       writel(timer_reload, TIMER1_VA_BASE + TIMER_VALUE);
-       writel(timer_ctrl, TIMER1_VA_BASE + TIMER_CTRL);
-
-       /*
-        * Make irqs happen for the system timer
-        */
-       setup_irq(IRQ_TIMERINT1, &integrator_timer_irq);
+       integrator_clocksource_init(khz);
+       integrator_clockevent_init(khz, ctrl);
 }