SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/gpu/drm/radeon/radeon_fb.c

   1 /*
   2  * Copyright © 2007 David Airlie
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *     David Airlie
  25  */
  26     /*
  27      *  Modularization
  28      */
  29
  30 #include <linux/module.h>
  31 #include <linux/slab.h>
  32 #include <linux/fb.h>
  33
  34 #include "drmP.h"
  35 #include "drm.h"
  36 #include "drm_crtc.h"
  37 #include "drm_crtc_helper.h"
  38 #include "radeon_drm.h"
  39 #include "radeon.h"
  40
  41 #include "drm_fb_helper.h"
  42
  43 #include <linux/vga_switcheroo.h>
  44
  45 struct radeon_fb_device {
  46         struct drm_fb_helper helper;
  47         struct radeon_framebuffer       *rfb;
  48         struct radeon_device            *rdev;
  49 };
  50
  51 static struct fb_ops radeonfb_ops = {
  52         .owner = THIS_MODULE,
  53         .fb_check_var = drm_fb_helper_check_var,
  54         .fb_set_par = drm_fb_helper_set_par,
  55         .fb_setcolreg = drm_fb_helper_setcolreg,
  56         .fb_fillrect = cfb_fillrect,
  57         .fb_copyarea = cfb_copyarea,
  58         .fb_imageblit = cfb_imageblit,
  59         .fb_pan_display = drm_fb_helper_pan_display,
  60         .fb_blank = drm_fb_helper_blank,
  61         .fb_setcmap = drm_fb_helper_setcmap,
  62 };
  63
  64 /**
  65  * Currently it is assumed that the old framebuffer is reused.
  66  *
  67  * LOCKING
  68  * caller should hold the mode config lock.
  69  *
  70  */
  71 int radeonfb_resize(struct drm_device *dev, struct drm_crtc *crtc)
  72 {
  73         struct fb_info *info;
  74         struct drm_framebuffer *fb;
  75         struct drm_display_mode *mode = crtc->desired_mode;
  76
  77         fb = crtc->fb;
  78         if (fb == NULL) {
  79                 return 1;
  80         }
  81         info = fb->fbdev;
  82         if (info == NULL) {
  83                 return 1;
  84         }
  85         if (mode == NULL) {
  86                 return 1;
  87         }
  88         info->var.xres = mode->hdisplay;
  89         info->var.right_margin = mode->hsync_start - mode->hdisplay;
  90         info->var.hsync_len = mode->hsync_end - mode->hsync_start;
  91         info->var.left_margin = mode->htotal - mode->hsync_end;
  92         info->var.yres = mode->vdisplay;
  93         info->var.lower_margin = mode->vsync_start - mode->vdisplay;
  94         info->var.vsync_len = mode->vsync_end - mode->vsync_start;
  95         info->var.upper_margin = mode->vtotal - mode->vsync_end;
  96         info->var.pixclock = 10000000 / mode->htotal * 1000 / mode->vtotal * 100;
  97         /* avoid overflow */
  98         info->var.pixclock = info->var.pixclock * 1000 / mode->vrefresh;
  99
 100         return 0;
 101 }
 102 EXPORT_SYMBOL(radeonfb_resize);
 103
 104 static int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled)
 105 {
 106         int aligned = width;
 107         int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
 108         int pitch_mask = 0;
 109
 110         switch (bpp / 8) {
 111         case 1:
 112                 pitch_mask = align_large ? 255 : 127;
 113                 break;
 114         case 2:
 115                 pitch_mask = align_large ? 127 : 31;
 116                 break;
 117         case 3:
 118         case 4:
 119                 pitch_mask = align_large ? 63 : 15;
 120                 break;
 121         }
 122
 123         aligned += pitch_mask;
 124         aligned &= ~pitch_mask;
 125         return aligned;
 126 }
 127
 128 static struct drm_fb_helper_funcs radeon_fb_helper_funcs = {
 129         .gamma_set = radeon_crtc_fb_gamma_set,
 130         .gamma_get = radeon_crtc_fb_gamma_get,
 131 };
 132
 133 int radeonfb_create(struct drm_device *dev,
 134                     uint32_t fb_width, uint32_t fb_height,
 135                     uint32_t surface_width, uint32_t surface_height,
 136                     uint32_t surface_depth, uint32_t surface_bpp,
 137                     struct drm_framebuffer **fb_p)
 138 {
 139         struct radeon_device *rdev = dev->dev_private;
 140         struct fb_info *info;
 141         struct radeon_fb_device *rfbdev;
 142         struct drm_framebuffer *fb = NULL;
 143         struct radeon_framebuffer *rfb;
 144         struct drm_mode_fb_cmd mode_cmd;
 145         struct drm_gem_object *gobj = NULL;
 146         struct radeon_bo *rbo = NULL;
 147         struct device *device = &rdev->pdev->dev;
 148         int size, aligned_size, ret;
 149         u64 fb_gpuaddr;
 150         void *fbptr = NULL;
 151         unsigned long tmp;
 152         bool fb_tiled = false; /* useful for testing */
 153         u32 tiling_flags = 0;
 154
 155         mode_cmd.width = surface_width;
 156         mode_cmd.height = surface_height;
 157
 158         /* avivo can't scanout real 24bpp */
 159         if ((surface_bpp == 24) && ASIC_IS_AVIVO(rdev))
 160                 surface_bpp = 32;
 161
 162         mode_cmd.bpp = surface_bpp;
 163         /* need to align pitch with crtc limits */
 164         mode_cmd.pitch = radeon_align_pitch(rdev, mode_cmd.width, mode_cmd.bpp, fb_tiled) * ((mode_cmd.bpp + 1) / 8);
 165         mode_cmd.depth = surface_depth;
 166
 167         size = mode_cmd.pitch * mode_cmd.height;
 168         aligned_size = ALIGN(size, PAGE_SIZE);
 169
 170         ret = radeon_gem_object_create(rdev, aligned_size, 0,
 171                         RADEON_GEM_DOMAIN_VRAM,
 172                         false, ttm_bo_type_kernel,
 173                         &gobj);
 174         if (ret) {
 175                 printk(KERN_ERR "failed to allocate framebuffer (%d %d)\n",
 176                        surface_width, surface_height);
 177                 ret = -ENOMEM;
 178                 goto out;
 179         }
 180         rbo = gobj->driver_private;
 181
 182         if (fb_tiled)
 183                 tiling_flags = RADEON_TILING_MACRO;
 184
 185 #ifdef __BIG_ENDIAN
 186         switch (mode_cmd.bpp) {
 187         case 32:
 188                 tiling_flags |= RADEON_TILING_SWAP_32BIT;
 189                 break;
 190         case 16:
 191                 tiling_flags |= RADEON_TILING_SWAP_16BIT;
 192         default:
 193                 break;
 194         }
 195 #endif
 196
 197         if (tiling_flags) {
 198                 ret = radeon_bo_set_tiling_flags(rbo,
 199                                         tiling_flags | RADEON_TILING_SURFACE,
 200                                         mode_cmd.pitch);
 201                 if (ret)
 202                         dev_err(rdev->dev, "FB failed to set tiling flags\n");
 203         }
 204         mutex_lock(&rdev->ddev->struct_mutex);
 205         fb = radeon_framebuffer_create(rdev->ddev, &mode_cmd, gobj);
 206         if (fb == NULL) {
 207                 DRM_ERROR("failed to allocate fb.\n");
 208                 ret = -ENOMEM;
 209                 goto out_unref;
 210         }
 211         ret = radeon_bo_reserve(rbo, false);
 212         if (unlikely(ret != 0))
 213                 goto out_unref;
 214         ret = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, &fb_gpuaddr);
 215         if (ret) {
 216                 radeon_bo_unreserve(rbo);
 217                 goto out_unref;
 218         }
 219         if (fb_tiled)
 220                 radeon_bo_check_tiling(rbo, 0, 0);
 221         ret = radeon_bo_kmap(rbo, &fbptr);
 222         radeon_bo_unreserve(rbo);
 223         if (ret) {
 224                 goto out_unref;
 225         }
 226
 227         list_add(&fb->filp_head, &rdev->ddev->mode_config.fb_kernel_list);
 228
 229         *fb_p = fb;
 230         rfb = to_radeon_framebuffer(fb);
 231         rdev->fbdev_rfb = rfb;
 232         rdev->fbdev_rbo = rbo;
 233
 234         info = framebuffer_alloc(sizeof(struct radeon_fb_device), device);
 235         if (info == NULL) {
 236                 ret = -ENOMEM;
 237                 goto out_unref;
 238         }
 239
 240         rdev->fbdev_info = info;
 241         rfbdev = info->par;
 242         rfbdev->helper.funcs = &radeon_fb_helper_funcs;
 243         rfbdev->helper.dev = dev;
 244         ret = drm_fb_helper_init_crtc_count(&rfbdev->helper, rdev->num_crtc,
 245                                             RADEONFB_CONN_LIMIT);
 246         if (ret)
 247                 goto out_unref;
 248
 249         memset_io(fbptr, 0x0, aligned_size);
 250
 251         strcpy(info->fix.id, "radeondrmfb");
 252
 253         drm_fb_helper_fill_fix(info, fb->pitch, fb->depth);
 254
 255         info->flags = FBINFO_DEFAULT;
 256         info->fbops = &radeonfb_ops;
 257
 258         tmp = fb_gpuaddr - rdev->mc.vram_start;
 259         info->fix.smem_start = rdev->mc.aper_base + tmp;
 260         info->fix.smem_len = size;
 261         info->screen_base = fbptr;
 262         info->screen_size = size;
 263
 264         drm_fb_helper_fill_var(info, fb, fb_width, fb_height);
 265
 266         /* setup aperture base/size for vesafb takeover */
 267         info->aperture_base = rdev->ddev->mode_config.fb_base;
 268         info->aperture_size = rdev->mc.real_vram_size;
 269
 270         info->fix.mmio_start = 0;
 271         info->fix.mmio_len = 0;
 272         info->pixmap.size = 64*1024;
 273         info->pixmap.buf_align = 8;
 274         info->pixmap.access_align = 32;
 275         info->pixmap.flags = FB_PIXMAP_SYSTEM;
 276         info->pixmap.scan_align = 1;
 277         if (info->screen_base == NULL) {
 278                 ret = -ENOSPC;
 279                 goto out_unref;
 280         }
 281         DRM_INFO("fb mappable at 0x%lX\n",  info->fix.smem_start);
 282         DRM_INFO("vram apper at 0x%lX\n",  (unsigned long)rdev->mc.aper_base);
 283         DRM_INFO("size %lu\n", (unsigned long)size);
 284         DRM_INFO("fb depth is %d\n", fb->depth);
 285         DRM_INFO("   pitch is %d\n", fb->pitch);
 286
 287         fb->fbdev = info;
 288         rfbdev->rfb = rfb;
 289         rfbdev->rdev = rdev;
 290
 291         mutex_unlock(&rdev->ddev->struct_mutex);
 292         vga_switcheroo_client_fb_set(rdev->ddev->pdev, info);
 293         return 0;
 294
 295 out_unref:
 296         if (rbo) {
 297                 ret = radeon_bo_reserve(rbo, false);
 298                 if (likely(ret == 0)) {
 299                         radeon_bo_kunmap(rbo);
 300                         radeon_bo_unreserve(rbo);
 301                 }
 302         }
 303         if (fb && ret) {
 304                 list_del(&fb->filp_head);
 305                 drm_gem_object_unreference(gobj);
 306                 drm_framebuffer_cleanup(fb);
 307                 kfree(fb);
 308         }
 309         drm_gem_object_unreference(gobj);
 310         mutex_unlock(&rdev->ddev->struct_mutex);
 311 out:
 312         return ret;
 313 }
 314
 315 static char *mode_option;
 316 int radeon_parse_options(char *options)
 317 {
 318         char *this_opt;
 319
 320         if (!options || !*options)
 321                 return 0;
 322
 323         while ((this_opt = strsep(&options, ",")) != NULL) {
 324                 if (!*this_opt)
 325                         continue;
 326                 mode_option = this_opt;
 327         }
 328         return 0;
 329 }
 330
 331 int radeonfb_probe(struct drm_device *dev)
 332 {
 333         struct radeon_device *rdev = dev->dev_private;
 334         int bpp_sel = 32;
 335
 336         /* select 8 bpp console on RN50 or 16MB cards */
 337         if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32*1024*1024))
 338                 bpp_sel = 8;
 339
 340         return drm_fb_helper_single_fb_probe(dev, bpp_sel, &radeonfb_create);
 341 }
 342
 343 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb)
 344 {
 345         struct fb_info *info;
 346         struct radeon_framebuffer *rfb = to_radeon_framebuffer(fb);
 347         struct radeon_bo *rbo;
 348         int r;
 349
 350         if (!fb) {
 351                 return -EINVAL;
 352         }
 353         info = fb->fbdev;
 354         if (info) {
 355                 struct radeon_fb_device *rfbdev = info->par;
 356                 rbo = rfb->obj->driver_private;
 357                 unregister_framebuffer(info);
 358                 r = radeon_bo_reserve(rbo, false);
 359                 if (likely(r == 0)) {
 360                         radeon_bo_kunmap(rbo);
 361                         radeon_bo_unpin(rbo);
 362                         radeon_bo_unreserve(rbo);
 363                 }
 364                 drm_fb_helper_free(&rfbdev->helper);
 365                 framebuffer_release(info);
 366         }
 367
 368         printk(KERN_INFO "unregistered panic notifier\n");
 369
 370         return 0;
 371 }
 372 EXPORT_SYMBOL(radeonfb_remove);
 373 MODULE_LICENSE("GPL");