2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
22 #include "kvm_cache_regs.h"
24 #include <linux/kvm_host.h>
25 #include <linux/types.h>
26 #include <linux/string.h>
28 #include <linux/highmem.h>
29 #include <linux/module.h>
30 #include <linux/swap.h>
31 #include <linux/hugetlb.h>
32 #include <linux/compiler.h>
33 #include <linux/srcu.h>
36 #include <asm/cmpxchg.h>
41 * When setting this variable to true it enables Two-Dimensional-Paging
42 * where the hardware walks 2 page tables:
43 * 1. the guest-virtual to guest-physical
44 * 2. while doing 1. it walks guest-physical to host-physical
45 * If the hardware supports that we don't need to do shadow paging.
47 bool tdp_enabled = false;
54 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
56 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
61 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
62 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
66 #define pgprintk(x...) do { } while (0)
67 #define rmap_printk(x...) do { } while (0)
71 #if defined(MMU_DEBUG) || defined(AUDIT)
73 module_param(dbg, bool, 0644);
76 static int oos_shadow = 1;
77 module_param(oos_shadow, bool, 0644);
80 #define ASSERT(x) do { } while (0)
84 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
85 __FILE__, __LINE__, #x); \
89 #define PT_FIRST_AVAIL_BITS_SHIFT 9
90 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
92 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
94 #define PT64_LEVEL_BITS 9
96 #define PT64_LEVEL_SHIFT(level) \
97 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
99 #define PT64_LEVEL_MASK(level) \
100 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
102 #define PT64_INDEX(address, level)\
103 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
106 #define PT32_LEVEL_BITS 10
108 #define PT32_LEVEL_SHIFT(level) \
109 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
111 #define PT32_LEVEL_MASK(level) \
112 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
113 #define PT32_LVL_OFFSET_MASK(level) \
114 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
115 * PT32_LEVEL_BITS))) - 1))
117 #define PT32_INDEX(address, level)\
118 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
121 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
122 #define PT64_DIR_BASE_ADDR_MASK \
123 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
124 #define PT64_LVL_ADDR_MASK(level) \
125 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
126 * PT64_LEVEL_BITS))) - 1))
127 #define PT64_LVL_OFFSET_MASK(level) \
128 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
129 * PT64_LEVEL_BITS))) - 1))
131 #define PT32_BASE_ADDR_MASK PAGE_MASK
132 #define PT32_DIR_BASE_ADDR_MASK \
133 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
134 #define PT32_LVL_ADDR_MASK(level) \
135 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
136 * PT32_LEVEL_BITS))) - 1))
138 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
141 #define PFERR_PRESENT_MASK (1U << 0)
142 #define PFERR_WRITE_MASK (1U << 1)
143 #define PFERR_USER_MASK (1U << 2)
144 #define PFERR_RSVD_MASK (1U << 3)
145 #define PFERR_FETCH_MASK (1U << 4)
149 #define ACC_EXEC_MASK 1
150 #define ACC_WRITE_MASK PT_WRITABLE_MASK
151 #define ACC_USER_MASK PT_USER_MASK
152 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
154 #define CREATE_TRACE_POINTS
155 #include "mmutrace.h"
157 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
159 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
161 struct kvm_rmap_desc {
162 u64 *sptes[RMAP_EXT];
163 struct kvm_rmap_desc *more;
166 struct kvm_shadow_walk_iterator {
174 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
175 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
176 shadow_walk_okay(&(_walker)); \
177 shadow_walk_next(&(_walker)))
180 struct kvm_unsync_walk {
181 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
184 typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
186 static struct kmem_cache *pte_chain_cache;
187 static struct kmem_cache *rmap_desc_cache;
188 static struct kmem_cache *mmu_page_header_cache;
190 static u64 __read_mostly shadow_trap_nonpresent_pte;
191 static u64 __read_mostly shadow_notrap_nonpresent_pte;
192 static u64 __read_mostly shadow_base_present_pte;
193 static u64 __read_mostly shadow_nx_mask;
194 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
195 static u64 __read_mostly shadow_user_mask;
196 static u64 __read_mostly shadow_accessed_mask;
197 static u64 __read_mostly shadow_dirty_mask;
199 static inline u64 rsvd_bits(int s, int e)
201 return ((1ULL << (e - s + 1)) - 1) << s;
204 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
206 shadow_trap_nonpresent_pte = trap_pte;
207 shadow_notrap_nonpresent_pte = notrap_pte;
209 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
211 void kvm_mmu_set_base_ptes(u64 base_pte)
213 shadow_base_present_pte = base_pte;
215 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
217 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
218 u64 dirty_mask, u64 nx_mask, u64 x_mask)
220 shadow_user_mask = user_mask;
221 shadow_accessed_mask = accessed_mask;
222 shadow_dirty_mask = dirty_mask;
223 shadow_nx_mask = nx_mask;
224 shadow_x_mask = x_mask;
226 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
228 static int is_write_protection(struct kvm_vcpu *vcpu)
230 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
233 static int is_cpuid_PSE36(void)
238 static int is_nx(struct kvm_vcpu *vcpu)
240 return vcpu->arch.efer & EFER_NX;
243 static int is_shadow_present_pte(u64 pte)
245 return pte != shadow_trap_nonpresent_pte
246 && pte != shadow_notrap_nonpresent_pte;
249 static int is_large_pte(u64 pte)
251 return pte & PT_PAGE_SIZE_MASK;
254 static int is_writable_pte(unsigned long pte)
256 return pte & PT_WRITABLE_MASK;
259 static int is_dirty_gpte(unsigned long pte)
261 return pte & PT_DIRTY_MASK;
264 static int is_rmap_spte(u64 pte)
266 return is_shadow_present_pte(pte);
269 static int is_last_spte(u64 pte, int level)
271 if (level == PT_PAGE_TABLE_LEVEL)
273 if (is_large_pte(pte))
278 static pfn_t spte_to_pfn(u64 pte)
280 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
283 static gfn_t pse36_gfn_delta(u32 gpte)
285 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
287 return (gpte & PT32_DIR_PSE36_MASK) << shift;
290 static void __set_spte(u64 *sptep, u64 spte)
293 set_64bit((unsigned long *)sptep, spte);
295 set_64bit((unsigned long long *)sptep, spte);
299 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
300 struct kmem_cache *base_cache, int min)
304 if (cache->nobjs >= min)
306 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
307 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
310 cache->objects[cache->nobjs++] = obj;
315 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
318 kfree(mc->objects[--mc->nobjs]);
321 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
326 if (cache->nobjs >= min)
328 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
329 page = alloc_page(GFP_KERNEL);
332 set_page_private(page, 0);
333 cache->objects[cache->nobjs++] = page_address(page);
338 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
341 free_page((unsigned long)mc->objects[--mc->nobjs]);
344 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
348 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
352 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
356 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
359 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
360 mmu_page_header_cache, 4);
365 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
367 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
368 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
369 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
370 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
373 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
379 p = mc->objects[--mc->nobjs];
383 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
385 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
386 sizeof(struct kvm_pte_chain));
389 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
394 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
396 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
397 sizeof(struct kvm_rmap_desc));
400 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
406 * Return the pointer to the largepage write count for a given
407 * gfn, handling slots that are not large page aligned.
409 static int *slot_largepage_idx(gfn_t gfn,
410 struct kvm_memory_slot *slot,
415 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
416 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
417 return &slot->lpage_info[level - 2][idx].write_count;
420 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
422 struct kvm_memory_slot *slot;
426 gfn = unalias_gfn(kvm, gfn);
428 slot = gfn_to_memslot_unaliased(kvm, gfn);
429 for (i = PT_DIRECTORY_LEVEL;
430 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
431 write_count = slot_largepage_idx(gfn, slot, i);
436 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
438 struct kvm_memory_slot *slot;
442 gfn = unalias_gfn(kvm, gfn);
443 for (i = PT_DIRECTORY_LEVEL;
444 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
445 slot = gfn_to_memslot_unaliased(kvm, gfn);
446 write_count = slot_largepage_idx(gfn, slot, i);
448 WARN_ON(*write_count < 0);
452 static int has_wrprotected_page(struct kvm *kvm,
456 struct kvm_memory_slot *slot;
459 gfn = unalias_gfn(kvm, gfn);
460 slot = gfn_to_memslot_unaliased(kvm, gfn);
462 largepage_idx = slot_largepage_idx(gfn, slot, level);
463 return *largepage_idx;
469 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
471 unsigned long page_size = PAGE_SIZE;
472 struct vm_area_struct *vma;
476 addr = gfn_to_hva(kvm, gfn);
477 if (kvm_is_error_hva(addr))
478 return PT_PAGE_TABLE_LEVEL;
480 down_read(¤t->mm->mmap_sem);
481 vma = find_vma(current->mm, addr);
485 page_size = vma_kernel_pagesize(vma);
488 up_read(¤t->mm->mmap_sem);
490 for (i = PT_PAGE_TABLE_LEVEL;
491 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
492 if (page_size >= KVM_HPAGE_SIZE(i))
501 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
503 struct kvm_memory_slot *slot;
504 int host_level, level, max_level;
506 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
507 if (slot && slot->dirty_bitmap)
508 return PT_PAGE_TABLE_LEVEL;
510 host_level = host_mapping_level(vcpu->kvm, large_gfn);
512 if (host_level == PT_PAGE_TABLE_LEVEL)
515 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
516 kvm_x86_ops->get_lpage_level() : host_level;
518 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
519 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
526 * Take gfn and return the reverse mapping to it.
527 * Note: gfn must be unaliased before this function get called
530 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
532 struct kvm_memory_slot *slot;
535 slot = gfn_to_memslot(kvm, gfn);
536 if (likely(level == PT_PAGE_TABLE_LEVEL))
537 return &slot->rmap[gfn - slot->base_gfn];
539 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
540 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
542 return &slot->lpage_info[level - 2][idx].rmap_pde;
546 * Reverse mapping data structures:
548 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
549 * that points to page_address(page).
551 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
552 * containing more mappings.
554 * Returns the number of rmap entries before the spte was added or zero if
555 * the spte was not added.
558 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
560 struct kvm_mmu_page *sp;
561 struct kvm_rmap_desc *desc;
562 unsigned long *rmapp;
565 if (!is_rmap_spte(*spte))
567 gfn = unalias_gfn(vcpu->kvm, gfn);
568 sp = page_header(__pa(spte));
569 sp->gfns[spte - sp->spt] = gfn;
570 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
572 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
573 *rmapp = (unsigned long)spte;
574 } else if (!(*rmapp & 1)) {
575 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
576 desc = mmu_alloc_rmap_desc(vcpu);
577 desc->sptes[0] = (u64 *)*rmapp;
578 desc->sptes[1] = spte;
579 *rmapp = (unsigned long)desc | 1;
581 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
582 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
583 while (desc->sptes[RMAP_EXT-1] && desc->more) {
587 if (desc->sptes[RMAP_EXT-1]) {
588 desc->more = mmu_alloc_rmap_desc(vcpu);
591 for (i = 0; desc->sptes[i]; ++i)
593 desc->sptes[i] = spte;
598 static void rmap_desc_remove_entry(unsigned long *rmapp,
599 struct kvm_rmap_desc *desc,
601 struct kvm_rmap_desc *prev_desc)
605 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
607 desc->sptes[i] = desc->sptes[j];
608 desc->sptes[j] = NULL;
611 if (!prev_desc && !desc->more)
612 *rmapp = (unsigned long)desc->sptes[0];
615 prev_desc->more = desc->more;
617 *rmapp = (unsigned long)desc->more | 1;
618 mmu_free_rmap_desc(desc);
621 static void rmap_remove(struct kvm *kvm, u64 *spte)
623 struct kvm_rmap_desc *desc;
624 struct kvm_rmap_desc *prev_desc;
625 struct kvm_mmu_page *sp;
627 unsigned long *rmapp;
630 if (!is_rmap_spte(*spte))
632 sp = page_header(__pa(spte));
633 pfn = spte_to_pfn(*spte);
634 if (*spte & shadow_accessed_mask)
635 kvm_set_pfn_accessed(pfn);
636 if (is_writable_pte(*spte))
637 kvm_set_pfn_dirty(pfn);
638 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
640 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
642 } else if (!(*rmapp & 1)) {
643 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
644 if ((u64 *)*rmapp != spte) {
645 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
651 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
652 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
655 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
656 if (desc->sptes[i] == spte) {
657 rmap_desc_remove_entry(rmapp,
665 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
670 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
672 struct kvm_rmap_desc *desc;
673 struct kvm_rmap_desc *prev_desc;
679 else if (!(*rmapp & 1)) {
681 return (u64 *)*rmapp;
684 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
688 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
689 if (prev_spte == spte)
690 return desc->sptes[i];
691 prev_spte = desc->sptes[i];
698 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
700 unsigned long *rmapp;
702 int i, write_protected = 0;
704 gfn = unalias_gfn(kvm, gfn);
705 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
707 spte = rmap_next(kvm, rmapp, NULL);
710 BUG_ON(!(*spte & PT_PRESENT_MASK));
711 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
712 if (is_writable_pte(*spte)) {
713 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
716 spte = rmap_next(kvm, rmapp, spte);
718 if (write_protected) {
721 spte = rmap_next(kvm, rmapp, NULL);
722 pfn = spte_to_pfn(*spte);
723 kvm_set_pfn_dirty(pfn);
726 /* check for huge page mappings */
727 for (i = PT_DIRECTORY_LEVEL;
728 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
729 rmapp = gfn_to_rmap(kvm, gfn, i);
730 spte = rmap_next(kvm, rmapp, NULL);
733 BUG_ON(!(*spte & PT_PRESENT_MASK));
734 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
735 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
736 if (is_writable_pte(*spte)) {
737 rmap_remove(kvm, spte);
739 __set_spte(spte, shadow_trap_nonpresent_pte);
743 spte = rmap_next(kvm, rmapp, spte);
747 return write_protected;
750 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
754 int need_tlb_flush = 0;
756 while ((spte = rmap_next(kvm, rmapp, NULL))) {
757 BUG_ON(!(*spte & PT_PRESENT_MASK));
758 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
759 rmap_remove(kvm, spte);
760 __set_spte(spte, shadow_trap_nonpresent_pte);
763 return need_tlb_flush;
766 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
771 pte_t *ptep = (pte_t *)data;
774 WARN_ON(pte_huge(*ptep));
775 new_pfn = pte_pfn(*ptep);
776 spte = rmap_next(kvm, rmapp, NULL);
778 BUG_ON(!is_shadow_present_pte(*spte));
779 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
781 if (pte_write(*ptep)) {
782 rmap_remove(kvm, spte);
783 __set_spte(spte, shadow_trap_nonpresent_pte);
784 spte = rmap_next(kvm, rmapp, NULL);
786 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
787 new_spte |= (u64)new_pfn << PAGE_SHIFT;
789 new_spte &= ~PT_WRITABLE_MASK;
790 new_spte &= ~SPTE_HOST_WRITEABLE;
791 if (is_writable_pte(*spte))
792 kvm_set_pfn_dirty(spte_to_pfn(*spte));
793 __set_spte(spte, new_spte);
794 spte = rmap_next(kvm, rmapp, spte);
798 kvm_flush_remote_tlbs(kvm);
803 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
805 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
810 struct kvm_memslots *slots;
812 slots = rcu_dereference(kvm->memslots);
814 for (i = 0; i < slots->nmemslots; i++) {
815 struct kvm_memory_slot *memslot = &slots->memslots[i];
816 unsigned long start = memslot->userspace_addr;
819 end = start + (memslot->npages << PAGE_SHIFT);
820 if (hva >= start && hva < end) {
821 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
823 retval |= handler(kvm, &memslot->rmap[gfn_offset],
826 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
827 int idx = gfn_offset;
828 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
829 retval |= handler(kvm,
830 &memslot->lpage_info[j][idx].rmap_pde,
839 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
841 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
844 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
846 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
849 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
855 /* always return old for EPT */
856 if (!shadow_accessed_mask)
859 spte = rmap_next(kvm, rmapp, NULL);
863 BUG_ON(!(_spte & PT_PRESENT_MASK));
864 _young = _spte & PT_ACCESSED_MASK;
867 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
869 spte = rmap_next(kvm, rmapp, spte);
874 #define RMAP_RECYCLE_THRESHOLD 1000
876 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
878 unsigned long *rmapp;
879 struct kvm_mmu_page *sp;
881 sp = page_header(__pa(spte));
883 gfn = unalias_gfn(vcpu->kvm, gfn);
884 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
886 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
887 kvm_flush_remote_tlbs(vcpu->kvm);
890 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
892 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
896 static int is_empty_shadow_page(u64 *spt)
901 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
902 if (is_shadow_present_pte(*pos)) {
903 printk(KERN_ERR "%s: %p %llx\n", __func__,
911 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
913 ASSERT(is_empty_shadow_page(sp->spt));
915 __free_page(virt_to_page(sp->spt));
916 __free_page(virt_to_page(sp->gfns));
918 ++kvm->arch.n_free_mmu_pages;
921 static unsigned kvm_page_table_hashfn(gfn_t gfn)
923 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
926 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
929 struct kvm_mmu_page *sp;
931 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
932 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
933 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
934 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
935 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
936 INIT_LIST_HEAD(&sp->oos_link);
937 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
939 sp->parent_pte = parent_pte;
940 --vcpu->kvm->arch.n_free_mmu_pages;
944 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
945 struct kvm_mmu_page *sp, u64 *parent_pte)
947 struct kvm_pte_chain *pte_chain;
948 struct hlist_node *node;
953 if (!sp->multimapped) {
954 u64 *old = sp->parent_pte;
957 sp->parent_pte = parent_pte;
961 pte_chain = mmu_alloc_pte_chain(vcpu);
962 INIT_HLIST_HEAD(&sp->parent_ptes);
963 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
964 pte_chain->parent_ptes[0] = old;
966 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
967 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
969 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
970 if (!pte_chain->parent_ptes[i]) {
971 pte_chain->parent_ptes[i] = parent_pte;
975 pte_chain = mmu_alloc_pte_chain(vcpu);
977 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
978 pte_chain->parent_ptes[0] = parent_pte;
981 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
984 struct kvm_pte_chain *pte_chain;
985 struct hlist_node *node;
988 if (!sp->multimapped) {
989 BUG_ON(sp->parent_pte != parent_pte);
990 sp->parent_pte = NULL;
993 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
994 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
995 if (!pte_chain->parent_ptes[i])
997 if (pte_chain->parent_ptes[i] != parent_pte)
999 while (i + 1 < NR_PTE_CHAIN_ENTRIES
1000 && pte_chain->parent_ptes[i + 1]) {
1001 pte_chain->parent_ptes[i]
1002 = pte_chain->parent_ptes[i + 1];
1005 pte_chain->parent_ptes[i] = NULL;
1007 hlist_del(&pte_chain->link);
1008 mmu_free_pte_chain(pte_chain);
1009 if (hlist_empty(&sp->parent_ptes)) {
1010 sp->multimapped = 0;
1011 sp->parent_pte = NULL;
1020 static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1021 mmu_parent_walk_fn fn)
1023 struct kvm_pte_chain *pte_chain;
1024 struct hlist_node *node;
1025 struct kvm_mmu_page *parent_sp;
1028 if (!sp->multimapped && sp->parent_pte) {
1029 parent_sp = page_header(__pa(sp->parent_pte));
1030 fn(vcpu, parent_sp);
1031 mmu_parent_walk(vcpu, parent_sp, fn);
1034 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1035 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1036 if (!pte_chain->parent_ptes[i])
1038 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1039 fn(vcpu, parent_sp);
1040 mmu_parent_walk(vcpu, parent_sp, fn);
1044 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1047 struct kvm_mmu_page *sp = page_header(__pa(spte));
1049 index = spte - sp->spt;
1050 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1051 sp->unsync_children++;
1052 WARN_ON(!sp->unsync_children);
1055 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1057 struct kvm_pte_chain *pte_chain;
1058 struct hlist_node *node;
1061 if (!sp->parent_pte)
1064 if (!sp->multimapped) {
1065 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1069 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1070 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1071 if (!pte_chain->parent_ptes[i])
1073 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1077 static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1079 kvm_mmu_update_parents_unsync(sp);
1083 static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
1084 struct kvm_mmu_page *sp)
1086 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
1087 kvm_mmu_update_parents_unsync(sp);
1090 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1091 struct kvm_mmu_page *sp)
1095 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1096 sp->spt[i] = shadow_trap_nonpresent_pte;
1099 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1100 struct kvm_mmu_page *sp)
1105 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1109 #define KVM_PAGE_ARRAY_NR 16
1111 struct kvm_mmu_pages {
1112 struct mmu_page_and_offset {
1113 struct kvm_mmu_page *sp;
1115 } page[KVM_PAGE_ARRAY_NR];
1119 #define for_each_unsync_children(bitmap, idx) \
1120 for (idx = find_first_bit(bitmap, 512); \
1122 idx = find_next_bit(bitmap, 512, idx+1))
1124 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1130 for (i=0; i < pvec->nr; i++)
1131 if (pvec->page[i].sp == sp)
1134 pvec->page[pvec->nr].sp = sp;
1135 pvec->page[pvec->nr].idx = idx;
1137 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1140 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1141 struct kvm_mmu_pages *pvec)
1143 int i, ret, nr_unsync_leaf = 0;
1145 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1146 u64 ent = sp->spt[i];
1148 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1149 struct kvm_mmu_page *child;
1150 child = page_header(ent & PT64_BASE_ADDR_MASK);
1152 if (child->unsync_children) {
1153 if (mmu_pages_add(pvec, child, i))
1156 ret = __mmu_unsync_walk(child, pvec);
1158 __clear_bit(i, sp->unsync_child_bitmap);
1160 nr_unsync_leaf += ret;
1165 if (child->unsync) {
1167 if (mmu_pages_add(pvec, child, i))
1173 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1174 sp->unsync_children = 0;
1176 return nr_unsync_leaf;
1179 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1180 struct kvm_mmu_pages *pvec)
1182 if (!sp->unsync_children)
1185 mmu_pages_add(pvec, sp, 0);
1186 return __mmu_unsync_walk(sp, pvec);
1189 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1192 struct hlist_head *bucket;
1193 struct kvm_mmu_page *sp;
1194 struct hlist_node *node;
1196 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1197 index = kvm_page_table_hashfn(gfn);
1198 bucket = &kvm->arch.mmu_page_hash[index];
1199 hlist_for_each_entry(sp, node, bucket, hash_link)
1200 if (sp->gfn == gfn && !sp->role.direct
1201 && !sp->role.invalid) {
1202 pgprintk("%s: found role %x\n",
1203 __func__, sp->role.word);
1209 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1211 WARN_ON(!sp->unsync);
1213 --kvm->stat.mmu_unsync;
1216 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1218 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1220 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1221 kvm_mmu_zap_page(vcpu->kvm, sp);
1225 trace_kvm_mmu_sync_page(sp);
1226 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1227 kvm_flush_remote_tlbs(vcpu->kvm);
1228 kvm_unlink_unsync_page(vcpu->kvm, sp);
1229 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1230 kvm_mmu_zap_page(vcpu->kvm, sp);
1234 kvm_mmu_flush_tlb(vcpu);
1238 struct mmu_page_path {
1239 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1240 unsigned int idx[PT64_ROOT_LEVEL-1];
1243 #define for_each_sp(pvec, sp, parents, i) \
1244 for (i = mmu_pages_next(&pvec, &parents, -1), \
1245 sp = pvec.page[i].sp; \
1246 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1247 i = mmu_pages_next(&pvec, &parents, i))
1249 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1250 struct mmu_page_path *parents,
1255 for (n = i+1; n < pvec->nr; n++) {
1256 struct kvm_mmu_page *sp = pvec->page[n].sp;
1258 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1259 parents->idx[0] = pvec->page[n].idx;
1263 parents->parent[sp->role.level-2] = sp;
1264 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1270 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1272 struct kvm_mmu_page *sp;
1273 unsigned int level = 0;
1276 unsigned int idx = parents->idx[level];
1278 sp = parents->parent[level];
1282 --sp->unsync_children;
1283 WARN_ON((int)sp->unsync_children < 0);
1284 __clear_bit(idx, sp->unsync_child_bitmap);
1286 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1289 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1290 struct mmu_page_path *parents,
1291 struct kvm_mmu_pages *pvec)
1293 parents->parent[parent->role.level-1] = NULL;
1297 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1298 struct kvm_mmu_page *parent)
1301 struct kvm_mmu_page *sp;
1302 struct mmu_page_path parents;
1303 struct kvm_mmu_pages pages;
1305 kvm_mmu_pages_init(parent, &parents, &pages);
1306 while (mmu_unsync_walk(parent, &pages)) {
1309 for_each_sp(pages, sp, parents, i)
1310 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1313 kvm_flush_remote_tlbs(vcpu->kvm);
1315 for_each_sp(pages, sp, parents, i) {
1316 kvm_sync_page(vcpu, sp);
1317 mmu_pages_clear_parents(&parents);
1319 cond_resched_lock(&vcpu->kvm->mmu_lock);
1320 kvm_mmu_pages_init(parent, &parents, &pages);
1324 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1332 union kvm_mmu_page_role role;
1335 struct hlist_head *bucket;
1336 struct kvm_mmu_page *sp;
1337 struct hlist_node *node, *tmp;
1339 role = vcpu->arch.mmu.base_role;
1341 role.direct = direct;
1342 role.access = access;
1343 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1344 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1345 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1346 role.quadrant = quadrant;
1348 index = kvm_page_table_hashfn(gfn);
1349 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1350 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1351 if (sp->gfn == gfn) {
1353 if (kvm_sync_page(vcpu, sp))
1356 if (sp->role.word != role.word)
1359 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1360 if (sp->unsync_children) {
1361 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1362 kvm_mmu_mark_parents_unsync(vcpu, sp);
1364 trace_kvm_mmu_get_page(sp, false);
1367 ++vcpu->kvm->stat.mmu_cache_miss;
1368 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1373 hlist_add_head(&sp->hash_link, bucket);
1375 if (rmap_write_protect(vcpu->kvm, gfn))
1376 kvm_flush_remote_tlbs(vcpu->kvm);
1377 account_shadowed(vcpu->kvm, gfn);
1379 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1380 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1382 nonpaging_prefetch_page(vcpu, sp);
1383 trace_kvm_mmu_get_page(sp, true);
1387 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1388 struct kvm_vcpu *vcpu, u64 addr)
1390 iterator->addr = addr;
1391 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1392 iterator->level = vcpu->arch.mmu.shadow_root_level;
1393 if (iterator->level == PT32E_ROOT_LEVEL) {
1394 iterator->shadow_addr
1395 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1396 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1398 if (!iterator->shadow_addr)
1399 iterator->level = 0;
1403 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1405 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1408 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1409 if (is_large_pte(*iterator->sptep))
1412 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1413 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1417 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1419 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1423 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1424 struct kvm_mmu_page *sp)
1432 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1435 if (is_shadow_present_pte(ent)) {
1436 if (!is_last_spte(ent, sp->role.level)) {
1437 ent &= PT64_BASE_ADDR_MASK;
1438 mmu_page_remove_parent_pte(page_header(ent),
1441 if (is_large_pte(ent))
1443 rmap_remove(kvm, &pt[i]);
1446 pt[i] = shadow_trap_nonpresent_pte;
1450 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1452 mmu_page_remove_parent_pte(sp, parent_pte);
1455 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1458 struct kvm_vcpu *vcpu;
1460 kvm_for_each_vcpu(i, vcpu, kvm)
1461 vcpu->arch.last_pte_updated = NULL;
1464 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1468 while (sp->multimapped || sp->parent_pte) {
1469 if (!sp->multimapped)
1470 parent_pte = sp->parent_pte;
1472 struct kvm_pte_chain *chain;
1474 chain = container_of(sp->parent_ptes.first,
1475 struct kvm_pte_chain, link);
1476 parent_pte = chain->parent_ptes[0];
1478 BUG_ON(!parent_pte);
1479 kvm_mmu_put_page(sp, parent_pte);
1480 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1484 static int mmu_zap_unsync_children(struct kvm *kvm,
1485 struct kvm_mmu_page *parent)
1488 struct mmu_page_path parents;
1489 struct kvm_mmu_pages pages;
1491 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1494 kvm_mmu_pages_init(parent, &parents, &pages);
1495 while (mmu_unsync_walk(parent, &pages)) {
1496 struct kvm_mmu_page *sp;
1498 for_each_sp(pages, sp, parents, i) {
1499 kvm_mmu_zap_page(kvm, sp);
1500 mmu_pages_clear_parents(&parents);
1503 kvm_mmu_pages_init(parent, &parents, &pages);
1509 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1513 trace_kvm_mmu_zap_page(sp);
1514 ++kvm->stat.mmu_shadow_zapped;
1515 ret = mmu_zap_unsync_children(kvm, sp);
1516 kvm_mmu_page_unlink_children(kvm, sp);
1517 kvm_mmu_unlink_parents(kvm, sp);
1518 kvm_flush_remote_tlbs(kvm);
1519 if (!sp->role.invalid && !sp->role.direct)
1520 unaccount_shadowed(kvm, sp->gfn);
1522 kvm_unlink_unsync_page(kvm, sp);
1523 if (!sp->root_count) {
1524 hlist_del(&sp->hash_link);
1525 kvm_mmu_free_page(kvm, sp);
1527 sp->role.invalid = 1;
1528 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1529 kvm_reload_remote_mmus(kvm);
1531 kvm_mmu_reset_last_pte_updated(kvm);
1536 * Changing the number of mmu pages allocated to the vm
1537 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1539 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1543 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1544 used_pages = max(0, used_pages);
1547 * If we set the number of mmu pages to be smaller be than the
1548 * number of actived pages , we must to free some mmu pages before we
1552 if (used_pages > kvm_nr_mmu_pages) {
1553 while (used_pages > kvm_nr_mmu_pages) {
1554 struct kvm_mmu_page *page;
1556 page = container_of(kvm->arch.active_mmu_pages.prev,
1557 struct kvm_mmu_page, link);
1558 kvm_mmu_zap_page(kvm, page);
1561 kvm->arch.n_free_mmu_pages = 0;
1564 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1565 - kvm->arch.n_alloc_mmu_pages;
1567 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1570 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1573 struct hlist_head *bucket;
1574 struct kvm_mmu_page *sp;
1575 struct hlist_node *node, *n;
1578 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1580 index = kvm_page_table_hashfn(gfn);
1581 bucket = &kvm->arch.mmu_page_hash[index];
1582 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1583 if (sp->gfn == gfn && !sp->role.direct) {
1584 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1587 if (kvm_mmu_zap_page(kvm, sp))
1593 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1596 struct hlist_head *bucket;
1597 struct kvm_mmu_page *sp;
1598 struct hlist_node *node, *nn;
1600 index = kvm_page_table_hashfn(gfn);
1601 bucket = &kvm->arch.mmu_page_hash[index];
1602 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1603 if (sp->gfn == gfn && !sp->role.direct
1604 && !sp->role.invalid) {
1605 pgprintk("%s: zap %lx %x\n",
1606 __func__, gfn, sp->role.word);
1607 kvm_mmu_zap_page(kvm, sp);
1612 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1614 int slot = memslot_id(kvm, gfn);
1615 struct kvm_mmu_page *sp = page_header(__pa(pte));
1617 __set_bit(slot, sp->slot_bitmap);
1620 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1625 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1628 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1629 if (pt[i] == shadow_notrap_nonpresent_pte)
1630 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1634 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1638 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
1640 if (gpa == UNMAPPED_GVA)
1643 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1649 * The function is based on mtrr_type_lookup() in
1650 * arch/x86/kernel/cpu/mtrr/generic.c
1652 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1657 u8 prev_match, curr_match;
1658 int num_var_ranges = KVM_NR_VAR_MTRR;
1660 if (!mtrr_state->enabled)
1663 /* Make end inclusive end, instead of exclusive */
1666 /* Look in fixed ranges. Just return the type as per start */
1667 if (mtrr_state->have_fixed && (start < 0x100000)) {
1670 if (start < 0x80000) {
1672 idx += (start >> 16);
1673 return mtrr_state->fixed_ranges[idx];
1674 } else if (start < 0xC0000) {
1676 idx += ((start - 0x80000) >> 14);
1677 return mtrr_state->fixed_ranges[idx];
1678 } else if (start < 0x1000000) {
1680 idx += ((start - 0xC0000) >> 12);
1681 return mtrr_state->fixed_ranges[idx];
1686 * Look in variable ranges
1687 * Look of multiple ranges matching this address and pick type
1688 * as per MTRR precedence
1690 if (!(mtrr_state->enabled & 2))
1691 return mtrr_state->def_type;
1694 for (i = 0; i < num_var_ranges; ++i) {
1695 unsigned short start_state, end_state;
1697 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1700 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1701 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1702 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1703 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1705 start_state = ((start & mask) == (base & mask));
1706 end_state = ((end & mask) == (base & mask));
1707 if (start_state != end_state)
1710 if ((start & mask) != (base & mask))
1713 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1714 if (prev_match == 0xFF) {
1715 prev_match = curr_match;
1719 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1720 curr_match == MTRR_TYPE_UNCACHABLE)
1721 return MTRR_TYPE_UNCACHABLE;
1723 if ((prev_match == MTRR_TYPE_WRBACK &&
1724 curr_match == MTRR_TYPE_WRTHROUGH) ||
1725 (prev_match == MTRR_TYPE_WRTHROUGH &&
1726 curr_match == MTRR_TYPE_WRBACK)) {
1727 prev_match = MTRR_TYPE_WRTHROUGH;
1728 curr_match = MTRR_TYPE_WRTHROUGH;
1731 if (prev_match != curr_match)
1732 return MTRR_TYPE_UNCACHABLE;
1735 if (prev_match != 0xFF)
1738 return mtrr_state->def_type;
1741 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1745 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1746 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1747 if (mtrr == 0xfe || mtrr == 0xff)
1748 mtrr = MTRR_TYPE_WRBACK;
1751 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1753 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1756 struct hlist_head *bucket;
1757 struct kvm_mmu_page *s;
1758 struct hlist_node *node, *n;
1760 trace_kvm_mmu_unsync_page(sp);
1761 index = kvm_page_table_hashfn(sp->gfn);
1762 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1763 /* don't unsync if pagetable is shadowed with multiple roles */
1764 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1765 if (s->gfn != sp->gfn || s->role.direct)
1767 if (s->role.word != sp->role.word)
1770 ++vcpu->kvm->stat.mmu_unsync;
1773 kvm_mmu_mark_parents_unsync(vcpu, sp);
1775 mmu_convert_notrap(sp);
1779 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1782 struct kvm_mmu_page *shadow;
1784 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1786 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1790 if (can_unsync && oos_shadow)
1791 return kvm_unsync_page(vcpu, shadow);
1797 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1798 unsigned pte_access, int user_fault,
1799 int write_fault, int dirty, int level,
1800 gfn_t gfn, pfn_t pfn, bool speculative,
1801 bool can_unsync, bool reset_host_protection)
1807 * We don't set the accessed bit, since we sometimes want to see
1808 * whether the guest actually used the pte (in order to detect
1811 spte = shadow_base_present_pte | shadow_dirty_mask;
1813 spte |= shadow_accessed_mask;
1815 pte_access &= ~ACC_WRITE_MASK;
1816 if (pte_access & ACC_EXEC_MASK)
1817 spte |= shadow_x_mask;
1819 spte |= shadow_nx_mask;
1820 if (pte_access & ACC_USER_MASK)
1821 spte |= shadow_user_mask;
1822 if (level > PT_PAGE_TABLE_LEVEL)
1823 spte |= PT_PAGE_SIZE_MASK;
1825 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1826 kvm_is_mmio_pfn(pfn));
1828 if (reset_host_protection)
1829 spte |= SPTE_HOST_WRITEABLE;
1831 spte |= (u64)pfn << PAGE_SHIFT;
1833 if ((pte_access & ACC_WRITE_MASK)
1834 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1836 if (level > PT_PAGE_TABLE_LEVEL &&
1837 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1839 spte = shadow_trap_nonpresent_pte;
1843 spte |= PT_WRITABLE_MASK;
1846 * Optimization: for pte sync, if spte was writable the hash
1847 * lookup is unnecessary (and expensive). Write protection
1848 * is responsibility of mmu_get_page / kvm_sync_page.
1849 * Same reasoning can be applied to dirty page accounting.
1851 if (!can_unsync && is_writable_pte(*sptep))
1854 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1855 pgprintk("%s: found shadow page for %lx, marking ro\n",
1858 pte_access &= ~ACC_WRITE_MASK;
1859 if (is_writable_pte(spte))
1860 spte &= ~PT_WRITABLE_MASK;
1864 if (pte_access & ACC_WRITE_MASK)
1865 mark_page_dirty(vcpu->kvm, gfn);
1868 __set_spte(sptep, spte);
1872 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1873 unsigned pt_access, unsigned pte_access,
1874 int user_fault, int write_fault, int dirty,
1875 int *ptwrite, int level, gfn_t gfn,
1876 pfn_t pfn, bool speculative,
1877 bool reset_host_protection)
1879 int was_rmapped = 0;
1880 int was_writable = is_writable_pte(*sptep);
1883 pgprintk("%s: spte %llx access %x write_fault %d"
1884 " user_fault %d gfn %lx\n",
1885 __func__, *sptep, pt_access,
1886 write_fault, user_fault, gfn);
1888 if (is_rmap_spte(*sptep)) {
1890 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1891 * the parent of the now unreachable PTE.
1893 if (level > PT_PAGE_TABLE_LEVEL &&
1894 !is_large_pte(*sptep)) {
1895 struct kvm_mmu_page *child;
1898 child = page_header(pte & PT64_BASE_ADDR_MASK);
1899 mmu_page_remove_parent_pte(child, sptep);
1900 } else if (pfn != spte_to_pfn(*sptep)) {
1901 pgprintk("hfn old %lx new %lx\n",
1902 spte_to_pfn(*sptep), pfn);
1903 rmap_remove(vcpu->kvm, sptep);
1908 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1909 dirty, level, gfn, pfn, speculative, true,
1910 reset_host_protection)) {
1913 kvm_x86_ops->tlb_flush(vcpu);
1916 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1917 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1918 is_large_pte(*sptep)? "2MB" : "4kB",
1919 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1921 if (!was_rmapped && is_large_pte(*sptep))
1922 ++vcpu->kvm->stat.lpages;
1924 page_header_update_slot(vcpu->kvm, sptep, gfn);
1926 rmap_count = rmap_add(vcpu, sptep, gfn);
1927 kvm_release_pfn_clean(pfn);
1928 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1929 rmap_recycle(vcpu, sptep, gfn);
1932 kvm_release_pfn_dirty(pfn);
1934 kvm_release_pfn_clean(pfn);
1937 vcpu->arch.last_pte_updated = sptep;
1938 vcpu->arch.last_pte_gfn = gfn;
1942 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1946 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1947 int level, gfn_t gfn, pfn_t pfn)
1949 struct kvm_shadow_walk_iterator iterator;
1950 struct kvm_mmu_page *sp;
1954 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1955 if (iterator.level == level) {
1956 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1957 0, write, 1, &pt_write,
1958 level, gfn, pfn, false, true);
1959 ++vcpu->stat.pf_fixed;
1963 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1964 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1965 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1967 1, ACC_ALL, iterator.sptep);
1969 pgprintk("nonpaging_map: ENOMEM\n");
1970 kvm_release_pfn_clean(pfn);
1974 __set_spte(iterator.sptep,
1976 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1977 | shadow_user_mask | shadow_x_mask);
1983 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1988 unsigned long mmu_seq;
1990 level = mapping_level(vcpu, gfn);
1993 * This path builds a PAE pagetable - so we can map 2mb pages at
1994 * maximum. Therefore check if the level is larger than that.
1996 if (level > PT_DIRECTORY_LEVEL)
1997 level = PT_DIRECTORY_LEVEL;
1999 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2001 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2003 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2006 if (is_error_pfn(pfn)) {
2007 kvm_release_pfn_clean(pfn);
2011 spin_lock(&vcpu->kvm->mmu_lock);
2012 if (mmu_notifier_retry(vcpu, mmu_seq))
2014 kvm_mmu_free_some_pages(vcpu);
2015 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2016 spin_unlock(&vcpu->kvm->mmu_lock);
2022 spin_unlock(&vcpu->kvm->mmu_lock);
2023 kvm_release_pfn_clean(pfn);
2028 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2031 struct kvm_mmu_page *sp;
2033 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2035 spin_lock(&vcpu->kvm->mmu_lock);
2036 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2037 hpa_t root = vcpu->arch.mmu.root_hpa;
2039 sp = page_header(root);
2041 if (!sp->root_count && sp->role.invalid)
2042 kvm_mmu_zap_page(vcpu->kvm, sp);
2043 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2044 spin_unlock(&vcpu->kvm->mmu_lock);
2047 for (i = 0; i < 4; ++i) {
2048 hpa_t root = vcpu->arch.mmu.pae_root[i];
2051 root &= PT64_BASE_ADDR_MASK;
2052 sp = page_header(root);
2054 if (!sp->root_count && sp->role.invalid)
2055 kvm_mmu_zap_page(vcpu->kvm, sp);
2057 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2059 spin_unlock(&vcpu->kvm->mmu_lock);
2060 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2063 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2067 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2068 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2075 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2079 struct kvm_mmu_page *sp;
2083 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2085 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2086 hpa_t root = vcpu->arch.mmu.root_hpa;
2088 ASSERT(!VALID_PAGE(root));
2091 if (mmu_check_root(vcpu, root_gfn))
2093 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2094 PT64_ROOT_LEVEL, direct,
2096 root = __pa(sp->spt);
2098 vcpu->arch.mmu.root_hpa = root;
2101 direct = !is_paging(vcpu);
2104 for (i = 0; i < 4; ++i) {
2105 hpa_t root = vcpu->arch.mmu.pae_root[i];
2107 ASSERT(!VALID_PAGE(root));
2108 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2109 pdptr = kvm_pdptr_read(vcpu, i);
2110 if (!is_present_gpte(pdptr)) {
2111 vcpu->arch.mmu.pae_root[i] = 0;
2114 root_gfn = pdptr >> PAGE_SHIFT;
2115 } else if (vcpu->arch.mmu.root_level == 0)
2117 if (mmu_check_root(vcpu, root_gfn))
2119 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2120 PT32_ROOT_LEVEL, direct,
2122 root = __pa(sp->spt);
2124 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2126 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2130 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2133 struct kvm_mmu_page *sp;
2135 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2137 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2138 hpa_t root = vcpu->arch.mmu.root_hpa;
2139 sp = page_header(root);
2140 mmu_sync_children(vcpu, sp);
2143 for (i = 0; i < 4; ++i) {
2144 hpa_t root = vcpu->arch.mmu.pae_root[i];
2146 if (root && VALID_PAGE(root)) {
2147 root &= PT64_BASE_ADDR_MASK;
2148 sp = page_header(root);
2149 mmu_sync_children(vcpu, sp);
2154 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2156 spin_lock(&vcpu->kvm->mmu_lock);
2157 mmu_sync_roots(vcpu);
2158 spin_unlock(&vcpu->kvm->mmu_lock);
2161 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2166 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2172 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2173 r = mmu_topup_memory_caches(vcpu);
2178 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2180 gfn = gva >> PAGE_SHIFT;
2182 return nonpaging_map(vcpu, gva & PAGE_MASK,
2183 error_code & PFERR_WRITE_MASK, gfn);
2186 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2192 gfn_t gfn = gpa >> PAGE_SHIFT;
2193 unsigned long mmu_seq;
2196 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2198 r = mmu_topup_memory_caches(vcpu);
2202 level = mapping_level(vcpu, gfn);
2204 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2206 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2208 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2209 if (is_error_pfn(pfn)) {
2210 kvm_release_pfn_clean(pfn);
2213 spin_lock(&vcpu->kvm->mmu_lock);
2214 if (mmu_notifier_retry(vcpu, mmu_seq))
2216 kvm_mmu_free_some_pages(vcpu);
2217 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2219 spin_unlock(&vcpu->kvm->mmu_lock);
2224 spin_unlock(&vcpu->kvm->mmu_lock);
2225 kvm_release_pfn_clean(pfn);
2229 static void nonpaging_free(struct kvm_vcpu *vcpu)
2231 mmu_free_roots(vcpu);
2234 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2236 struct kvm_mmu *context = &vcpu->arch.mmu;
2238 context->new_cr3 = nonpaging_new_cr3;
2239 context->page_fault = nonpaging_page_fault;
2240 context->gva_to_gpa = nonpaging_gva_to_gpa;
2241 context->free = nonpaging_free;
2242 context->prefetch_page = nonpaging_prefetch_page;
2243 context->sync_page = nonpaging_sync_page;
2244 context->invlpg = nonpaging_invlpg;
2245 context->root_level = 0;
2246 context->shadow_root_level = PT32E_ROOT_LEVEL;
2247 context->root_hpa = INVALID_PAGE;
2251 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2253 ++vcpu->stat.tlb_flush;
2254 kvm_x86_ops->tlb_flush(vcpu);
2257 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2259 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2260 mmu_free_roots(vcpu);
2263 static void inject_page_fault(struct kvm_vcpu *vcpu,
2267 kvm_inject_page_fault(vcpu, addr, err_code);
2270 static void paging_free(struct kvm_vcpu *vcpu)
2272 nonpaging_free(vcpu);
2275 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2279 bit7 = (gpte >> 7) & 1;
2280 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2284 #include "paging_tmpl.h"
2288 #include "paging_tmpl.h"
2291 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2293 struct kvm_mmu *context = &vcpu->arch.mmu;
2294 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2295 u64 exb_bit_rsvd = 0;
2298 exb_bit_rsvd = rsvd_bits(63, 63);
2300 case PT32_ROOT_LEVEL:
2301 /* no rsvd bits for 2 level 4K page table entries */
2302 context->rsvd_bits_mask[0][1] = 0;
2303 context->rsvd_bits_mask[0][0] = 0;
2304 if (is_cpuid_PSE36())
2305 /* 36bits PSE 4MB page */
2306 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2308 /* 32 bits PSE 4MB page */
2309 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2310 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2312 case PT32E_ROOT_LEVEL:
2313 context->rsvd_bits_mask[0][2] =
2314 rsvd_bits(maxphyaddr, 63) |
2315 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2316 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2317 rsvd_bits(maxphyaddr, 62); /* PDE */
2318 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2319 rsvd_bits(maxphyaddr, 62); /* PTE */
2320 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2321 rsvd_bits(maxphyaddr, 62) |
2322 rsvd_bits(13, 20); /* large page */
2323 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2325 case PT64_ROOT_LEVEL:
2326 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2327 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2328 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2329 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2330 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2331 rsvd_bits(maxphyaddr, 51);
2332 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2333 rsvd_bits(maxphyaddr, 51);
2334 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2335 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2336 rsvd_bits(maxphyaddr, 51) |
2338 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2339 rsvd_bits(maxphyaddr, 51) |
2340 rsvd_bits(13, 20); /* large page */
2341 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2346 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2348 struct kvm_mmu *context = &vcpu->arch.mmu;
2350 ASSERT(is_pae(vcpu));
2351 context->new_cr3 = paging_new_cr3;
2352 context->page_fault = paging64_page_fault;
2353 context->gva_to_gpa = paging64_gva_to_gpa;
2354 context->prefetch_page = paging64_prefetch_page;
2355 context->sync_page = paging64_sync_page;
2356 context->invlpg = paging64_invlpg;
2357 context->free = paging_free;
2358 context->root_level = level;
2359 context->shadow_root_level = level;
2360 context->root_hpa = INVALID_PAGE;
2364 static int paging64_init_context(struct kvm_vcpu *vcpu)
2366 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2367 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2370 static int paging32_init_context(struct kvm_vcpu *vcpu)
2372 struct kvm_mmu *context = &vcpu->arch.mmu;
2374 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2375 context->new_cr3 = paging_new_cr3;
2376 context->page_fault = paging32_page_fault;
2377 context->gva_to_gpa = paging32_gva_to_gpa;
2378 context->free = paging_free;
2379 context->prefetch_page = paging32_prefetch_page;
2380 context->sync_page = paging32_sync_page;
2381 context->invlpg = paging32_invlpg;
2382 context->root_level = PT32_ROOT_LEVEL;
2383 context->shadow_root_level = PT32E_ROOT_LEVEL;
2384 context->root_hpa = INVALID_PAGE;
2388 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2390 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2391 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2394 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2396 struct kvm_mmu *context = &vcpu->arch.mmu;
2398 context->new_cr3 = nonpaging_new_cr3;
2399 context->page_fault = tdp_page_fault;
2400 context->free = nonpaging_free;
2401 context->prefetch_page = nonpaging_prefetch_page;
2402 context->sync_page = nonpaging_sync_page;
2403 context->invlpg = nonpaging_invlpg;
2404 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2405 context->root_hpa = INVALID_PAGE;
2407 if (!is_paging(vcpu)) {
2408 context->gva_to_gpa = nonpaging_gva_to_gpa;
2409 context->root_level = 0;
2410 } else if (is_long_mode(vcpu)) {
2411 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2412 context->gva_to_gpa = paging64_gva_to_gpa;
2413 context->root_level = PT64_ROOT_LEVEL;
2414 } else if (is_pae(vcpu)) {
2415 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2416 context->gva_to_gpa = paging64_gva_to_gpa;
2417 context->root_level = PT32E_ROOT_LEVEL;
2419 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2420 context->gva_to_gpa = paging32_gva_to_gpa;
2421 context->root_level = PT32_ROOT_LEVEL;
2427 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2432 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2434 if (!is_paging(vcpu))
2435 r = nonpaging_init_context(vcpu);
2436 else if (is_long_mode(vcpu))
2437 r = paging64_init_context(vcpu);
2438 else if (is_pae(vcpu))
2439 r = paging32E_init_context(vcpu);
2441 r = paging32_init_context(vcpu);
2443 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2448 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2450 vcpu->arch.update_pte.pfn = bad_pfn;
2453 return init_kvm_tdp_mmu(vcpu);
2455 return init_kvm_softmmu(vcpu);
2458 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2461 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2462 vcpu->arch.mmu.free(vcpu);
2463 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2467 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2469 destroy_kvm_mmu(vcpu);
2470 return init_kvm_mmu(vcpu);
2472 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2474 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2478 r = mmu_topup_memory_caches(vcpu);
2481 spin_lock(&vcpu->kvm->mmu_lock);
2482 kvm_mmu_free_some_pages(vcpu);
2483 r = mmu_alloc_roots(vcpu);
2484 mmu_sync_roots(vcpu);
2485 spin_unlock(&vcpu->kvm->mmu_lock);
2488 /* set_cr3() should ensure TLB has been flushed */
2489 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2493 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2495 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2497 mmu_free_roots(vcpu);
2500 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2501 struct kvm_mmu_page *sp,
2505 struct kvm_mmu_page *child;
2508 if (is_shadow_present_pte(pte)) {
2509 if (is_last_spte(pte, sp->role.level))
2510 rmap_remove(vcpu->kvm, spte);
2512 child = page_header(pte & PT64_BASE_ADDR_MASK);
2513 mmu_page_remove_parent_pte(child, spte);
2516 __set_spte(spte, shadow_trap_nonpresent_pte);
2517 if (is_large_pte(pte))
2518 --vcpu->kvm->stat.lpages;
2521 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2522 struct kvm_mmu_page *sp,
2526 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2527 ++vcpu->kvm->stat.mmu_pde_zapped;
2531 ++vcpu->kvm->stat.mmu_pte_updated;
2532 if (sp->role.glevels == PT32_ROOT_LEVEL)
2533 paging32_update_pte(vcpu, sp, spte, new);
2535 paging64_update_pte(vcpu, sp, spte, new);
2538 static bool need_remote_flush(u64 old, u64 new)
2540 if (!is_shadow_present_pte(old))
2542 if (!is_shadow_present_pte(new))
2544 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2546 old ^= PT64_NX_MASK;
2547 new ^= PT64_NX_MASK;
2548 return (old & ~new & PT64_PERM_MASK) != 0;
2551 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2553 if (need_remote_flush(old, new))
2554 kvm_flush_remote_tlbs(vcpu->kvm);
2556 kvm_mmu_flush_tlb(vcpu);
2559 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2561 u64 *spte = vcpu->arch.last_pte_updated;
2563 return !!(spte && (*spte & shadow_accessed_mask));
2566 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2567 const u8 *new, int bytes)
2574 if (bytes != 4 && bytes != 8)
2578 * Assume that the pte write on a page table of the same type
2579 * as the current vcpu paging mode. This is nearly always true
2580 * (might be false while changing modes). Note it is verified later
2584 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2585 if ((bytes == 4) && (gpa % 4 == 0)) {
2586 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2589 memcpy((void *)&gpte + (gpa % 8), new, 4);
2590 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2591 memcpy((void *)&gpte, new, 8);
2594 if ((bytes == 4) && (gpa % 4 == 0))
2595 memcpy((void *)&gpte, new, 4);
2597 if (!is_present_gpte(gpte))
2599 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2601 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2603 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2605 if (is_error_pfn(pfn)) {
2606 kvm_release_pfn_clean(pfn);
2609 vcpu->arch.update_pte.gfn = gfn;
2610 vcpu->arch.update_pte.pfn = pfn;
2613 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2615 u64 *spte = vcpu->arch.last_pte_updated;
2618 && vcpu->arch.last_pte_gfn == gfn
2619 && shadow_accessed_mask
2620 && !(*spte & shadow_accessed_mask)
2621 && is_shadow_present_pte(*spte))
2622 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2625 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2626 const u8 *new, int bytes,
2627 bool guest_initiated)
2629 gfn_t gfn = gpa >> PAGE_SHIFT;
2630 struct kvm_mmu_page *sp;
2631 struct hlist_node *node, *n;
2632 struct hlist_head *bucket;
2636 unsigned offset = offset_in_page(gpa);
2638 unsigned page_offset;
2639 unsigned misaligned;
2646 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2647 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
2648 spin_lock(&vcpu->kvm->mmu_lock);
2649 kvm_mmu_access_page(vcpu, gfn);
2650 kvm_mmu_free_some_pages(vcpu);
2651 ++vcpu->kvm->stat.mmu_pte_write;
2652 kvm_mmu_audit(vcpu, "pre pte write");
2653 if (guest_initiated) {
2654 if (gfn == vcpu->arch.last_pt_write_gfn
2655 && !last_updated_pte_accessed(vcpu)) {
2656 ++vcpu->arch.last_pt_write_count;
2657 if (vcpu->arch.last_pt_write_count >= 3)
2660 vcpu->arch.last_pt_write_gfn = gfn;
2661 vcpu->arch.last_pt_write_count = 1;
2662 vcpu->arch.last_pte_updated = NULL;
2665 index = kvm_page_table_hashfn(gfn);
2666 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2667 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2668 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2670 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
2671 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2672 misaligned |= bytes < 4;
2673 if (misaligned || flooded) {
2675 * Misaligned accesses are too much trouble to fix
2676 * up; also, they usually indicate a page is not used
2679 * If we're seeing too many writes to a page,
2680 * it may no longer be a page table, or we may be
2681 * forking, in which case it is better to unmap the
2684 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2685 gpa, bytes, sp->role.word);
2686 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2688 ++vcpu->kvm->stat.mmu_flooded;
2691 page_offset = offset;
2692 level = sp->role.level;
2694 if (sp->role.glevels == PT32_ROOT_LEVEL) {
2695 page_offset <<= 1; /* 32->64 */
2697 * A 32-bit pde maps 4MB while the shadow pdes map
2698 * only 2MB. So we need to double the offset again
2699 * and zap two pdes instead of one.
2701 if (level == PT32_ROOT_LEVEL) {
2702 page_offset &= ~7; /* kill rounding error */
2706 quadrant = page_offset >> PAGE_SHIFT;
2707 page_offset &= ~PAGE_MASK;
2708 if (quadrant != sp->role.quadrant)
2711 spte = &sp->spt[page_offset / sizeof(*spte)];
2712 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2714 r = kvm_read_guest_atomic(vcpu->kvm,
2715 gpa & ~(u64)(pte_size - 1),
2717 new = (const void *)&gentry;
2723 mmu_pte_write_zap_pte(vcpu, sp, spte);
2725 mmu_pte_write_new_pte(vcpu, sp, spte, new);
2726 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2730 kvm_mmu_audit(vcpu, "post pte write");
2731 spin_unlock(&vcpu->kvm->mmu_lock);
2732 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2733 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2734 vcpu->arch.update_pte.pfn = bad_pfn;
2738 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2746 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
2748 spin_lock(&vcpu->kvm->mmu_lock);
2749 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2750 spin_unlock(&vcpu->kvm->mmu_lock);
2753 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2755 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2757 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2758 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2759 struct kvm_mmu_page *sp;
2761 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2762 struct kvm_mmu_page, link);
2763 kvm_mmu_zap_page(vcpu->kvm, sp);
2764 ++vcpu->kvm->stat.mmu_recycled;
2768 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2771 enum emulation_result er;
2773 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2782 r = mmu_topup_memory_caches(vcpu);
2786 er = emulate_instruction(vcpu, cr2, error_code, 0);
2791 case EMULATE_DO_MMIO:
2792 ++vcpu->stat.mmio_exits;
2795 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2796 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
2797 vcpu->run->internal.ndata = 0;
2805 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2807 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2809 vcpu->arch.mmu.invlpg(vcpu, gva);
2810 kvm_mmu_flush_tlb(vcpu);
2811 ++vcpu->stat.invlpg;
2813 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2815 void kvm_enable_tdp(void)
2819 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2821 void kvm_disable_tdp(void)
2823 tdp_enabled = false;
2825 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2827 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2829 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2832 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2840 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2841 * Therefore we need to allocate shadow page tables in the first
2842 * 4GB of memory, which happens to fit the DMA32 zone.
2844 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2847 vcpu->arch.mmu.pae_root = page_address(page);
2848 for (i = 0; i < 4; ++i)
2849 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2854 free_mmu_pages(vcpu);
2858 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2861 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2863 return alloc_mmu_pages(vcpu);
2866 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2869 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2871 return init_kvm_mmu(vcpu);
2874 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2878 destroy_kvm_mmu(vcpu);
2879 free_mmu_pages(vcpu);
2880 mmu_free_memory_caches(vcpu);
2883 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2885 struct kvm_mmu_page *sp;
2887 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2891 if (!test_bit(slot, sp->slot_bitmap))
2895 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2897 if (pt[i] & PT_WRITABLE_MASK)
2898 pt[i] &= ~PT_WRITABLE_MASK;
2900 kvm_flush_remote_tlbs(kvm);
2903 void kvm_mmu_zap_all(struct kvm *kvm)
2905 struct kvm_mmu_page *sp, *node;
2907 spin_lock(&kvm->mmu_lock);
2908 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2909 if (kvm_mmu_zap_page(kvm, sp))
2910 node = container_of(kvm->arch.active_mmu_pages.next,
2911 struct kvm_mmu_page, link);
2912 spin_unlock(&kvm->mmu_lock);
2914 kvm_flush_remote_tlbs(kvm);
2917 static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
2919 struct kvm_mmu_page *page;
2921 page = container_of(kvm->arch.active_mmu_pages.prev,
2922 struct kvm_mmu_page, link);
2923 kvm_mmu_zap_page(kvm, page);
2926 static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2929 struct kvm *kvm_freed = NULL;
2930 int cache_count = 0;
2932 spin_lock(&kvm_lock);
2934 list_for_each_entry(kvm, &vm_list, vm_list) {
2937 idx = srcu_read_lock(&kvm->srcu);
2938 spin_lock(&kvm->mmu_lock);
2939 npages = kvm->arch.n_alloc_mmu_pages -
2940 kvm->arch.n_free_mmu_pages;
2941 cache_count += npages;
2942 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2943 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2949 spin_unlock(&kvm->mmu_lock);
2950 srcu_read_unlock(&kvm->srcu, idx);
2953 list_move_tail(&kvm_freed->vm_list, &vm_list);
2955 spin_unlock(&kvm_lock);
2960 static struct shrinker mmu_shrinker = {
2961 .shrink = mmu_shrink,
2962 .seeks = DEFAULT_SEEKS * 10,
2965 static void mmu_destroy_caches(void)
2967 if (pte_chain_cache)
2968 kmem_cache_destroy(pte_chain_cache);
2969 if (rmap_desc_cache)
2970 kmem_cache_destroy(rmap_desc_cache);
2971 if (mmu_page_header_cache)
2972 kmem_cache_destroy(mmu_page_header_cache);
2975 void kvm_mmu_module_exit(void)
2977 mmu_destroy_caches();
2978 unregister_shrinker(&mmu_shrinker);
2981 int kvm_mmu_module_init(void)
2983 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2984 sizeof(struct kvm_pte_chain),
2986 if (!pte_chain_cache)
2988 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2989 sizeof(struct kvm_rmap_desc),
2991 if (!rmap_desc_cache)
2994 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2995 sizeof(struct kvm_mmu_page),
2997 if (!mmu_page_header_cache)
3000 register_shrinker(&mmu_shrinker);
3005 mmu_destroy_caches();
3010 * Caculate mmu pages needed for kvm.
3012 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3015 unsigned int nr_mmu_pages;
3016 unsigned int nr_pages = 0;
3017 struct kvm_memslots *slots;
3019 slots = rcu_dereference(kvm->memslots);
3020 for (i = 0; i < slots->nmemslots; i++)
3021 nr_pages += slots->memslots[i].npages;
3023 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3024 nr_mmu_pages = max(nr_mmu_pages,
3025 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3027 return nr_mmu_pages;
3030 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3033 if (len > buffer->len)
3038 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3043 ret = pv_mmu_peek_buffer(buffer, len);
3048 buffer->processed += len;
3052 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3053 gpa_t addr, gpa_t value)
3058 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3061 r = mmu_topup_memory_caches(vcpu);
3065 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3071 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3073 kvm_set_cr3(vcpu, vcpu->arch.cr3);
3077 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3079 spin_lock(&vcpu->kvm->mmu_lock);
3080 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3081 spin_unlock(&vcpu->kvm->mmu_lock);
3085 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3086 struct kvm_pv_mmu_op_buffer *buffer)
3088 struct kvm_mmu_op_header *header;
3090 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3093 switch (header->op) {
3094 case KVM_MMU_OP_WRITE_PTE: {
3095 struct kvm_mmu_op_write_pte *wpte;
3097 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3100 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3103 case KVM_MMU_OP_FLUSH_TLB: {
3104 struct kvm_mmu_op_flush_tlb *ftlb;
3106 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3109 return kvm_pv_mmu_flush_tlb(vcpu);
3111 case KVM_MMU_OP_RELEASE_PT: {
3112 struct kvm_mmu_op_release_pt *rpt;
3114 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3117 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3123 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3124 gpa_t addr, unsigned long *ret)
3127 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3129 buffer->ptr = buffer->buf;
3130 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3131 buffer->processed = 0;
3133 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3137 while (buffer->len) {
3138 r = kvm_pv_mmu_op_one(vcpu, buffer);
3147 *ret = buffer->processed;
3151 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3153 struct kvm_shadow_walk_iterator iterator;
3156 spin_lock(&vcpu->kvm->mmu_lock);
3157 for_each_shadow_entry(vcpu, addr, iterator) {
3158 sptes[iterator.level-1] = *iterator.sptep;
3160 if (!is_shadow_present_pte(*iterator.sptep))
3163 spin_unlock(&vcpu->kvm->mmu_lock);
3167 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3171 static const char *audit_msg;
3173 static gva_t canonicalize(gva_t gva)
3175 #ifdef CONFIG_X86_64
3176 gva = (long long)(gva << 16) >> 16;
3182 typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp,
3185 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3190 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3191 u64 ent = sp->spt[i];
3193 if (is_shadow_present_pte(ent)) {
3194 if (!is_last_spte(ent, sp->role.level)) {
3195 struct kvm_mmu_page *child;
3196 child = page_header(ent & PT64_BASE_ADDR_MASK);
3197 __mmu_spte_walk(kvm, child, fn);
3199 fn(kvm, sp, &sp->spt[i]);
3204 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3207 struct kvm_mmu_page *sp;
3209 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3211 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3212 hpa_t root = vcpu->arch.mmu.root_hpa;
3213 sp = page_header(root);
3214 __mmu_spte_walk(vcpu->kvm, sp, fn);
3217 for (i = 0; i < 4; ++i) {
3218 hpa_t root = vcpu->arch.mmu.pae_root[i];
3220 if (root && VALID_PAGE(root)) {
3221 root &= PT64_BASE_ADDR_MASK;
3222 sp = page_header(root);
3223 __mmu_spte_walk(vcpu->kvm, sp, fn);
3229 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3230 gva_t va, int level)
3232 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3234 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3236 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3239 if (ent == shadow_trap_nonpresent_pte)
3242 va = canonicalize(va);
3243 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3244 audit_mappings_page(vcpu, ent, va, level - 1);
3246 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
3247 gfn_t gfn = gpa >> PAGE_SHIFT;
3248 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3249 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3251 if (is_error_pfn(pfn)) {
3252 kvm_release_pfn_clean(pfn);
3256 if (is_shadow_present_pte(ent)
3257 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3258 printk(KERN_ERR "xx audit error: (%s) levels %d"
3259 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3260 audit_msg, vcpu->arch.mmu.root_level,
3262 is_shadow_present_pte(ent));
3263 else if (ent == shadow_notrap_nonpresent_pte
3264 && !is_error_hpa(hpa))
3265 printk(KERN_ERR "audit: (%s) notrap shadow,"
3266 " valid guest gva %lx\n", audit_msg, va);
3267 kvm_release_pfn_clean(pfn);
3273 static void audit_mappings(struct kvm_vcpu *vcpu)
3277 if (vcpu->arch.mmu.root_level == 4)
3278 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3280 for (i = 0; i < 4; ++i)
3281 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3282 audit_mappings_page(vcpu,
3283 vcpu->arch.mmu.pae_root[i],
3288 static int count_rmaps(struct kvm_vcpu *vcpu)
3293 idx = srcu_read_lock(&kvm->srcu);
3294 slots = rcu_dereference(kvm->memslots);
3295 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3296 struct kvm_memory_slot *m = &slots->memslots[i];
3297 struct kvm_rmap_desc *d;
3299 for (j = 0; j < m->npages; ++j) {
3300 unsigned long *rmapp = &m->rmap[j];
3304 if (!(*rmapp & 1)) {
3308 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3310 for (k = 0; k < RMAP_EXT; ++k)
3319 srcu_read_unlock(&kvm->srcu, idx);
3323 void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep)
3325 unsigned long *rmapp;
3326 struct kvm_mmu_page *rev_sp;
3329 if (*sptep & PT_WRITABLE_MASK) {
3330 rev_sp = page_header(__pa(sptep));
3331 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3333 if (!gfn_to_memslot(kvm, gfn)) {
3334 if (!printk_ratelimit())
3336 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3338 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3339 audit_msg, sptep - rev_sp->spt,
3345 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3346 is_large_pte(*sptep));
3348 if (!printk_ratelimit())
3350 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3358 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3360 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3363 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3365 struct kvm_mmu_page *sp;
3368 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3371 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3374 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3377 if (!(ent & PT_PRESENT_MASK))
3379 if (!(ent & PT_WRITABLE_MASK))
3381 inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]);
3387 static void audit_rmap(struct kvm_vcpu *vcpu)
3389 check_writable_mappings_rmap(vcpu);
3393 static void audit_write_protection(struct kvm_vcpu *vcpu)
3395 struct kvm_mmu_page *sp;
3396 struct kvm_memory_slot *slot;
3397 unsigned long *rmapp;
3401 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3402 if (sp->role.direct)
3407 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3408 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3409 rmapp = &slot->rmap[gfn - slot->base_gfn];
3411 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3413 if (*spte & PT_WRITABLE_MASK)
3414 printk(KERN_ERR "%s: (%s) shadow page has "
3415 "writable mappings: gfn %lx role %x\n",
3416 __func__, audit_msg, sp->gfn,
3418 spte = rmap_next(vcpu->kvm, rmapp, spte);
3423 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3430 audit_write_protection(vcpu);
3431 if (strcmp("pre pte write", audit_msg) != 0)
3432 audit_mappings(vcpu);
3433 audit_writable_sptes_have_rmaps(vcpu);