KVM: switch vcpu context to use SRCU
[safe/jmp/linux-2.6] / arch / x86 / kvm / mmu.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * This module enables machines with Intel VT-x extensions to run virtual
5  * machines without emulation or binary translation.
6  *
7  * MMU support
8  *
9  * Copyright (C) 2006 Qumranet, Inc.
10  *
11  * Authors:
12  *   Yaniv Kamay  <yaniv@qumranet.com>
13  *   Avi Kivity   <avi@qumranet.com>
14  *
15  * This work is licensed under the terms of the GNU GPL, version 2.  See
16  * the COPYING file in the top-level directory.
17  *
18  */
19
20 #include "mmu.h"
21 #include "kvm_cache_regs.h"
22
23 #include <linux/kvm_host.h>
24 #include <linux/types.h>
25 #include <linux/string.h>
26 #include <linux/mm.h>
27 #include <linux/highmem.h>
28 #include <linux/module.h>
29 #include <linux/swap.h>
30 #include <linux/hugetlb.h>
31 #include <linux/compiler.h>
32 #include <linux/srcu.h>
33
34 #include <asm/page.h>
35 #include <asm/cmpxchg.h>
36 #include <asm/io.h>
37 #include <asm/vmx.h>
38
39 /*
40  * When setting this variable to true it enables Two-Dimensional-Paging
41  * where the hardware walks 2 page tables:
42  * 1. the guest-virtual to guest-physical
43  * 2. while doing 1. it walks guest-physical to host-physical
44  * If the hardware supports that we don't need to do shadow paging.
45  */
46 bool tdp_enabled = false;
47
48 #undef MMU_DEBUG
49
50 #undef AUDIT
51
52 #ifdef AUDIT
53 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
54 #else
55 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
56 #endif
57
58 #ifdef MMU_DEBUG
59
60 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
61 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
62
63 #else
64
65 #define pgprintk(x...) do { } while (0)
66 #define rmap_printk(x...) do { } while (0)
67
68 #endif
69
70 #if defined(MMU_DEBUG) || defined(AUDIT)
71 static int dbg = 0;
72 module_param(dbg, bool, 0644);
73 #endif
74
75 static int oos_shadow = 1;
76 module_param(oos_shadow, bool, 0644);
77
78 #ifndef MMU_DEBUG
79 #define ASSERT(x) do { } while (0)
80 #else
81 #define ASSERT(x)                                                       \
82         if (!(x)) {                                                     \
83                 printk(KERN_WARNING "assertion failed %s:%d: %s\n",     \
84                        __FILE__, __LINE__, #x);                         \
85         }
86 #endif
87
88 #define PT_FIRST_AVAIL_BITS_SHIFT 9
89 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
90
91 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
92
93 #define PT64_LEVEL_BITS 9
94
95 #define PT64_LEVEL_SHIFT(level) \
96                 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
97
98 #define PT64_LEVEL_MASK(level) \
99                 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
100
101 #define PT64_INDEX(address, level)\
102         (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
103
104
105 #define PT32_LEVEL_BITS 10
106
107 #define PT32_LEVEL_SHIFT(level) \
108                 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
109
110 #define PT32_LEVEL_MASK(level) \
111                 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
112 #define PT32_LVL_OFFSET_MASK(level) \
113         (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
114                                                 * PT32_LEVEL_BITS))) - 1))
115
116 #define PT32_INDEX(address, level)\
117         (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
118
119
120 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
121 #define PT64_DIR_BASE_ADDR_MASK \
122         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
123 #define PT64_LVL_ADDR_MASK(level) \
124         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
125                                                 * PT64_LEVEL_BITS))) - 1))
126 #define PT64_LVL_OFFSET_MASK(level) \
127         (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
128                                                 * PT64_LEVEL_BITS))) - 1))
129
130 #define PT32_BASE_ADDR_MASK PAGE_MASK
131 #define PT32_DIR_BASE_ADDR_MASK \
132         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
133 #define PT32_LVL_ADDR_MASK(level) \
134         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
135                                             * PT32_LEVEL_BITS))) - 1))
136
137 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
138                         | PT64_NX_MASK)
139
140 #define PFERR_PRESENT_MASK (1U << 0)
141 #define PFERR_WRITE_MASK (1U << 1)
142 #define PFERR_USER_MASK (1U << 2)
143 #define PFERR_RSVD_MASK (1U << 3)
144 #define PFERR_FETCH_MASK (1U << 4)
145
146 #define PT_PDPE_LEVEL 3
147 #define PT_DIRECTORY_LEVEL 2
148 #define PT_PAGE_TABLE_LEVEL 1
149
150 #define RMAP_EXT 4
151
152 #define ACC_EXEC_MASK    1
153 #define ACC_WRITE_MASK   PT_WRITABLE_MASK
154 #define ACC_USER_MASK    PT_USER_MASK
155 #define ACC_ALL          (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
156
157 #define CREATE_TRACE_POINTS
158 #include "mmutrace.h"
159
160 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
161
162 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
163
164 struct kvm_rmap_desc {
165         u64 *sptes[RMAP_EXT];
166         struct kvm_rmap_desc *more;
167 };
168
169 struct kvm_shadow_walk_iterator {
170         u64 addr;
171         hpa_t shadow_addr;
172         int level;
173         u64 *sptep;
174         unsigned index;
175 };
176
177 #define for_each_shadow_entry(_vcpu, _addr, _walker)    \
178         for (shadow_walk_init(&(_walker), _vcpu, _addr);        \
179              shadow_walk_okay(&(_walker));                      \
180              shadow_walk_next(&(_walker)))
181
182
183 struct kvm_unsync_walk {
184         int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
185 };
186
187 typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
188
189 static struct kmem_cache *pte_chain_cache;
190 static struct kmem_cache *rmap_desc_cache;
191 static struct kmem_cache *mmu_page_header_cache;
192
193 static u64 __read_mostly shadow_trap_nonpresent_pte;
194 static u64 __read_mostly shadow_notrap_nonpresent_pte;
195 static u64 __read_mostly shadow_base_present_pte;
196 static u64 __read_mostly shadow_nx_mask;
197 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
198 static u64 __read_mostly shadow_user_mask;
199 static u64 __read_mostly shadow_accessed_mask;
200 static u64 __read_mostly shadow_dirty_mask;
201
202 static inline u64 rsvd_bits(int s, int e)
203 {
204         return ((1ULL << (e - s + 1)) - 1) << s;
205 }
206
207 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
208 {
209         shadow_trap_nonpresent_pte = trap_pte;
210         shadow_notrap_nonpresent_pte = notrap_pte;
211 }
212 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
213
214 void kvm_mmu_set_base_ptes(u64 base_pte)
215 {
216         shadow_base_present_pte = base_pte;
217 }
218 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
219
220 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
221                 u64 dirty_mask, u64 nx_mask, u64 x_mask)
222 {
223         shadow_user_mask = user_mask;
224         shadow_accessed_mask = accessed_mask;
225         shadow_dirty_mask = dirty_mask;
226         shadow_nx_mask = nx_mask;
227         shadow_x_mask = x_mask;
228 }
229 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
230
231 static int is_write_protection(struct kvm_vcpu *vcpu)
232 {
233         return vcpu->arch.cr0 & X86_CR0_WP;
234 }
235
236 static int is_cpuid_PSE36(void)
237 {
238         return 1;
239 }
240
241 static int is_nx(struct kvm_vcpu *vcpu)
242 {
243         return vcpu->arch.shadow_efer & EFER_NX;
244 }
245
246 static int is_shadow_present_pte(u64 pte)
247 {
248         return pte != shadow_trap_nonpresent_pte
249                 && pte != shadow_notrap_nonpresent_pte;
250 }
251
252 static int is_large_pte(u64 pte)
253 {
254         return pte & PT_PAGE_SIZE_MASK;
255 }
256
257 static int is_writeble_pte(unsigned long pte)
258 {
259         return pte & PT_WRITABLE_MASK;
260 }
261
262 static int is_dirty_gpte(unsigned long pte)
263 {
264         return pte & PT_DIRTY_MASK;
265 }
266
267 static int is_rmap_spte(u64 pte)
268 {
269         return is_shadow_present_pte(pte);
270 }
271
272 static int is_last_spte(u64 pte, int level)
273 {
274         if (level == PT_PAGE_TABLE_LEVEL)
275                 return 1;
276         if (is_large_pte(pte))
277                 return 1;
278         return 0;
279 }
280
281 static pfn_t spte_to_pfn(u64 pte)
282 {
283         return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
284 }
285
286 static gfn_t pse36_gfn_delta(u32 gpte)
287 {
288         int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
289
290         return (gpte & PT32_DIR_PSE36_MASK) << shift;
291 }
292
293 static void __set_spte(u64 *sptep, u64 spte)
294 {
295 #ifdef CONFIG_X86_64
296         set_64bit((unsigned long *)sptep, spte);
297 #else
298         set_64bit((unsigned long long *)sptep, spte);
299 #endif
300 }
301
302 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
303                                   struct kmem_cache *base_cache, int min)
304 {
305         void *obj;
306
307         if (cache->nobjs >= min)
308                 return 0;
309         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
310                 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
311                 if (!obj)
312                         return -ENOMEM;
313                 cache->objects[cache->nobjs++] = obj;
314         }
315         return 0;
316 }
317
318 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
319 {
320         while (mc->nobjs)
321                 kfree(mc->objects[--mc->nobjs]);
322 }
323
324 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
325                                        int min)
326 {
327         struct page *page;
328
329         if (cache->nobjs >= min)
330                 return 0;
331         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
332                 page = alloc_page(GFP_KERNEL);
333                 if (!page)
334                         return -ENOMEM;
335                 set_page_private(page, 0);
336                 cache->objects[cache->nobjs++] = page_address(page);
337         }
338         return 0;
339 }
340
341 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
342 {
343         while (mc->nobjs)
344                 free_page((unsigned long)mc->objects[--mc->nobjs]);
345 }
346
347 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
348 {
349         int r;
350
351         r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
352                                    pte_chain_cache, 4);
353         if (r)
354                 goto out;
355         r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
356                                    rmap_desc_cache, 4);
357         if (r)
358                 goto out;
359         r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
360         if (r)
361                 goto out;
362         r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
363                                    mmu_page_header_cache, 4);
364 out:
365         return r;
366 }
367
368 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
369 {
370         mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
371         mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
372         mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
373         mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
374 }
375
376 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
377                                     size_t size)
378 {
379         void *p;
380
381         BUG_ON(!mc->nobjs);
382         p = mc->objects[--mc->nobjs];
383         return p;
384 }
385
386 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
387 {
388         return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
389                                       sizeof(struct kvm_pte_chain));
390 }
391
392 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
393 {
394         kfree(pc);
395 }
396
397 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
398 {
399         return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
400                                       sizeof(struct kvm_rmap_desc));
401 }
402
403 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
404 {
405         kfree(rd);
406 }
407
408 /*
409  * Return the pointer to the largepage write count for a given
410  * gfn, handling slots that are not large page aligned.
411  */
412 static int *slot_largepage_idx(gfn_t gfn,
413                                struct kvm_memory_slot *slot,
414                                int level)
415 {
416         unsigned long idx;
417
418         idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
419               (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
420         return &slot->lpage_info[level - 2][idx].write_count;
421 }
422
423 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
424 {
425         struct kvm_memory_slot *slot;
426         int *write_count;
427         int i;
428
429         gfn = unalias_gfn(kvm, gfn);
430
431         slot = gfn_to_memslot_unaliased(kvm, gfn);
432         for (i = PT_DIRECTORY_LEVEL;
433              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
434                 write_count   = slot_largepage_idx(gfn, slot, i);
435                 *write_count += 1;
436         }
437 }
438
439 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
440 {
441         struct kvm_memory_slot *slot;
442         int *write_count;
443         int i;
444
445         gfn = unalias_gfn(kvm, gfn);
446         for (i = PT_DIRECTORY_LEVEL;
447              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
448                 slot          = gfn_to_memslot_unaliased(kvm, gfn);
449                 write_count   = slot_largepage_idx(gfn, slot, i);
450                 *write_count -= 1;
451                 WARN_ON(*write_count < 0);
452         }
453 }
454
455 static int has_wrprotected_page(struct kvm *kvm,
456                                 gfn_t gfn,
457                                 int level)
458 {
459         struct kvm_memory_slot *slot;
460         int *largepage_idx;
461
462         gfn = unalias_gfn(kvm, gfn);
463         slot = gfn_to_memslot_unaliased(kvm, gfn);
464         if (slot) {
465                 largepage_idx = slot_largepage_idx(gfn, slot, level);
466                 return *largepage_idx;
467         }
468
469         return 1;
470 }
471
472 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
473 {
474         unsigned long page_size = PAGE_SIZE;
475         struct vm_area_struct *vma;
476         unsigned long addr;
477         int i, ret = 0;
478
479         addr = gfn_to_hva(kvm, gfn);
480         if (kvm_is_error_hva(addr))
481                 return PT_PAGE_TABLE_LEVEL;
482
483         down_read(&current->mm->mmap_sem);
484         vma = find_vma(current->mm, addr);
485         if (!vma)
486                 goto out;
487
488         page_size = vma_kernel_pagesize(vma);
489
490 out:
491         up_read(&current->mm->mmap_sem);
492
493         for (i = PT_PAGE_TABLE_LEVEL;
494              i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
495                 if (page_size >= KVM_HPAGE_SIZE(i))
496                         ret = i;
497                 else
498                         break;
499         }
500
501         return ret;
502 }
503
504 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
505 {
506         struct kvm_memory_slot *slot;
507         int host_level;
508         int level = PT_PAGE_TABLE_LEVEL;
509
510         slot = gfn_to_memslot(vcpu->kvm, large_gfn);
511         if (slot && slot->dirty_bitmap)
512                 return PT_PAGE_TABLE_LEVEL;
513
514         host_level = host_mapping_level(vcpu->kvm, large_gfn);
515
516         if (host_level == PT_PAGE_TABLE_LEVEL)
517                 return host_level;
518
519         for (level = PT_DIRECTORY_LEVEL; level <= host_level; ++level)
520                 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
521                         break;
522
523         return level - 1;
524 }
525
526 /*
527  * Take gfn and return the reverse mapping to it.
528  * Note: gfn must be unaliased before this function get called
529  */
530
531 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
532 {
533         struct kvm_memory_slot *slot;
534         unsigned long idx;
535
536         slot = gfn_to_memslot(kvm, gfn);
537         if (likely(level == PT_PAGE_TABLE_LEVEL))
538                 return &slot->rmap[gfn - slot->base_gfn];
539
540         idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
541                 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
542
543         return &slot->lpage_info[level - 2][idx].rmap_pde;
544 }
545
546 /*
547  * Reverse mapping data structures:
548  *
549  * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
550  * that points to page_address(page).
551  *
552  * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
553  * containing more mappings.
554  *
555  * Returns the number of rmap entries before the spte was added or zero if
556  * the spte was not added.
557  *
558  */
559 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
560 {
561         struct kvm_mmu_page *sp;
562         struct kvm_rmap_desc *desc;
563         unsigned long *rmapp;
564         int i, count = 0;
565
566         if (!is_rmap_spte(*spte))
567                 return count;
568         gfn = unalias_gfn(vcpu->kvm, gfn);
569         sp = page_header(__pa(spte));
570         sp->gfns[spte - sp->spt] = gfn;
571         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
572         if (!*rmapp) {
573                 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
574                 *rmapp = (unsigned long)spte;
575         } else if (!(*rmapp & 1)) {
576                 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
577                 desc = mmu_alloc_rmap_desc(vcpu);
578                 desc->sptes[0] = (u64 *)*rmapp;
579                 desc->sptes[1] = spte;
580                 *rmapp = (unsigned long)desc | 1;
581         } else {
582                 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
583                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
584                 while (desc->sptes[RMAP_EXT-1] && desc->more) {
585                         desc = desc->more;
586                         count += RMAP_EXT;
587                 }
588                 if (desc->sptes[RMAP_EXT-1]) {
589                         desc->more = mmu_alloc_rmap_desc(vcpu);
590                         desc = desc->more;
591                 }
592                 for (i = 0; desc->sptes[i]; ++i)
593                         ;
594                 desc->sptes[i] = spte;
595         }
596         return count;
597 }
598
599 static void rmap_desc_remove_entry(unsigned long *rmapp,
600                                    struct kvm_rmap_desc *desc,
601                                    int i,
602                                    struct kvm_rmap_desc *prev_desc)
603 {
604         int j;
605
606         for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
607                 ;
608         desc->sptes[i] = desc->sptes[j];
609         desc->sptes[j] = NULL;
610         if (j != 0)
611                 return;
612         if (!prev_desc && !desc->more)
613                 *rmapp = (unsigned long)desc->sptes[0];
614         else
615                 if (prev_desc)
616                         prev_desc->more = desc->more;
617                 else
618                         *rmapp = (unsigned long)desc->more | 1;
619         mmu_free_rmap_desc(desc);
620 }
621
622 static void rmap_remove(struct kvm *kvm, u64 *spte)
623 {
624         struct kvm_rmap_desc *desc;
625         struct kvm_rmap_desc *prev_desc;
626         struct kvm_mmu_page *sp;
627         pfn_t pfn;
628         unsigned long *rmapp;
629         int i;
630
631         if (!is_rmap_spte(*spte))
632                 return;
633         sp = page_header(__pa(spte));
634         pfn = spte_to_pfn(*spte);
635         if (*spte & shadow_accessed_mask)
636                 kvm_set_pfn_accessed(pfn);
637         if (is_writeble_pte(*spte))
638                 kvm_set_pfn_dirty(pfn);
639         rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
640         if (!*rmapp) {
641                 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
642                 BUG();
643         } else if (!(*rmapp & 1)) {
644                 rmap_printk("rmap_remove:  %p %llx 1->0\n", spte, *spte);
645                 if ((u64 *)*rmapp != spte) {
646                         printk(KERN_ERR "rmap_remove:  %p %llx 1->BUG\n",
647                                spte, *spte);
648                         BUG();
649                 }
650                 *rmapp = 0;
651         } else {
652                 rmap_printk("rmap_remove:  %p %llx many->many\n", spte, *spte);
653                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
654                 prev_desc = NULL;
655                 while (desc) {
656                         for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
657                                 if (desc->sptes[i] == spte) {
658                                         rmap_desc_remove_entry(rmapp,
659                                                                desc, i,
660                                                                prev_desc);
661                                         return;
662                                 }
663                         prev_desc = desc;
664                         desc = desc->more;
665                 }
666                 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
667                 BUG();
668         }
669 }
670
671 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
672 {
673         struct kvm_rmap_desc *desc;
674         struct kvm_rmap_desc *prev_desc;
675         u64 *prev_spte;
676         int i;
677
678         if (!*rmapp)
679                 return NULL;
680         else if (!(*rmapp & 1)) {
681                 if (!spte)
682                         return (u64 *)*rmapp;
683                 return NULL;
684         }
685         desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
686         prev_desc = NULL;
687         prev_spte = NULL;
688         while (desc) {
689                 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
690                         if (prev_spte == spte)
691                                 return desc->sptes[i];
692                         prev_spte = desc->sptes[i];
693                 }
694                 desc = desc->more;
695         }
696         return NULL;
697 }
698
699 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
700 {
701         unsigned long *rmapp;
702         u64 *spte;
703         int i, write_protected = 0;
704
705         gfn = unalias_gfn(kvm, gfn);
706         rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
707
708         spte = rmap_next(kvm, rmapp, NULL);
709         while (spte) {
710                 BUG_ON(!spte);
711                 BUG_ON(!(*spte & PT_PRESENT_MASK));
712                 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
713                 if (is_writeble_pte(*spte)) {
714                         __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
715                         write_protected = 1;
716                 }
717                 spte = rmap_next(kvm, rmapp, spte);
718         }
719         if (write_protected) {
720                 pfn_t pfn;
721
722                 spte = rmap_next(kvm, rmapp, NULL);
723                 pfn = spte_to_pfn(*spte);
724                 kvm_set_pfn_dirty(pfn);
725         }
726
727         /* check for huge page mappings */
728         for (i = PT_DIRECTORY_LEVEL;
729              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
730                 rmapp = gfn_to_rmap(kvm, gfn, i);
731                 spte = rmap_next(kvm, rmapp, NULL);
732                 while (spte) {
733                         BUG_ON(!spte);
734                         BUG_ON(!(*spte & PT_PRESENT_MASK));
735                         BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
736                         pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
737                         if (is_writeble_pte(*spte)) {
738                                 rmap_remove(kvm, spte);
739                                 --kvm->stat.lpages;
740                                 __set_spte(spte, shadow_trap_nonpresent_pte);
741                                 spte = NULL;
742                                 write_protected = 1;
743                         }
744                         spte = rmap_next(kvm, rmapp, spte);
745                 }
746         }
747
748         return write_protected;
749 }
750
751 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
752                            unsigned long data)
753 {
754         u64 *spte;
755         int need_tlb_flush = 0;
756
757         while ((spte = rmap_next(kvm, rmapp, NULL))) {
758                 BUG_ON(!(*spte & PT_PRESENT_MASK));
759                 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
760                 rmap_remove(kvm, spte);
761                 __set_spte(spte, shadow_trap_nonpresent_pte);
762                 need_tlb_flush = 1;
763         }
764         return need_tlb_flush;
765 }
766
767 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
768                              unsigned long data)
769 {
770         int need_flush = 0;
771         u64 *spte, new_spte;
772         pte_t *ptep = (pte_t *)data;
773         pfn_t new_pfn;
774
775         WARN_ON(pte_huge(*ptep));
776         new_pfn = pte_pfn(*ptep);
777         spte = rmap_next(kvm, rmapp, NULL);
778         while (spte) {
779                 BUG_ON(!is_shadow_present_pte(*spte));
780                 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
781                 need_flush = 1;
782                 if (pte_write(*ptep)) {
783                         rmap_remove(kvm, spte);
784                         __set_spte(spte, shadow_trap_nonpresent_pte);
785                         spte = rmap_next(kvm, rmapp, NULL);
786                 } else {
787                         new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
788                         new_spte |= (u64)new_pfn << PAGE_SHIFT;
789
790                         new_spte &= ~PT_WRITABLE_MASK;
791                         new_spte &= ~SPTE_HOST_WRITEABLE;
792                         if (is_writeble_pte(*spte))
793                                 kvm_set_pfn_dirty(spte_to_pfn(*spte));
794                         __set_spte(spte, new_spte);
795                         spte = rmap_next(kvm, rmapp, spte);
796                 }
797         }
798         if (need_flush)
799                 kvm_flush_remote_tlbs(kvm);
800
801         return 0;
802 }
803
804 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
805                           unsigned long data,
806                           int (*handler)(struct kvm *kvm, unsigned long *rmapp,
807                                          unsigned long data))
808 {
809         int i, j;
810         int retval = 0;
811         struct kvm_memslots *slots;
812
813         slots = rcu_dereference(kvm->memslots);
814
815         for (i = 0; i < slots->nmemslots; i++) {
816                 struct kvm_memory_slot *memslot = &slots->memslots[i];
817                 unsigned long start = memslot->userspace_addr;
818                 unsigned long end;
819
820                 end = start + (memslot->npages << PAGE_SHIFT);
821                 if (hva >= start && hva < end) {
822                         gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
823
824                         retval |= handler(kvm, &memslot->rmap[gfn_offset],
825                                           data);
826
827                         for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
828                                 int idx = gfn_offset;
829                                 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
830                                 retval |= handler(kvm,
831                                         &memslot->lpage_info[j][idx].rmap_pde,
832                                         data);
833                         }
834                 }
835         }
836
837         return retval;
838 }
839
840 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
841 {
842         return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
843 }
844
845 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
846 {
847         kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
848 }
849
850 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
851                          unsigned long data)
852 {
853         u64 *spte;
854         int young = 0;
855
856         /* always return old for EPT */
857         if (!shadow_accessed_mask)
858                 return 0;
859
860         spte = rmap_next(kvm, rmapp, NULL);
861         while (spte) {
862                 int _young;
863                 u64 _spte = *spte;
864                 BUG_ON(!(_spte & PT_PRESENT_MASK));
865                 _young = _spte & PT_ACCESSED_MASK;
866                 if (_young) {
867                         young = 1;
868                         clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
869                 }
870                 spte = rmap_next(kvm, rmapp, spte);
871         }
872         return young;
873 }
874
875 #define RMAP_RECYCLE_THRESHOLD 1000
876
877 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
878 {
879         unsigned long *rmapp;
880         struct kvm_mmu_page *sp;
881
882         sp = page_header(__pa(spte));
883
884         gfn = unalias_gfn(vcpu->kvm, gfn);
885         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
886
887         kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
888         kvm_flush_remote_tlbs(vcpu->kvm);
889 }
890
891 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
892 {
893         return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
894 }
895
896 #ifdef MMU_DEBUG
897 static int is_empty_shadow_page(u64 *spt)
898 {
899         u64 *pos;
900         u64 *end;
901
902         for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
903                 if (is_shadow_present_pte(*pos)) {
904                         printk(KERN_ERR "%s: %p %llx\n", __func__,
905                                pos, *pos);
906                         return 0;
907                 }
908         return 1;
909 }
910 #endif
911
912 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
913 {
914         ASSERT(is_empty_shadow_page(sp->spt));
915         list_del(&sp->link);
916         __free_page(virt_to_page(sp->spt));
917         __free_page(virt_to_page(sp->gfns));
918         kfree(sp);
919         ++kvm->arch.n_free_mmu_pages;
920 }
921
922 static unsigned kvm_page_table_hashfn(gfn_t gfn)
923 {
924         return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
925 }
926
927 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
928                                                u64 *parent_pte)
929 {
930         struct kvm_mmu_page *sp;
931
932         sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
933         sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
934         sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
935         set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
936         list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
937         INIT_LIST_HEAD(&sp->oos_link);
938         bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
939         sp->multimapped = 0;
940         sp->parent_pte = parent_pte;
941         --vcpu->kvm->arch.n_free_mmu_pages;
942         return sp;
943 }
944
945 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
946                                     struct kvm_mmu_page *sp, u64 *parent_pte)
947 {
948         struct kvm_pte_chain *pte_chain;
949         struct hlist_node *node;
950         int i;
951
952         if (!parent_pte)
953                 return;
954         if (!sp->multimapped) {
955                 u64 *old = sp->parent_pte;
956
957                 if (!old) {
958                         sp->parent_pte = parent_pte;
959                         return;
960                 }
961                 sp->multimapped = 1;
962                 pte_chain = mmu_alloc_pte_chain(vcpu);
963                 INIT_HLIST_HEAD(&sp->parent_ptes);
964                 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
965                 pte_chain->parent_ptes[0] = old;
966         }
967         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
968                 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
969                         continue;
970                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
971                         if (!pte_chain->parent_ptes[i]) {
972                                 pte_chain->parent_ptes[i] = parent_pte;
973                                 return;
974                         }
975         }
976         pte_chain = mmu_alloc_pte_chain(vcpu);
977         BUG_ON(!pte_chain);
978         hlist_add_head(&pte_chain->link, &sp->parent_ptes);
979         pte_chain->parent_ptes[0] = parent_pte;
980 }
981
982 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
983                                        u64 *parent_pte)
984 {
985         struct kvm_pte_chain *pte_chain;
986         struct hlist_node *node;
987         int i;
988
989         if (!sp->multimapped) {
990                 BUG_ON(sp->parent_pte != parent_pte);
991                 sp->parent_pte = NULL;
992                 return;
993         }
994         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
995                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
996                         if (!pte_chain->parent_ptes[i])
997                                 break;
998                         if (pte_chain->parent_ptes[i] != parent_pte)
999                                 continue;
1000                         while (i + 1 < NR_PTE_CHAIN_ENTRIES
1001                                 && pte_chain->parent_ptes[i + 1]) {
1002                                 pte_chain->parent_ptes[i]
1003                                         = pte_chain->parent_ptes[i + 1];
1004                                 ++i;
1005                         }
1006                         pte_chain->parent_ptes[i] = NULL;
1007                         if (i == 0) {
1008                                 hlist_del(&pte_chain->link);
1009                                 mmu_free_pte_chain(pte_chain);
1010                                 if (hlist_empty(&sp->parent_ptes)) {
1011                                         sp->multimapped = 0;
1012                                         sp->parent_pte = NULL;
1013                                 }
1014                         }
1015                         return;
1016                 }
1017         BUG();
1018 }
1019
1020
1021 static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1022                             mmu_parent_walk_fn fn)
1023 {
1024         struct kvm_pte_chain *pte_chain;
1025         struct hlist_node *node;
1026         struct kvm_mmu_page *parent_sp;
1027         int i;
1028
1029         if (!sp->multimapped && sp->parent_pte) {
1030                 parent_sp = page_header(__pa(sp->parent_pte));
1031                 fn(vcpu, parent_sp);
1032                 mmu_parent_walk(vcpu, parent_sp, fn);
1033                 return;
1034         }
1035         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1036                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1037                         if (!pte_chain->parent_ptes[i])
1038                                 break;
1039                         parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1040                         fn(vcpu, parent_sp);
1041                         mmu_parent_walk(vcpu, parent_sp, fn);
1042                 }
1043 }
1044
1045 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1046 {
1047         unsigned int index;
1048         struct kvm_mmu_page *sp = page_header(__pa(spte));
1049
1050         index = spte - sp->spt;
1051         if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1052                 sp->unsync_children++;
1053         WARN_ON(!sp->unsync_children);
1054 }
1055
1056 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1057 {
1058         struct kvm_pte_chain *pte_chain;
1059         struct hlist_node *node;
1060         int i;
1061
1062         if (!sp->parent_pte)
1063                 return;
1064
1065         if (!sp->multimapped) {
1066                 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1067                 return;
1068         }
1069
1070         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1071                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1072                         if (!pte_chain->parent_ptes[i])
1073                                 break;
1074                         kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1075                 }
1076 }
1077
1078 static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1079 {
1080         kvm_mmu_update_parents_unsync(sp);
1081         return 1;
1082 }
1083
1084 static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
1085                                         struct kvm_mmu_page *sp)
1086 {
1087         mmu_parent_walk(vcpu, sp, unsync_walk_fn);
1088         kvm_mmu_update_parents_unsync(sp);
1089 }
1090
1091 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1092                                     struct kvm_mmu_page *sp)
1093 {
1094         int i;
1095
1096         for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1097                 sp->spt[i] = shadow_trap_nonpresent_pte;
1098 }
1099
1100 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1101                                struct kvm_mmu_page *sp)
1102 {
1103         return 1;
1104 }
1105
1106 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1107 {
1108 }
1109
1110 #define KVM_PAGE_ARRAY_NR 16
1111
1112 struct kvm_mmu_pages {
1113         struct mmu_page_and_offset {
1114                 struct kvm_mmu_page *sp;
1115                 unsigned int idx;
1116         } page[KVM_PAGE_ARRAY_NR];
1117         unsigned int nr;
1118 };
1119
1120 #define for_each_unsync_children(bitmap, idx)           \
1121         for (idx = find_first_bit(bitmap, 512);         \
1122              idx < 512;                                 \
1123              idx = find_next_bit(bitmap, 512, idx+1))
1124
1125 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1126                          int idx)
1127 {
1128         int i;
1129
1130         if (sp->unsync)
1131                 for (i=0; i < pvec->nr; i++)
1132                         if (pvec->page[i].sp == sp)
1133                                 return 0;
1134
1135         pvec->page[pvec->nr].sp = sp;
1136         pvec->page[pvec->nr].idx = idx;
1137         pvec->nr++;
1138         return (pvec->nr == KVM_PAGE_ARRAY_NR);
1139 }
1140
1141 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1142                            struct kvm_mmu_pages *pvec)
1143 {
1144         int i, ret, nr_unsync_leaf = 0;
1145
1146         for_each_unsync_children(sp->unsync_child_bitmap, i) {
1147                 u64 ent = sp->spt[i];
1148
1149                 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1150                         struct kvm_mmu_page *child;
1151                         child = page_header(ent & PT64_BASE_ADDR_MASK);
1152
1153                         if (child->unsync_children) {
1154                                 if (mmu_pages_add(pvec, child, i))
1155                                         return -ENOSPC;
1156
1157                                 ret = __mmu_unsync_walk(child, pvec);
1158                                 if (!ret)
1159                                         __clear_bit(i, sp->unsync_child_bitmap);
1160                                 else if (ret > 0)
1161                                         nr_unsync_leaf += ret;
1162                                 else
1163                                         return ret;
1164                         }
1165
1166                         if (child->unsync) {
1167                                 nr_unsync_leaf++;
1168                                 if (mmu_pages_add(pvec, child, i))
1169                                         return -ENOSPC;
1170                         }
1171                 }
1172         }
1173
1174         if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1175                 sp->unsync_children = 0;
1176
1177         return nr_unsync_leaf;
1178 }
1179
1180 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1181                            struct kvm_mmu_pages *pvec)
1182 {
1183         if (!sp->unsync_children)
1184                 return 0;
1185
1186         mmu_pages_add(pvec, sp, 0);
1187         return __mmu_unsync_walk(sp, pvec);
1188 }
1189
1190 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1191 {
1192         unsigned index;
1193         struct hlist_head *bucket;
1194         struct kvm_mmu_page *sp;
1195         struct hlist_node *node;
1196
1197         pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1198         index = kvm_page_table_hashfn(gfn);
1199         bucket = &kvm->arch.mmu_page_hash[index];
1200         hlist_for_each_entry(sp, node, bucket, hash_link)
1201                 if (sp->gfn == gfn && !sp->role.direct
1202                     && !sp->role.invalid) {
1203                         pgprintk("%s: found role %x\n",
1204                                  __func__, sp->role.word);
1205                         return sp;
1206                 }
1207         return NULL;
1208 }
1209
1210 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1211 {
1212         WARN_ON(!sp->unsync);
1213         sp->unsync = 0;
1214         --kvm->stat.mmu_unsync;
1215 }
1216
1217 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1218
1219 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1220 {
1221         if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1222                 kvm_mmu_zap_page(vcpu->kvm, sp);
1223                 return 1;
1224         }
1225
1226         trace_kvm_mmu_sync_page(sp);
1227         if (rmap_write_protect(vcpu->kvm, sp->gfn))
1228                 kvm_flush_remote_tlbs(vcpu->kvm);
1229         kvm_unlink_unsync_page(vcpu->kvm, sp);
1230         if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1231                 kvm_mmu_zap_page(vcpu->kvm, sp);
1232                 return 1;
1233         }
1234
1235         kvm_mmu_flush_tlb(vcpu);
1236         return 0;
1237 }
1238
1239 struct mmu_page_path {
1240         struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1241         unsigned int idx[PT64_ROOT_LEVEL-1];
1242 };
1243
1244 #define for_each_sp(pvec, sp, parents, i)                       \
1245                 for (i = mmu_pages_next(&pvec, &parents, -1),   \
1246                         sp = pvec.page[i].sp;                   \
1247                         i < pvec.nr && ({ sp = pvec.page[i].sp; 1;});   \
1248                         i = mmu_pages_next(&pvec, &parents, i))
1249
1250 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1251                           struct mmu_page_path *parents,
1252                           int i)
1253 {
1254         int n;
1255
1256         for (n = i+1; n < pvec->nr; n++) {
1257                 struct kvm_mmu_page *sp = pvec->page[n].sp;
1258
1259                 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1260                         parents->idx[0] = pvec->page[n].idx;
1261                         return n;
1262                 }
1263
1264                 parents->parent[sp->role.level-2] = sp;
1265                 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1266         }
1267
1268         return n;
1269 }
1270
1271 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1272 {
1273         struct kvm_mmu_page *sp;
1274         unsigned int level = 0;
1275
1276         do {
1277                 unsigned int idx = parents->idx[level];
1278
1279                 sp = parents->parent[level];
1280                 if (!sp)
1281                         return;
1282
1283                 --sp->unsync_children;
1284                 WARN_ON((int)sp->unsync_children < 0);
1285                 __clear_bit(idx, sp->unsync_child_bitmap);
1286                 level++;
1287         } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1288 }
1289
1290 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1291                                struct mmu_page_path *parents,
1292                                struct kvm_mmu_pages *pvec)
1293 {
1294         parents->parent[parent->role.level-1] = NULL;
1295         pvec->nr = 0;
1296 }
1297
1298 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1299                               struct kvm_mmu_page *parent)
1300 {
1301         int i;
1302         struct kvm_mmu_page *sp;
1303         struct mmu_page_path parents;
1304         struct kvm_mmu_pages pages;
1305
1306         kvm_mmu_pages_init(parent, &parents, &pages);
1307         while (mmu_unsync_walk(parent, &pages)) {
1308                 int protected = 0;
1309
1310                 for_each_sp(pages, sp, parents, i)
1311                         protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1312
1313                 if (protected)
1314                         kvm_flush_remote_tlbs(vcpu->kvm);
1315
1316                 for_each_sp(pages, sp, parents, i) {
1317                         kvm_sync_page(vcpu, sp);
1318                         mmu_pages_clear_parents(&parents);
1319                 }
1320                 cond_resched_lock(&vcpu->kvm->mmu_lock);
1321                 kvm_mmu_pages_init(parent, &parents, &pages);
1322         }
1323 }
1324
1325 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1326                                              gfn_t gfn,
1327                                              gva_t gaddr,
1328                                              unsigned level,
1329                                              int direct,
1330                                              unsigned access,
1331                                              u64 *parent_pte)
1332 {
1333         union kvm_mmu_page_role role;
1334         unsigned index;
1335         unsigned quadrant;
1336         struct hlist_head *bucket;
1337         struct kvm_mmu_page *sp;
1338         struct hlist_node *node, *tmp;
1339
1340         role = vcpu->arch.mmu.base_role;
1341         role.level = level;
1342         role.direct = direct;
1343         role.access = access;
1344         if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1345                 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1346                 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1347                 role.quadrant = quadrant;
1348         }
1349         index = kvm_page_table_hashfn(gfn);
1350         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1351         hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1352                 if (sp->gfn == gfn) {
1353                         if (sp->unsync)
1354                                 if (kvm_sync_page(vcpu, sp))
1355                                         continue;
1356
1357                         if (sp->role.word != role.word)
1358                                 continue;
1359
1360                         mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1361                         if (sp->unsync_children) {
1362                                 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1363                                 kvm_mmu_mark_parents_unsync(vcpu, sp);
1364                         }
1365                         trace_kvm_mmu_get_page(sp, false);
1366                         return sp;
1367                 }
1368         ++vcpu->kvm->stat.mmu_cache_miss;
1369         sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1370         if (!sp)
1371                 return sp;
1372         sp->gfn = gfn;
1373         sp->role = role;
1374         hlist_add_head(&sp->hash_link, bucket);
1375         if (!direct) {
1376                 if (rmap_write_protect(vcpu->kvm, gfn))
1377                         kvm_flush_remote_tlbs(vcpu->kvm);
1378                 account_shadowed(vcpu->kvm, gfn);
1379         }
1380         if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1381                 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1382         else
1383                 nonpaging_prefetch_page(vcpu, sp);
1384         trace_kvm_mmu_get_page(sp, true);
1385         return sp;
1386 }
1387
1388 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1389                              struct kvm_vcpu *vcpu, u64 addr)
1390 {
1391         iterator->addr = addr;
1392         iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1393         iterator->level = vcpu->arch.mmu.shadow_root_level;
1394         if (iterator->level == PT32E_ROOT_LEVEL) {
1395                 iterator->shadow_addr
1396                         = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1397                 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1398                 --iterator->level;
1399                 if (!iterator->shadow_addr)
1400                         iterator->level = 0;
1401         }
1402 }
1403
1404 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1405 {
1406         if (iterator->level < PT_PAGE_TABLE_LEVEL)
1407                 return false;
1408
1409         if (iterator->level == PT_PAGE_TABLE_LEVEL)
1410                 if (is_large_pte(*iterator->sptep))
1411                         return false;
1412
1413         iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1414         iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1415         return true;
1416 }
1417
1418 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1419 {
1420         iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1421         --iterator->level;
1422 }
1423
1424 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1425                                          struct kvm_mmu_page *sp)
1426 {
1427         unsigned i;
1428         u64 *pt;
1429         u64 ent;
1430
1431         pt = sp->spt;
1432
1433         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1434                 ent = pt[i];
1435
1436                 if (is_shadow_present_pte(ent)) {
1437                         if (!is_last_spte(ent, sp->role.level)) {
1438                                 ent &= PT64_BASE_ADDR_MASK;
1439                                 mmu_page_remove_parent_pte(page_header(ent),
1440                                                            &pt[i]);
1441                         } else {
1442                                 if (is_large_pte(ent))
1443                                         --kvm->stat.lpages;
1444                                 rmap_remove(kvm, &pt[i]);
1445                         }
1446                 }
1447                 pt[i] = shadow_trap_nonpresent_pte;
1448         }
1449 }
1450
1451 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1452 {
1453         mmu_page_remove_parent_pte(sp, parent_pte);
1454 }
1455
1456 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1457 {
1458         int i;
1459         struct kvm_vcpu *vcpu;
1460
1461         kvm_for_each_vcpu(i, vcpu, kvm)
1462                 vcpu->arch.last_pte_updated = NULL;
1463 }
1464
1465 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1466 {
1467         u64 *parent_pte;
1468
1469         while (sp->multimapped || sp->parent_pte) {
1470                 if (!sp->multimapped)
1471                         parent_pte = sp->parent_pte;
1472                 else {
1473                         struct kvm_pte_chain *chain;
1474
1475                         chain = container_of(sp->parent_ptes.first,
1476                                              struct kvm_pte_chain, link);
1477                         parent_pte = chain->parent_ptes[0];
1478                 }
1479                 BUG_ON(!parent_pte);
1480                 kvm_mmu_put_page(sp, parent_pte);
1481                 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1482         }
1483 }
1484
1485 static int mmu_zap_unsync_children(struct kvm *kvm,
1486                                    struct kvm_mmu_page *parent)
1487 {
1488         int i, zapped = 0;
1489         struct mmu_page_path parents;
1490         struct kvm_mmu_pages pages;
1491
1492         if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1493                 return 0;
1494
1495         kvm_mmu_pages_init(parent, &parents, &pages);
1496         while (mmu_unsync_walk(parent, &pages)) {
1497                 struct kvm_mmu_page *sp;
1498
1499                 for_each_sp(pages, sp, parents, i) {
1500                         kvm_mmu_zap_page(kvm, sp);
1501                         mmu_pages_clear_parents(&parents);
1502                 }
1503                 zapped += pages.nr;
1504                 kvm_mmu_pages_init(parent, &parents, &pages);
1505         }
1506
1507         return zapped;
1508 }
1509
1510 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1511 {
1512         int ret;
1513
1514         trace_kvm_mmu_zap_page(sp);
1515         ++kvm->stat.mmu_shadow_zapped;
1516         ret = mmu_zap_unsync_children(kvm, sp);
1517         kvm_mmu_page_unlink_children(kvm, sp);
1518         kvm_mmu_unlink_parents(kvm, sp);
1519         kvm_flush_remote_tlbs(kvm);
1520         if (!sp->role.invalid && !sp->role.direct)
1521                 unaccount_shadowed(kvm, sp->gfn);
1522         if (sp->unsync)
1523                 kvm_unlink_unsync_page(kvm, sp);
1524         if (!sp->root_count) {
1525                 hlist_del(&sp->hash_link);
1526                 kvm_mmu_free_page(kvm, sp);
1527         } else {
1528                 sp->role.invalid = 1;
1529                 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1530                 kvm_reload_remote_mmus(kvm);
1531         }
1532         kvm_mmu_reset_last_pte_updated(kvm);
1533         return ret;
1534 }
1535
1536 /*
1537  * Changing the number of mmu pages allocated to the vm
1538  * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1539  */
1540 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1541 {
1542         int used_pages;
1543
1544         used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1545         used_pages = max(0, used_pages);
1546
1547         /*
1548          * If we set the number of mmu pages to be smaller be than the
1549          * number of actived pages , we must to free some mmu pages before we
1550          * change the value
1551          */
1552
1553         if (used_pages > kvm_nr_mmu_pages) {
1554                 while (used_pages > kvm_nr_mmu_pages) {
1555                         struct kvm_mmu_page *page;
1556
1557                         page = container_of(kvm->arch.active_mmu_pages.prev,
1558                                             struct kvm_mmu_page, link);
1559                         kvm_mmu_zap_page(kvm, page);
1560                         used_pages--;
1561                 }
1562                 kvm->arch.n_free_mmu_pages = 0;
1563         }
1564         else
1565                 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1566                                          - kvm->arch.n_alloc_mmu_pages;
1567
1568         kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1569 }
1570
1571 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1572 {
1573         unsigned index;
1574         struct hlist_head *bucket;
1575         struct kvm_mmu_page *sp;
1576         struct hlist_node *node, *n;
1577         int r;
1578
1579         pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1580         r = 0;
1581         index = kvm_page_table_hashfn(gfn);
1582         bucket = &kvm->arch.mmu_page_hash[index];
1583         hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1584                 if (sp->gfn == gfn && !sp->role.direct) {
1585                         pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1586                                  sp->role.word);
1587                         r = 1;
1588                         if (kvm_mmu_zap_page(kvm, sp))
1589                                 n = bucket->first;
1590                 }
1591         return r;
1592 }
1593
1594 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1595 {
1596         unsigned index;
1597         struct hlist_head *bucket;
1598         struct kvm_mmu_page *sp;
1599         struct hlist_node *node, *nn;
1600
1601         index = kvm_page_table_hashfn(gfn);
1602         bucket = &kvm->arch.mmu_page_hash[index];
1603         hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1604                 if (sp->gfn == gfn && !sp->role.direct
1605                     && !sp->role.invalid) {
1606                         pgprintk("%s: zap %lx %x\n",
1607                                  __func__, gfn, sp->role.word);
1608                         kvm_mmu_zap_page(kvm, sp);
1609                 }
1610         }
1611 }
1612
1613 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1614 {
1615         int slot = memslot_id(kvm, gfn);
1616         struct kvm_mmu_page *sp = page_header(__pa(pte));
1617
1618         __set_bit(slot, sp->slot_bitmap);
1619 }
1620
1621 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1622 {
1623         int i;
1624         u64 *pt = sp->spt;
1625
1626         if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1627                 return;
1628
1629         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1630                 if (pt[i] == shadow_notrap_nonpresent_pte)
1631                         __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1632         }
1633 }
1634
1635 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1636 {
1637         struct page *page;
1638
1639         gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
1640
1641         if (gpa == UNMAPPED_GVA)
1642                 return NULL;
1643
1644         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1645
1646         return page;
1647 }
1648
1649 /*
1650  * The function is based on mtrr_type_lookup() in
1651  * arch/x86/kernel/cpu/mtrr/generic.c
1652  */
1653 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1654                          u64 start, u64 end)
1655 {
1656         int i;
1657         u64 base, mask;
1658         u8 prev_match, curr_match;
1659         int num_var_ranges = KVM_NR_VAR_MTRR;
1660
1661         if (!mtrr_state->enabled)
1662                 return 0xFF;
1663
1664         /* Make end inclusive end, instead of exclusive */
1665         end--;
1666
1667         /* Look in fixed ranges. Just return the type as per start */
1668         if (mtrr_state->have_fixed && (start < 0x100000)) {
1669                 int idx;
1670
1671                 if (start < 0x80000) {
1672                         idx = 0;
1673                         idx += (start >> 16);
1674                         return mtrr_state->fixed_ranges[idx];
1675                 } else if (start < 0xC0000) {
1676                         idx = 1 * 8;
1677                         idx += ((start - 0x80000) >> 14);
1678                         return mtrr_state->fixed_ranges[idx];
1679                 } else if (start < 0x1000000) {
1680                         idx = 3 * 8;
1681                         idx += ((start - 0xC0000) >> 12);
1682                         return mtrr_state->fixed_ranges[idx];
1683                 }
1684         }
1685
1686         /*
1687          * Look in variable ranges
1688          * Look of multiple ranges matching this address and pick type
1689          * as per MTRR precedence
1690          */
1691         if (!(mtrr_state->enabled & 2))
1692                 return mtrr_state->def_type;
1693
1694         prev_match = 0xFF;
1695         for (i = 0; i < num_var_ranges; ++i) {
1696                 unsigned short start_state, end_state;
1697
1698                 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1699                         continue;
1700
1701                 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1702                        (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1703                 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1704                        (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1705
1706                 start_state = ((start & mask) == (base & mask));
1707                 end_state = ((end & mask) == (base & mask));
1708                 if (start_state != end_state)
1709                         return 0xFE;
1710
1711                 if ((start & mask) != (base & mask))
1712                         continue;
1713
1714                 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1715                 if (prev_match == 0xFF) {
1716                         prev_match = curr_match;
1717                         continue;
1718                 }
1719
1720                 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1721                     curr_match == MTRR_TYPE_UNCACHABLE)
1722                         return MTRR_TYPE_UNCACHABLE;
1723
1724                 if ((prev_match == MTRR_TYPE_WRBACK &&
1725                      curr_match == MTRR_TYPE_WRTHROUGH) ||
1726                     (prev_match == MTRR_TYPE_WRTHROUGH &&
1727                      curr_match == MTRR_TYPE_WRBACK)) {
1728                         prev_match = MTRR_TYPE_WRTHROUGH;
1729                         curr_match = MTRR_TYPE_WRTHROUGH;
1730                 }
1731
1732                 if (prev_match != curr_match)
1733                         return MTRR_TYPE_UNCACHABLE;
1734         }
1735
1736         if (prev_match != 0xFF)
1737                 return prev_match;
1738
1739         return mtrr_state->def_type;
1740 }
1741
1742 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1743 {
1744         u8 mtrr;
1745
1746         mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1747                              (gfn << PAGE_SHIFT) + PAGE_SIZE);
1748         if (mtrr == 0xfe || mtrr == 0xff)
1749                 mtrr = MTRR_TYPE_WRBACK;
1750         return mtrr;
1751 }
1752 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1753
1754 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1755 {
1756         unsigned index;
1757         struct hlist_head *bucket;
1758         struct kvm_mmu_page *s;
1759         struct hlist_node *node, *n;
1760
1761         trace_kvm_mmu_unsync_page(sp);
1762         index = kvm_page_table_hashfn(sp->gfn);
1763         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1764         /* don't unsync if pagetable is shadowed with multiple roles */
1765         hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1766                 if (s->gfn != sp->gfn || s->role.direct)
1767                         continue;
1768                 if (s->role.word != sp->role.word)
1769                         return 1;
1770         }
1771         ++vcpu->kvm->stat.mmu_unsync;
1772         sp->unsync = 1;
1773
1774         kvm_mmu_mark_parents_unsync(vcpu, sp);
1775
1776         mmu_convert_notrap(sp);
1777         return 0;
1778 }
1779
1780 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1781                                   bool can_unsync)
1782 {
1783         struct kvm_mmu_page *shadow;
1784
1785         shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1786         if (shadow) {
1787                 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1788                         return 1;
1789                 if (shadow->unsync)
1790                         return 0;
1791                 if (can_unsync && oos_shadow)
1792                         return kvm_unsync_page(vcpu, shadow);
1793                 return 1;
1794         }
1795         return 0;
1796 }
1797
1798 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1799                     unsigned pte_access, int user_fault,
1800                     int write_fault, int dirty, int level,
1801                     gfn_t gfn, pfn_t pfn, bool speculative,
1802                     bool can_unsync, bool reset_host_protection)
1803 {
1804         u64 spte;
1805         int ret = 0;
1806
1807         /*
1808          * We don't set the accessed bit, since we sometimes want to see
1809          * whether the guest actually used the pte (in order to detect
1810          * demand paging).
1811          */
1812         spte = shadow_base_present_pte | shadow_dirty_mask;
1813         if (!speculative)
1814                 spte |= shadow_accessed_mask;
1815         if (!dirty)
1816                 pte_access &= ~ACC_WRITE_MASK;
1817         if (pte_access & ACC_EXEC_MASK)
1818                 spte |= shadow_x_mask;
1819         else
1820                 spte |= shadow_nx_mask;
1821         if (pte_access & ACC_USER_MASK)
1822                 spte |= shadow_user_mask;
1823         if (level > PT_PAGE_TABLE_LEVEL)
1824                 spte |= PT_PAGE_SIZE_MASK;
1825         if (tdp_enabled)
1826                 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1827                         kvm_is_mmio_pfn(pfn));
1828
1829         if (reset_host_protection)
1830                 spte |= SPTE_HOST_WRITEABLE;
1831
1832         spte |= (u64)pfn << PAGE_SHIFT;
1833
1834         if ((pte_access & ACC_WRITE_MASK)
1835             || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1836
1837                 if (level > PT_PAGE_TABLE_LEVEL &&
1838                     has_wrprotected_page(vcpu->kvm, gfn, level)) {
1839                         ret = 1;
1840                         spte = shadow_trap_nonpresent_pte;
1841                         goto set_pte;
1842                 }
1843
1844                 spte |= PT_WRITABLE_MASK;
1845
1846                 /*
1847                  * Optimization: for pte sync, if spte was writable the hash
1848                  * lookup is unnecessary (and expensive). Write protection
1849                  * is responsibility of mmu_get_page / kvm_sync_page.
1850                  * Same reasoning can be applied to dirty page accounting.
1851                  */
1852                 if (!can_unsync && is_writeble_pte(*sptep))
1853                         goto set_pte;
1854
1855                 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1856                         pgprintk("%s: found shadow page for %lx, marking ro\n",
1857                                  __func__, gfn);
1858                         ret = 1;
1859                         pte_access &= ~ACC_WRITE_MASK;
1860                         if (is_writeble_pte(spte))
1861                                 spte &= ~PT_WRITABLE_MASK;
1862                 }
1863         }
1864
1865         if (pte_access & ACC_WRITE_MASK)
1866                 mark_page_dirty(vcpu->kvm, gfn);
1867
1868 set_pte:
1869         __set_spte(sptep, spte);
1870         return ret;
1871 }
1872
1873 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1874                          unsigned pt_access, unsigned pte_access,
1875                          int user_fault, int write_fault, int dirty,
1876                          int *ptwrite, int level, gfn_t gfn,
1877                          pfn_t pfn, bool speculative,
1878                          bool reset_host_protection)
1879 {
1880         int was_rmapped = 0;
1881         int was_writeble = is_writeble_pte(*sptep);
1882         int rmap_count;
1883
1884         pgprintk("%s: spte %llx access %x write_fault %d"
1885                  " user_fault %d gfn %lx\n",
1886                  __func__, *sptep, pt_access,
1887                  write_fault, user_fault, gfn);
1888
1889         if (is_rmap_spte(*sptep)) {
1890                 /*
1891                  * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1892                  * the parent of the now unreachable PTE.
1893                  */
1894                 if (level > PT_PAGE_TABLE_LEVEL &&
1895                     !is_large_pte(*sptep)) {
1896                         struct kvm_mmu_page *child;
1897                         u64 pte = *sptep;
1898
1899                         child = page_header(pte & PT64_BASE_ADDR_MASK);
1900                         mmu_page_remove_parent_pte(child, sptep);
1901                 } else if (pfn != spte_to_pfn(*sptep)) {
1902                         pgprintk("hfn old %lx new %lx\n",
1903                                  spte_to_pfn(*sptep), pfn);
1904                         rmap_remove(vcpu->kvm, sptep);
1905                 } else
1906                         was_rmapped = 1;
1907         }
1908
1909         if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1910                       dirty, level, gfn, pfn, speculative, true,
1911                       reset_host_protection)) {
1912                 if (write_fault)
1913                         *ptwrite = 1;
1914                 kvm_x86_ops->tlb_flush(vcpu);
1915         }
1916
1917         pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1918         pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1919                  is_large_pte(*sptep)? "2MB" : "4kB",
1920                  *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1921                  *sptep, sptep);
1922         if (!was_rmapped && is_large_pte(*sptep))
1923                 ++vcpu->kvm->stat.lpages;
1924
1925         page_header_update_slot(vcpu->kvm, sptep, gfn);
1926         if (!was_rmapped) {
1927                 rmap_count = rmap_add(vcpu, sptep, gfn);
1928                 kvm_release_pfn_clean(pfn);
1929                 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1930                         rmap_recycle(vcpu, sptep, gfn);
1931         } else {
1932                 if (was_writeble)
1933                         kvm_release_pfn_dirty(pfn);
1934                 else
1935                         kvm_release_pfn_clean(pfn);
1936         }
1937         if (speculative) {
1938                 vcpu->arch.last_pte_updated = sptep;
1939                 vcpu->arch.last_pte_gfn = gfn;
1940         }
1941 }
1942
1943 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1944 {
1945 }
1946
1947 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1948                         int level, gfn_t gfn, pfn_t pfn)
1949 {
1950         struct kvm_shadow_walk_iterator iterator;
1951         struct kvm_mmu_page *sp;
1952         int pt_write = 0;
1953         gfn_t pseudo_gfn;
1954
1955         for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1956                 if (iterator.level == level) {
1957                         mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1958                                      0, write, 1, &pt_write,
1959                                      level, gfn, pfn, false, true);
1960                         ++vcpu->stat.pf_fixed;
1961                         break;
1962                 }
1963
1964                 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1965                         pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1966                         sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1967                                               iterator.level - 1,
1968                                               1, ACC_ALL, iterator.sptep);
1969                         if (!sp) {
1970                                 pgprintk("nonpaging_map: ENOMEM\n");
1971                                 kvm_release_pfn_clean(pfn);
1972                                 return -ENOMEM;
1973                         }
1974
1975                         __set_spte(iterator.sptep,
1976                                    __pa(sp->spt)
1977                                    | PT_PRESENT_MASK | PT_WRITABLE_MASK
1978                                    | shadow_user_mask | shadow_x_mask);
1979                 }
1980         }
1981         return pt_write;
1982 }
1983
1984 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1985 {
1986         int r;
1987         int level;
1988         pfn_t pfn;
1989         unsigned long mmu_seq;
1990
1991         level = mapping_level(vcpu, gfn);
1992
1993         /*
1994          * This path builds a PAE pagetable - so we can map 2mb pages at
1995          * maximum. Therefore check if the level is larger than that.
1996          */
1997         if (level > PT_DIRECTORY_LEVEL)
1998                 level = PT_DIRECTORY_LEVEL;
1999
2000         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2001
2002         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2003         smp_rmb();
2004         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2005
2006         /* mmio */
2007         if (is_error_pfn(pfn)) {
2008                 kvm_release_pfn_clean(pfn);
2009                 return 1;
2010         }
2011
2012         spin_lock(&vcpu->kvm->mmu_lock);
2013         if (mmu_notifier_retry(vcpu, mmu_seq))
2014                 goto out_unlock;
2015         kvm_mmu_free_some_pages(vcpu);
2016         r = __direct_map(vcpu, v, write, level, gfn, pfn);
2017         spin_unlock(&vcpu->kvm->mmu_lock);
2018
2019
2020         return r;
2021
2022 out_unlock:
2023         spin_unlock(&vcpu->kvm->mmu_lock);
2024         kvm_release_pfn_clean(pfn);
2025         return 0;
2026 }
2027
2028
2029 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2030 {
2031         int i;
2032         struct kvm_mmu_page *sp;
2033
2034         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2035                 return;
2036         spin_lock(&vcpu->kvm->mmu_lock);
2037         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2038                 hpa_t root = vcpu->arch.mmu.root_hpa;
2039
2040                 sp = page_header(root);
2041                 --sp->root_count;
2042                 if (!sp->root_count && sp->role.invalid)
2043                         kvm_mmu_zap_page(vcpu->kvm, sp);
2044                 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2045                 spin_unlock(&vcpu->kvm->mmu_lock);
2046                 return;
2047         }
2048         for (i = 0; i < 4; ++i) {
2049                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2050
2051                 if (root) {
2052                         root &= PT64_BASE_ADDR_MASK;
2053                         sp = page_header(root);
2054                         --sp->root_count;
2055                         if (!sp->root_count && sp->role.invalid)
2056                                 kvm_mmu_zap_page(vcpu->kvm, sp);
2057                 }
2058                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2059         }
2060         spin_unlock(&vcpu->kvm->mmu_lock);
2061         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2062 }
2063
2064 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2065 {
2066         int ret = 0;
2067
2068         if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2069                 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2070                 ret = 1;
2071         }
2072
2073         return ret;
2074 }
2075
2076 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2077 {
2078         int i;
2079         gfn_t root_gfn;
2080         struct kvm_mmu_page *sp;
2081         int direct = 0;
2082         u64 pdptr;
2083
2084         root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2085
2086         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2087                 hpa_t root = vcpu->arch.mmu.root_hpa;
2088
2089                 ASSERT(!VALID_PAGE(root));
2090                 if (tdp_enabled)
2091                         direct = 1;
2092                 if (mmu_check_root(vcpu, root_gfn))
2093                         return 1;
2094                 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2095                                       PT64_ROOT_LEVEL, direct,
2096                                       ACC_ALL, NULL);
2097                 root = __pa(sp->spt);
2098                 ++sp->root_count;
2099                 vcpu->arch.mmu.root_hpa = root;
2100                 return 0;
2101         }
2102         direct = !is_paging(vcpu);
2103         if (tdp_enabled)
2104                 direct = 1;
2105         for (i = 0; i < 4; ++i) {
2106                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2107
2108                 ASSERT(!VALID_PAGE(root));
2109                 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2110                         pdptr = kvm_pdptr_read(vcpu, i);
2111                         if (!is_present_gpte(pdptr)) {
2112                                 vcpu->arch.mmu.pae_root[i] = 0;
2113                                 continue;
2114                         }
2115                         root_gfn = pdptr >> PAGE_SHIFT;
2116                 } else if (vcpu->arch.mmu.root_level == 0)
2117                         root_gfn = 0;
2118                 if (mmu_check_root(vcpu, root_gfn))
2119                         return 1;
2120                 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2121                                       PT32_ROOT_LEVEL, direct,
2122                                       ACC_ALL, NULL);
2123                 root = __pa(sp->spt);
2124                 ++sp->root_count;
2125                 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2126         }
2127         vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2128         return 0;
2129 }
2130
2131 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2132 {
2133         int i;
2134         struct kvm_mmu_page *sp;
2135
2136         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2137                 return;
2138         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2139                 hpa_t root = vcpu->arch.mmu.root_hpa;
2140                 sp = page_header(root);
2141                 mmu_sync_children(vcpu, sp);
2142                 return;
2143         }
2144         for (i = 0; i < 4; ++i) {
2145                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2146
2147                 if (root && VALID_PAGE(root)) {
2148                         root &= PT64_BASE_ADDR_MASK;
2149                         sp = page_header(root);
2150                         mmu_sync_children(vcpu, sp);
2151                 }
2152         }
2153 }
2154
2155 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2156 {
2157         spin_lock(&vcpu->kvm->mmu_lock);
2158         mmu_sync_roots(vcpu);
2159         spin_unlock(&vcpu->kvm->mmu_lock);
2160 }
2161
2162 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2163 {
2164         return vaddr;
2165 }
2166
2167 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2168                                 u32 error_code)
2169 {
2170         gfn_t gfn;
2171         int r;
2172
2173         pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2174         r = mmu_topup_memory_caches(vcpu);
2175         if (r)
2176                 return r;
2177
2178         ASSERT(vcpu);
2179         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2180
2181         gfn = gva >> PAGE_SHIFT;
2182
2183         return nonpaging_map(vcpu, gva & PAGE_MASK,
2184                              error_code & PFERR_WRITE_MASK, gfn);
2185 }
2186
2187 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2188                                 u32 error_code)
2189 {
2190         pfn_t pfn;
2191         int r;
2192         int level;
2193         gfn_t gfn = gpa >> PAGE_SHIFT;
2194         unsigned long mmu_seq;
2195
2196         ASSERT(vcpu);
2197         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2198
2199         r = mmu_topup_memory_caches(vcpu);
2200         if (r)
2201                 return r;
2202
2203         level = mapping_level(vcpu, gfn);
2204
2205         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2206
2207         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2208         smp_rmb();
2209         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2210         if (is_error_pfn(pfn)) {
2211                 kvm_release_pfn_clean(pfn);
2212                 return 1;
2213         }
2214         spin_lock(&vcpu->kvm->mmu_lock);
2215         if (mmu_notifier_retry(vcpu, mmu_seq))
2216                 goto out_unlock;
2217         kvm_mmu_free_some_pages(vcpu);
2218         r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2219                          level, gfn, pfn);
2220         spin_unlock(&vcpu->kvm->mmu_lock);
2221
2222         return r;
2223
2224 out_unlock:
2225         spin_unlock(&vcpu->kvm->mmu_lock);
2226         kvm_release_pfn_clean(pfn);
2227         return 0;
2228 }
2229
2230 static void nonpaging_free(struct kvm_vcpu *vcpu)
2231 {
2232         mmu_free_roots(vcpu);
2233 }
2234
2235 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2236 {
2237         struct kvm_mmu *context = &vcpu->arch.mmu;
2238
2239         context->new_cr3 = nonpaging_new_cr3;
2240         context->page_fault = nonpaging_page_fault;
2241         context->gva_to_gpa = nonpaging_gva_to_gpa;
2242         context->free = nonpaging_free;
2243         context->prefetch_page = nonpaging_prefetch_page;
2244         context->sync_page = nonpaging_sync_page;
2245         context->invlpg = nonpaging_invlpg;
2246         context->root_level = 0;
2247         context->shadow_root_level = PT32E_ROOT_LEVEL;
2248         context->root_hpa = INVALID_PAGE;
2249         return 0;
2250 }
2251
2252 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2253 {
2254         ++vcpu->stat.tlb_flush;
2255         kvm_x86_ops->tlb_flush(vcpu);
2256 }
2257
2258 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2259 {
2260         pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2261         mmu_free_roots(vcpu);
2262 }
2263
2264 static void inject_page_fault(struct kvm_vcpu *vcpu,
2265                               u64 addr,
2266                               u32 err_code)
2267 {
2268         kvm_inject_page_fault(vcpu, addr, err_code);
2269 }
2270
2271 static void paging_free(struct kvm_vcpu *vcpu)
2272 {
2273         nonpaging_free(vcpu);
2274 }
2275
2276 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2277 {
2278         int bit7;
2279
2280         bit7 = (gpte >> 7) & 1;
2281         return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2282 }
2283
2284 #define PTTYPE 64
2285 #include "paging_tmpl.h"
2286 #undef PTTYPE
2287
2288 #define PTTYPE 32
2289 #include "paging_tmpl.h"
2290 #undef PTTYPE
2291
2292 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2293 {
2294         struct kvm_mmu *context = &vcpu->arch.mmu;
2295         int maxphyaddr = cpuid_maxphyaddr(vcpu);
2296         u64 exb_bit_rsvd = 0;
2297
2298         if (!is_nx(vcpu))
2299                 exb_bit_rsvd = rsvd_bits(63, 63);
2300         switch (level) {
2301         case PT32_ROOT_LEVEL:
2302                 /* no rsvd bits for 2 level 4K page table entries */
2303                 context->rsvd_bits_mask[0][1] = 0;
2304                 context->rsvd_bits_mask[0][0] = 0;
2305                 if (is_cpuid_PSE36())
2306                         /* 36bits PSE 4MB page */
2307                         context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2308                 else
2309                         /* 32 bits PSE 4MB page */
2310                         context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2311                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2312                 break;
2313         case PT32E_ROOT_LEVEL:
2314                 context->rsvd_bits_mask[0][2] =
2315                         rsvd_bits(maxphyaddr, 63) |
2316                         rsvd_bits(7, 8) | rsvd_bits(1, 2);      /* PDPTE */
2317                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2318                         rsvd_bits(maxphyaddr, 62);      /* PDE */
2319                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2320                         rsvd_bits(maxphyaddr, 62);      /* PTE */
2321                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2322                         rsvd_bits(maxphyaddr, 62) |
2323                         rsvd_bits(13, 20);              /* large page */
2324                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2325                 break;
2326         case PT64_ROOT_LEVEL:
2327                 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2328                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2329                 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2330                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2331                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2332                         rsvd_bits(maxphyaddr, 51);
2333                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2334                         rsvd_bits(maxphyaddr, 51);
2335                 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2336                 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2337                         rsvd_bits(maxphyaddr, 51) |
2338                         rsvd_bits(13, 29);
2339                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2340                         rsvd_bits(maxphyaddr, 51) |
2341                         rsvd_bits(13, 20);              /* large page */
2342                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2343                 break;
2344         }
2345 }
2346
2347 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2348 {
2349         struct kvm_mmu *context = &vcpu->arch.mmu;
2350
2351         ASSERT(is_pae(vcpu));
2352         context->new_cr3 = paging_new_cr3;
2353         context->page_fault = paging64_page_fault;
2354         context->gva_to_gpa = paging64_gva_to_gpa;
2355         context->prefetch_page = paging64_prefetch_page;
2356         context->sync_page = paging64_sync_page;
2357         context->invlpg = paging64_invlpg;
2358         context->free = paging_free;
2359         context->root_level = level;
2360         context->shadow_root_level = level;
2361         context->root_hpa = INVALID_PAGE;
2362         return 0;
2363 }
2364
2365 static int paging64_init_context(struct kvm_vcpu *vcpu)
2366 {
2367         reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2368         return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2369 }
2370
2371 static int paging32_init_context(struct kvm_vcpu *vcpu)
2372 {
2373         struct kvm_mmu *context = &vcpu->arch.mmu;
2374
2375         reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2376         context->new_cr3 = paging_new_cr3;
2377         context->page_fault = paging32_page_fault;
2378         context->gva_to_gpa = paging32_gva_to_gpa;
2379         context->free = paging_free;
2380         context->prefetch_page = paging32_prefetch_page;
2381         context->sync_page = paging32_sync_page;
2382         context->invlpg = paging32_invlpg;
2383         context->root_level = PT32_ROOT_LEVEL;
2384         context->shadow_root_level = PT32E_ROOT_LEVEL;
2385         context->root_hpa = INVALID_PAGE;
2386         return 0;
2387 }
2388
2389 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2390 {
2391         reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2392         return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2393 }
2394
2395 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2396 {
2397         struct kvm_mmu *context = &vcpu->arch.mmu;
2398
2399         context->new_cr3 = nonpaging_new_cr3;
2400         context->page_fault = tdp_page_fault;
2401         context->free = nonpaging_free;
2402         context->prefetch_page = nonpaging_prefetch_page;
2403         context->sync_page = nonpaging_sync_page;
2404         context->invlpg = nonpaging_invlpg;
2405         context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2406         context->root_hpa = INVALID_PAGE;
2407
2408         if (!is_paging(vcpu)) {
2409                 context->gva_to_gpa = nonpaging_gva_to_gpa;
2410                 context->root_level = 0;
2411         } else if (is_long_mode(vcpu)) {
2412                 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2413                 context->gva_to_gpa = paging64_gva_to_gpa;
2414                 context->root_level = PT64_ROOT_LEVEL;
2415         } else if (is_pae(vcpu)) {
2416                 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2417                 context->gva_to_gpa = paging64_gva_to_gpa;
2418                 context->root_level = PT32E_ROOT_LEVEL;
2419         } else {
2420                 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2421                 context->gva_to_gpa = paging32_gva_to_gpa;
2422                 context->root_level = PT32_ROOT_LEVEL;
2423         }
2424
2425         return 0;
2426 }
2427
2428 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2429 {
2430         int r;
2431
2432         ASSERT(vcpu);
2433         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2434
2435         if (!is_paging(vcpu))
2436                 r = nonpaging_init_context(vcpu);
2437         else if (is_long_mode(vcpu))
2438                 r = paging64_init_context(vcpu);
2439         else if (is_pae(vcpu))
2440                 r = paging32E_init_context(vcpu);
2441         else
2442                 r = paging32_init_context(vcpu);
2443
2444         vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2445
2446         return r;
2447 }
2448
2449 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2450 {
2451         vcpu->arch.update_pte.pfn = bad_pfn;
2452
2453         if (tdp_enabled)
2454                 return init_kvm_tdp_mmu(vcpu);
2455         else
2456                 return init_kvm_softmmu(vcpu);
2457 }
2458
2459 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2460 {
2461         ASSERT(vcpu);
2462         if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2463                 vcpu->arch.mmu.free(vcpu);
2464                 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2465         }
2466 }
2467
2468 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2469 {
2470         destroy_kvm_mmu(vcpu);
2471         return init_kvm_mmu(vcpu);
2472 }
2473 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2474
2475 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2476 {
2477         int r;
2478
2479         r = mmu_topup_memory_caches(vcpu);
2480         if (r)
2481                 goto out;
2482         spin_lock(&vcpu->kvm->mmu_lock);
2483         kvm_mmu_free_some_pages(vcpu);
2484         r = mmu_alloc_roots(vcpu);
2485         mmu_sync_roots(vcpu);
2486         spin_unlock(&vcpu->kvm->mmu_lock);
2487         if (r)
2488                 goto out;
2489         /* set_cr3() should ensure TLB has been flushed */
2490         kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2491 out:
2492         return r;
2493 }
2494 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2495
2496 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2497 {
2498         mmu_free_roots(vcpu);
2499 }
2500
2501 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2502                                   struct kvm_mmu_page *sp,
2503                                   u64 *spte)
2504 {
2505         u64 pte;
2506         struct kvm_mmu_page *child;
2507
2508         pte = *spte;
2509         if (is_shadow_present_pte(pte)) {
2510                 if (is_last_spte(pte, sp->role.level))
2511                         rmap_remove(vcpu->kvm, spte);
2512                 else {
2513                         child = page_header(pte & PT64_BASE_ADDR_MASK);
2514                         mmu_page_remove_parent_pte(child, spte);
2515                 }
2516         }
2517         __set_spte(spte, shadow_trap_nonpresent_pte);
2518         if (is_large_pte(pte))
2519                 --vcpu->kvm->stat.lpages;
2520 }
2521
2522 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2523                                   struct kvm_mmu_page *sp,
2524                                   u64 *spte,
2525                                   const void *new)
2526 {
2527         if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2528                 ++vcpu->kvm->stat.mmu_pde_zapped;
2529                 return;
2530         }
2531
2532         ++vcpu->kvm->stat.mmu_pte_updated;
2533         if (sp->role.glevels == PT32_ROOT_LEVEL)
2534                 paging32_update_pte(vcpu, sp, spte, new);
2535         else
2536                 paging64_update_pte(vcpu, sp, spte, new);
2537 }
2538
2539 static bool need_remote_flush(u64 old, u64 new)
2540 {
2541         if (!is_shadow_present_pte(old))
2542                 return false;
2543         if (!is_shadow_present_pte(new))
2544                 return true;
2545         if ((old ^ new) & PT64_BASE_ADDR_MASK)
2546                 return true;
2547         old ^= PT64_NX_MASK;
2548         new ^= PT64_NX_MASK;
2549         return (old & ~new & PT64_PERM_MASK) != 0;
2550 }
2551
2552 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2553 {
2554         if (need_remote_flush(old, new))
2555                 kvm_flush_remote_tlbs(vcpu->kvm);
2556         else
2557                 kvm_mmu_flush_tlb(vcpu);
2558 }
2559
2560 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2561 {
2562         u64 *spte = vcpu->arch.last_pte_updated;
2563
2564         return !!(spte && (*spte & shadow_accessed_mask));
2565 }
2566
2567 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2568                                           const u8 *new, int bytes)
2569 {
2570         gfn_t gfn;
2571         int r;
2572         u64 gpte = 0;
2573         pfn_t pfn;
2574
2575         if (bytes != 4 && bytes != 8)
2576                 return;
2577
2578         /*
2579          * Assume that the pte write on a page table of the same type
2580          * as the current vcpu paging mode.  This is nearly always true
2581          * (might be false while changing modes).  Note it is verified later
2582          * by update_pte().
2583          */
2584         if (is_pae(vcpu)) {
2585                 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2586                 if ((bytes == 4) && (gpa % 4 == 0)) {
2587                         r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2588                         if (r)
2589                                 return;
2590                         memcpy((void *)&gpte + (gpa % 8), new, 4);
2591                 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2592                         memcpy((void *)&gpte, new, 8);
2593                 }
2594         } else {
2595                 if ((bytes == 4) && (gpa % 4 == 0))
2596                         memcpy((void *)&gpte, new, 4);
2597         }
2598         if (!is_present_gpte(gpte))
2599                 return;
2600         gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2601
2602         vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2603         smp_rmb();
2604         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2605
2606         if (is_error_pfn(pfn)) {
2607                 kvm_release_pfn_clean(pfn);
2608                 return;
2609         }
2610         vcpu->arch.update_pte.gfn = gfn;
2611         vcpu->arch.update_pte.pfn = pfn;
2612 }
2613
2614 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2615 {
2616         u64 *spte = vcpu->arch.last_pte_updated;
2617
2618         if (spte
2619             && vcpu->arch.last_pte_gfn == gfn
2620             && shadow_accessed_mask
2621             && !(*spte & shadow_accessed_mask)
2622             && is_shadow_present_pte(*spte))
2623                 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2624 }
2625
2626 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2627                        const u8 *new, int bytes,
2628                        bool guest_initiated)
2629 {
2630         gfn_t gfn = gpa >> PAGE_SHIFT;
2631         struct kvm_mmu_page *sp;
2632         struct hlist_node *node, *n;
2633         struct hlist_head *bucket;
2634         unsigned index;
2635         u64 entry, gentry;
2636         u64 *spte;
2637         unsigned offset = offset_in_page(gpa);
2638         unsigned pte_size;
2639         unsigned page_offset;
2640         unsigned misaligned;
2641         unsigned quadrant;
2642         int level;
2643         int flooded = 0;
2644         int npte;
2645         int r;
2646
2647         pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2648         mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
2649         spin_lock(&vcpu->kvm->mmu_lock);
2650         kvm_mmu_access_page(vcpu, gfn);
2651         kvm_mmu_free_some_pages(vcpu);
2652         ++vcpu->kvm->stat.mmu_pte_write;
2653         kvm_mmu_audit(vcpu, "pre pte write");
2654         if (guest_initiated) {
2655                 if (gfn == vcpu->arch.last_pt_write_gfn
2656                     && !last_updated_pte_accessed(vcpu)) {
2657                         ++vcpu->arch.last_pt_write_count;
2658                         if (vcpu->arch.last_pt_write_count >= 3)
2659                                 flooded = 1;
2660                 } else {
2661                         vcpu->arch.last_pt_write_gfn = gfn;
2662                         vcpu->arch.last_pt_write_count = 1;
2663                         vcpu->arch.last_pte_updated = NULL;
2664                 }
2665         }
2666         index = kvm_page_table_hashfn(gfn);
2667         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2668         hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2669                 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2670                         continue;
2671                 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
2672                 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2673                 misaligned |= bytes < 4;
2674                 if (misaligned || flooded) {
2675                         /*
2676                          * Misaligned accesses are too much trouble to fix
2677                          * up; also, they usually indicate a page is not used
2678                          * as a page table.
2679                          *
2680                          * If we're seeing too many writes to a page,
2681                          * it may no longer be a page table, or we may be
2682                          * forking, in which case it is better to unmap the
2683                          * page.
2684                          */
2685                         pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2686                                  gpa, bytes, sp->role.word);
2687                         if (kvm_mmu_zap_page(vcpu->kvm, sp))
2688                                 n = bucket->first;
2689                         ++vcpu->kvm->stat.mmu_flooded;
2690                         continue;
2691                 }
2692                 page_offset = offset;
2693                 level = sp->role.level;
2694                 npte = 1;
2695                 if (sp->role.glevels == PT32_ROOT_LEVEL) {
2696                         page_offset <<= 1;      /* 32->64 */
2697                         /*
2698                          * A 32-bit pde maps 4MB while the shadow pdes map
2699                          * only 2MB.  So we need to double the offset again
2700                          * and zap two pdes instead of one.
2701                          */
2702                         if (level == PT32_ROOT_LEVEL) {
2703                                 page_offset &= ~7; /* kill rounding error */
2704                                 page_offset <<= 1;
2705                                 npte = 2;
2706                         }
2707                         quadrant = page_offset >> PAGE_SHIFT;
2708                         page_offset &= ~PAGE_MASK;
2709                         if (quadrant != sp->role.quadrant)
2710                                 continue;
2711                 }
2712                 spte = &sp->spt[page_offset / sizeof(*spte)];
2713                 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2714                         gentry = 0;
2715                         r = kvm_read_guest_atomic(vcpu->kvm,
2716                                                   gpa & ~(u64)(pte_size - 1),
2717                                                   &gentry, pte_size);
2718                         new = (const void *)&gentry;
2719                         if (r < 0)
2720                                 new = NULL;
2721                 }
2722                 while (npte--) {
2723                         entry = *spte;
2724                         mmu_pte_write_zap_pte(vcpu, sp, spte);
2725                         if (new)
2726                                 mmu_pte_write_new_pte(vcpu, sp, spte, new);
2727                         mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2728                         ++spte;
2729                 }
2730         }
2731         kvm_mmu_audit(vcpu, "post pte write");
2732         spin_unlock(&vcpu->kvm->mmu_lock);
2733         if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2734                 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2735                 vcpu->arch.update_pte.pfn = bad_pfn;
2736         }
2737 }
2738
2739 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2740 {
2741         gpa_t gpa;
2742         int r;
2743
2744         if (tdp_enabled)
2745                 return 0;
2746
2747         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
2748
2749         spin_lock(&vcpu->kvm->mmu_lock);
2750         r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2751         spin_unlock(&vcpu->kvm->mmu_lock);
2752         return r;
2753 }
2754 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2755
2756 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2757 {
2758         while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2759                !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2760                 struct kvm_mmu_page *sp;
2761
2762                 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2763                                   struct kvm_mmu_page, link);
2764                 kvm_mmu_zap_page(vcpu->kvm, sp);
2765                 ++vcpu->kvm->stat.mmu_recycled;
2766         }
2767 }
2768
2769 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2770 {
2771         int r;
2772         enum emulation_result er;
2773
2774         r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2775         if (r < 0)
2776                 goto out;
2777
2778         if (!r) {
2779                 r = 1;
2780                 goto out;
2781         }
2782
2783         r = mmu_topup_memory_caches(vcpu);
2784         if (r)
2785                 goto out;
2786
2787         er = emulate_instruction(vcpu, cr2, error_code, 0);
2788
2789         switch (er) {
2790         case EMULATE_DONE:
2791                 return 1;
2792         case EMULATE_DO_MMIO:
2793                 ++vcpu->stat.mmio_exits;
2794                 return 0;
2795         case EMULATE_FAIL:
2796                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2797                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
2798                 vcpu->run->internal.ndata = 0;
2799                 return 0;
2800         default:
2801                 BUG();
2802         }
2803 out:
2804         return r;
2805 }
2806 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2807
2808 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2809 {
2810         vcpu->arch.mmu.invlpg(vcpu, gva);
2811         kvm_mmu_flush_tlb(vcpu);
2812         ++vcpu->stat.invlpg;
2813 }
2814 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2815
2816 void kvm_enable_tdp(void)
2817 {
2818         tdp_enabled = true;
2819 }
2820 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2821
2822 void kvm_disable_tdp(void)
2823 {
2824         tdp_enabled = false;
2825 }
2826 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2827
2828 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2829 {
2830         free_page((unsigned long)vcpu->arch.mmu.pae_root);
2831 }
2832
2833 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2834 {
2835         struct page *page;
2836         int i;
2837
2838         ASSERT(vcpu);
2839
2840         /*
2841          * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2842          * Therefore we need to allocate shadow page tables in the first
2843          * 4GB of memory, which happens to fit the DMA32 zone.
2844          */
2845         page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2846         if (!page)
2847                 goto error_1;
2848         vcpu->arch.mmu.pae_root = page_address(page);
2849         for (i = 0; i < 4; ++i)
2850                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2851
2852         return 0;
2853
2854 error_1:
2855         free_mmu_pages(vcpu);
2856         return -ENOMEM;
2857 }
2858
2859 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2860 {
2861         ASSERT(vcpu);
2862         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2863
2864         return alloc_mmu_pages(vcpu);
2865 }
2866
2867 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2868 {
2869         ASSERT(vcpu);
2870         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2871
2872         return init_kvm_mmu(vcpu);
2873 }
2874
2875 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2876 {
2877         ASSERT(vcpu);
2878
2879         destroy_kvm_mmu(vcpu);
2880         free_mmu_pages(vcpu);
2881         mmu_free_memory_caches(vcpu);
2882 }
2883
2884 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2885 {
2886         struct kvm_mmu_page *sp;
2887
2888         list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2889                 int i;
2890                 u64 *pt;
2891
2892                 if (!test_bit(slot, sp->slot_bitmap))
2893                         continue;
2894
2895                 pt = sp->spt;
2896                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2897                         /* avoid RMW */
2898                         if (pt[i] & PT_WRITABLE_MASK)
2899                                 pt[i] &= ~PT_WRITABLE_MASK;
2900         }
2901         kvm_flush_remote_tlbs(kvm);
2902 }
2903
2904 void kvm_mmu_zap_all(struct kvm *kvm)
2905 {
2906         struct kvm_mmu_page *sp, *node;
2907
2908         spin_lock(&kvm->mmu_lock);
2909         list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2910                 if (kvm_mmu_zap_page(kvm, sp))
2911                         node = container_of(kvm->arch.active_mmu_pages.next,
2912                                             struct kvm_mmu_page, link);
2913         spin_unlock(&kvm->mmu_lock);
2914
2915         kvm_flush_remote_tlbs(kvm);
2916 }
2917
2918 static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
2919 {
2920         struct kvm_mmu_page *page;
2921
2922         page = container_of(kvm->arch.active_mmu_pages.prev,
2923                             struct kvm_mmu_page, link);
2924         kvm_mmu_zap_page(kvm, page);
2925 }
2926
2927 static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2928 {
2929         struct kvm *kvm;
2930         struct kvm *kvm_freed = NULL;
2931         int cache_count = 0;
2932
2933         spin_lock(&kvm_lock);
2934
2935         list_for_each_entry(kvm, &vm_list, vm_list) {
2936                 int npages, idx;
2937
2938                 idx = srcu_read_lock(&kvm->srcu);
2939                 spin_lock(&kvm->mmu_lock);
2940                 npages = kvm->arch.n_alloc_mmu_pages -
2941                          kvm->arch.n_free_mmu_pages;
2942                 cache_count += npages;
2943                 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2944                         kvm_mmu_remove_one_alloc_mmu_page(kvm);
2945                         cache_count--;
2946                         kvm_freed = kvm;
2947                 }
2948                 nr_to_scan--;
2949
2950                 spin_unlock(&kvm->mmu_lock);
2951                 srcu_read_unlock(&kvm->srcu, idx);
2952         }
2953         if (kvm_freed)
2954                 list_move_tail(&kvm_freed->vm_list, &vm_list);
2955
2956         spin_unlock(&kvm_lock);
2957
2958         return cache_count;
2959 }
2960
2961 static struct shrinker mmu_shrinker = {
2962         .shrink = mmu_shrink,
2963         .seeks = DEFAULT_SEEKS * 10,
2964 };
2965
2966 static void mmu_destroy_caches(void)
2967 {
2968         if (pte_chain_cache)
2969                 kmem_cache_destroy(pte_chain_cache);
2970         if (rmap_desc_cache)
2971                 kmem_cache_destroy(rmap_desc_cache);
2972         if (mmu_page_header_cache)
2973                 kmem_cache_destroy(mmu_page_header_cache);
2974 }
2975
2976 void kvm_mmu_module_exit(void)
2977 {
2978         mmu_destroy_caches();
2979         unregister_shrinker(&mmu_shrinker);
2980 }
2981
2982 int kvm_mmu_module_init(void)
2983 {
2984         pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2985                                             sizeof(struct kvm_pte_chain),
2986                                             0, 0, NULL);
2987         if (!pte_chain_cache)
2988                 goto nomem;
2989         rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2990                                             sizeof(struct kvm_rmap_desc),
2991                                             0, 0, NULL);
2992         if (!rmap_desc_cache)
2993                 goto nomem;
2994
2995         mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2996                                                   sizeof(struct kvm_mmu_page),
2997                                                   0, 0, NULL);
2998         if (!mmu_page_header_cache)
2999                 goto nomem;
3000
3001         register_shrinker(&mmu_shrinker);
3002
3003         return 0;
3004
3005 nomem:
3006         mmu_destroy_caches();
3007         return -ENOMEM;
3008 }
3009
3010 /*
3011  * Caculate mmu pages needed for kvm.
3012  */
3013 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3014 {
3015         int i;
3016         unsigned int nr_mmu_pages;
3017         unsigned int  nr_pages = 0;
3018         struct kvm_memslots *slots;
3019
3020         slots = rcu_dereference(kvm->memslots);
3021         for (i = 0; i < slots->nmemslots; i++)
3022                 nr_pages += slots->memslots[i].npages;
3023
3024         nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3025         nr_mmu_pages = max(nr_mmu_pages,
3026                         (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3027
3028         return nr_mmu_pages;
3029 }
3030
3031 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3032                                 unsigned len)
3033 {
3034         if (len > buffer->len)
3035                 return NULL;
3036         return buffer->ptr;
3037 }
3038
3039 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3040                                 unsigned len)
3041 {
3042         void *ret;
3043
3044         ret = pv_mmu_peek_buffer(buffer, len);
3045         if (!ret)
3046                 return ret;
3047         buffer->ptr += len;
3048         buffer->len -= len;
3049         buffer->processed += len;
3050         return ret;
3051 }
3052
3053 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3054                              gpa_t addr, gpa_t value)
3055 {
3056         int bytes = 8;
3057         int r;
3058
3059         if (!is_long_mode(vcpu) && !is_pae(vcpu))
3060                 bytes = 4;
3061
3062         r = mmu_topup_memory_caches(vcpu);
3063         if (r)
3064                 return r;
3065
3066         if (!emulator_write_phys(vcpu, addr, &value, bytes))
3067                 return -EFAULT;
3068
3069         return 1;
3070 }
3071
3072 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3073 {
3074         kvm_set_cr3(vcpu, vcpu->arch.cr3);
3075         return 1;
3076 }
3077
3078 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3079 {
3080         spin_lock(&vcpu->kvm->mmu_lock);
3081         mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3082         spin_unlock(&vcpu->kvm->mmu_lock);
3083         return 1;
3084 }
3085
3086 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3087                              struct kvm_pv_mmu_op_buffer *buffer)
3088 {
3089         struct kvm_mmu_op_header *header;
3090
3091         header = pv_mmu_peek_buffer(buffer, sizeof *header);
3092         if (!header)
3093                 return 0;
3094         switch (header->op) {
3095         case KVM_MMU_OP_WRITE_PTE: {
3096                 struct kvm_mmu_op_write_pte *wpte;
3097
3098                 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3099                 if (!wpte)
3100                         return 0;
3101                 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3102                                         wpte->pte_val);
3103         }
3104         case KVM_MMU_OP_FLUSH_TLB: {
3105                 struct kvm_mmu_op_flush_tlb *ftlb;
3106
3107                 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3108                 if (!ftlb)
3109                         return 0;
3110                 return kvm_pv_mmu_flush_tlb(vcpu);
3111         }
3112         case KVM_MMU_OP_RELEASE_PT: {
3113                 struct kvm_mmu_op_release_pt *rpt;
3114
3115                 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3116                 if (!rpt)
3117                         return 0;
3118                 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3119         }
3120         default: return 0;
3121         }
3122 }
3123
3124 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3125                   gpa_t addr, unsigned long *ret)
3126 {
3127         int r;
3128         struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3129
3130         buffer->ptr = buffer->buf;
3131         buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3132         buffer->processed = 0;
3133
3134         r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3135         if (r)
3136                 goto out;
3137
3138         while (buffer->len) {
3139                 r = kvm_pv_mmu_op_one(vcpu, buffer);
3140                 if (r < 0)
3141                         goto out;
3142                 if (r == 0)
3143                         break;
3144         }
3145
3146         r = 1;
3147 out:
3148         *ret = buffer->processed;
3149         return r;
3150 }
3151
3152 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3153 {
3154         struct kvm_shadow_walk_iterator iterator;
3155         int nr_sptes = 0;
3156
3157         spin_lock(&vcpu->kvm->mmu_lock);
3158         for_each_shadow_entry(vcpu, addr, iterator) {
3159                 sptes[iterator.level-1] = *iterator.sptep;
3160                 nr_sptes++;
3161                 if (!is_shadow_present_pte(*iterator.sptep))
3162                         break;
3163         }
3164         spin_unlock(&vcpu->kvm->mmu_lock);
3165
3166         return nr_sptes;
3167 }
3168 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3169
3170 #ifdef AUDIT
3171
3172 static const char *audit_msg;
3173
3174 static gva_t canonicalize(gva_t gva)
3175 {
3176 #ifdef CONFIG_X86_64
3177         gva = (long long)(gva << 16) >> 16;
3178 #endif
3179         return gva;
3180 }
3181
3182
3183 typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp,
3184                                  u64 *sptep);
3185
3186 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3187                             inspect_spte_fn fn)
3188 {
3189         int i;
3190
3191         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3192                 u64 ent = sp->spt[i];
3193
3194                 if (is_shadow_present_pte(ent)) {
3195                         if (!is_last_spte(ent, sp->role.level)) {
3196                                 struct kvm_mmu_page *child;
3197                                 child = page_header(ent & PT64_BASE_ADDR_MASK);
3198                                 __mmu_spte_walk(kvm, child, fn);
3199                         } else
3200                                 fn(kvm, sp, &sp->spt[i]);
3201                 }
3202         }
3203 }
3204
3205 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3206 {
3207         int i;
3208         struct kvm_mmu_page *sp;
3209
3210         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3211                 return;
3212         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3213                 hpa_t root = vcpu->arch.mmu.root_hpa;
3214                 sp = page_header(root);
3215                 __mmu_spte_walk(vcpu->kvm, sp, fn);
3216                 return;
3217         }
3218         for (i = 0; i < 4; ++i) {
3219                 hpa_t root = vcpu->arch.mmu.pae_root[i];
3220
3221                 if (root && VALID_PAGE(root)) {
3222                         root &= PT64_BASE_ADDR_MASK;
3223                         sp = page_header(root);
3224                         __mmu_spte_walk(vcpu->kvm, sp, fn);
3225                 }
3226         }
3227         return;
3228 }
3229
3230 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3231                                 gva_t va, int level)
3232 {
3233         u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3234         int i;
3235         gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3236
3237         for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3238                 u64 ent = pt[i];
3239
3240                 if (ent == shadow_trap_nonpresent_pte)
3241                         continue;
3242
3243                 va = canonicalize(va);
3244                 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3245                         audit_mappings_page(vcpu, ent, va, level - 1);
3246                 else {
3247                         gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
3248                         gfn_t gfn = gpa >> PAGE_SHIFT;
3249                         pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3250                         hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3251
3252                         if (is_error_pfn(pfn)) {
3253                                 kvm_release_pfn_clean(pfn);
3254                                 continue;
3255                         }
3256
3257                         if (is_shadow_present_pte(ent)
3258                             && (ent & PT64_BASE_ADDR_MASK) != hpa)
3259                                 printk(KERN_ERR "xx audit error: (%s) levels %d"
3260                                        " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3261                                        audit_msg, vcpu->arch.mmu.root_level,
3262                                        va, gpa, hpa, ent,
3263                                        is_shadow_present_pte(ent));
3264                         else if (ent == shadow_notrap_nonpresent_pte
3265                                  && !is_error_hpa(hpa))
3266                                 printk(KERN_ERR "audit: (%s) notrap shadow,"
3267                                        " valid guest gva %lx\n", audit_msg, va);
3268                         kvm_release_pfn_clean(pfn);
3269
3270                 }
3271         }
3272 }
3273
3274 static void audit_mappings(struct kvm_vcpu *vcpu)
3275 {
3276         unsigned i;
3277
3278         if (vcpu->arch.mmu.root_level == 4)
3279                 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3280         else
3281                 for (i = 0; i < 4; ++i)
3282                         if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3283                                 audit_mappings_page(vcpu,
3284                                                     vcpu->arch.mmu.pae_root[i],
3285                                                     i << 30,
3286                                                     2);
3287 }
3288
3289 static int count_rmaps(struct kvm_vcpu *vcpu)
3290 {
3291         int nmaps = 0;
3292         int i, j, k, idx;
3293
3294         idx = srcu_read_lock(&kvm->srcu);
3295         slots = rcu_dereference(kvm->memslots);
3296         for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3297                 struct kvm_memory_slot *m = &slots->memslots[i];
3298                 struct kvm_rmap_desc *d;
3299
3300                 for (j = 0; j < m->npages; ++j) {
3301                         unsigned long *rmapp = &m->rmap[j];
3302
3303                         if (!*rmapp)
3304                                 continue;
3305                         if (!(*rmapp & 1)) {
3306                                 ++nmaps;
3307                                 continue;
3308                         }
3309                         d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3310                         while (d) {
3311                                 for (k = 0; k < RMAP_EXT; ++k)
3312                                         if (d->sptes[k])
3313                                                 ++nmaps;
3314                                         else
3315                                                 break;
3316                                 d = d->more;
3317                         }
3318                 }
3319         }
3320         srcu_read_unlock(&kvm->srcu, idx);
3321         return nmaps;
3322 }
3323
3324 void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep)
3325 {
3326         unsigned long *rmapp;
3327         struct kvm_mmu_page *rev_sp;
3328         gfn_t gfn;
3329
3330         if (*sptep & PT_WRITABLE_MASK) {
3331                 rev_sp = page_header(__pa(sptep));
3332                 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3333
3334                 if (!gfn_to_memslot(kvm, gfn)) {
3335                         if (!printk_ratelimit())
3336                                 return;
3337                         printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3338                                          audit_msg, gfn);
3339                         printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3340                                         audit_msg, sptep - rev_sp->spt,
3341                                         rev_sp->gfn);
3342                         dump_stack();
3343                         return;
3344                 }
3345
3346                 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3347                                     is_large_pte(*sptep));
3348                 if (!*rmapp) {
3349                         if (!printk_ratelimit())
3350                                 return;
3351                         printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3352                                          audit_msg, *sptep);
3353                         dump_stack();
3354                 }
3355         }
3356
3357 }
3358
3359 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3360 {
3361         mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3362 }
3363
3364 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3365 {
3366         struct kvm_mmu_page *sp;
3367         int i;
3368
3369         list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3370                 u64 *pt = sp->spt;
3371
3372                 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3373                         continue;
3374
3375                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3376                         u64 ent = pt[i];
3377
3378                         if (!(ent & PT_PRESENT_MASK))
3379                                 continue;
3380                         if (!(ent & PT_WRITABLE_MASK))
3381                                 continue;
3382                         inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]);
3383                 }
3384         }
3385         return;
3386 }
3387
3388 static void audit_rmap(struct kvm_vcpu *vcpu)
3389 {
3390         check_writable_mappings_rmap(vcpu);
3391         count_rmaps(vcpu);
3392 }
3393
3394 static void audit_write_protection(struct kvm_vcpu *vcpu)
3395 {
3396         struct kvm_mmu_page *sp;
3397         struct kvm_memory_slot *slot;
3398         unsigned long *rmapp;
3399         u64 *spte;
3400         gfn_t gfn;
3401
3402         list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3403                 if (sp->role.direct)
3404                         continue;
3405                 if (sp->unsync)
3406                         continue;
3407
3408                 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3409                 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3410                 rmapp = &slot->rmap[gfn - slot->base_gfn];
3411
3412                 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3413                 while (spte) {
3414                         if (*spte & PT_WRITABLE_MASK)
3415                                 printk(KERN_ERR "%s: (%s) shadow page has "
3416                                 "writable mappings: gfn %lx role %x\n",
3417                                __func__, audit_msg, sp->gfn,
3418                                sp->role.word);
3419                         spte = rmap_next(vcpu->kvm, rmapp, spte);
3420                 }
3421         }
3422 }
3423
3424 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3425 {
3426         int olddbg = dbg;
3427
3428         dbg = 0;
3429         audit_msg = msg;
3430         audit_rmap(vcpu);
3431         audit_write_protection(vcpu);
3432         if (strcmp("pre pte write", audit_msg) != 0)
3433                 audit_mappings(vcpu);
3434         audit_writable_sptes_have_rmaps(vcpu);
3435         dbg = olddbg;
3436 }
3437
3438 #endif