2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
21 #include "kvm_cache_regs.h"
23 #include <linux/kvm_host.h>
24 #include <linux/types.h>
25 #include <linux/string.h>
27 #include <linux/highmem.h>
28 #include <linux/module.h>
29 #include <linux/swap.h>
30 #include <linux/hugetlb.h>
31 #include <linux/compiler.h>
32 #include <linux/srcu.h>
35 #include <asm/cmpxchg.h>
40 * When setting this variable to true it enables Two-Dimensional-Paging
41 * where the hardware walks 2 page tables:
42 * 1. the guest-virtual to guest-physical
43 * 2. while doing 1. it walks guest-physical to host-physical
44 * If the hardware supports that we don't need to do shadow paging.
46 bool tdp_enabled = false;
53 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
55 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
60 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
61 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
65 #define pgprintk(x...) do { } while (0)
66 #define rmap_printk(x...) do { } while (0)
70 #if defined(MMU_DEBUG) || defined(AUDIT)
72 module_param(dbg, bool, 0644);
75 static int oos_shadow = 1;
76 module_param(oos_shadow, bool, 0644);
79 #define ASSERT(x) do { } while (0)
83 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
84 __FILE__, __LINE__, #x); \
88 #define PT_FIRST_AVAIL_BITS_SHIFT 9
89 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
91 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
93 #define PT64_LEVEL_BITS 9
95 #define PT64_LEVEL_SHIFT(level) \
96 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
98 #define PT64_LEVEL_MASK(level) \
99 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
101 #define PT64_INDEX(address, level)\
102 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
105 #define PT32_LEVEL_BITS 10
107 #define PT32_LEVEL_SHIFT(level) \
108 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
110 #define PT32_LEVEL_MASK(level) \
111 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
112 #define PT32_LVL_OFFSET_MASK(level) \
113 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
114 * PT32_LEVEL_BITS))) - 1))
116 #define PT32_INDEX(address, level)\
117 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
120 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
121 #define PT64_DIR_BASE_ADDR_MASK \
122 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
123 #define PT64_LVL_ADDR_MASK(level) \
124 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
125 * PT64_LEVEL_BITS))) - 1))
126 #define PT64_LVL_OFFSET_MASK(level) \
127 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
128 * PT64_LEVEL_BITS))) - 1))
130 #define PT32_BASE_ADDR_MASK PAGE_MASK
131 #define PT32_DIR_BASE_ADDR_MASK \
132 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
133 #define PT32_LVL_ADDR_MASK(level) \
134 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
135 * PT32_LEVEL_BITS))) - 1))
137 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
140 #define PFERR_PRESENT_MASK (1U << 0)
141 #define PFERR_WRITE_MASK (1U << 1)
142 #define PFERR_USER_MASK (1U << 2)
143 #define PFERR_RSVD_MASK (1U << 3)
144 #define PFERR_FETCH_MASK (1U << 4)
148 #define ACC_EXEC_MASK 1
149 #define ACC_WRITE_MASK PT_WRITABLE_MASK
150 #define ACC_USER_MASK PT_USER_MASK
151 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
153 #define CREATE_TRACE_POINTS
154 #include "mmutrace.h"
156 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
158 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
160 struct kvm_rmap_desc {
161 u64 *sptes[RMAP_EXT];
162 struct kvm_rmap_desc *more;
165 struct kvm_shadow_walk_iterator {
173 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
174 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
175 shadow_walk_okay(&(_walker)); \
176 shadow_walk_next(&(_walker)))
179 struct kvm_unsync_walk {
180 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
183 typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
185 static struct kmem_cache *pte_chain_cache;
186 static struct kmem_cache *rmap_desc_cache;
187 static struct kmem_cache *mmu_page_header_cache;
189 static u64 __read_mostly shadow_trap_nonpresent_pte;
190 static u64 __read_mostly shadow_notrap_nonpresent_pte;
191 static u64 __read_mostly shadow_base_present_pte;
192 static u64 __read_mostly shadow_nx_mask;
193 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
194 static u64 __read_mostly shadow_user_mask;
195 static u64 __read_mostly shadow_accessed_mask;
196 static u64 __read_mostly shadow_dirty_mask;
198 static inline u64 rsvd_bits(int s, int e)
200 return ((1ULL << (e - s + 1)) - 1) << s;
203 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
205 shadow_trap_nonpresent_pte = trap_pte;
206 shadow_notrap_nonpresent_pte = notrap_pte;
208 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
210 void kvm_mmu_set_base_ptes(u64 base_pte)
212 shadow_base_present_pte = base_pte;
214 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
216 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
217 u64 dirty_mask, u64 nx_mask, u64 x_mask)
219 shadow_user_mask = user_mask;
220 shadow_accessed_mask = accessed_mask;
221 shadow_dirty_mask = dirty_mask;
222 shadow_nx_mask = nx_mask;
223 shadow_x_mask = x_mask;
225 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
227 static int is_write_protection(struct kvm_vcpu *vcpu)
229 return vcpu->arch.cr0 & X86_CR0_WP;
232 static int is_cpuid_PSE36(void)
237 static int is_nx(struct kvm_vcpu *vcpu)
239 return vcpu->arch.shadow_efer & EFER_NX;
242 static int is_shadow_present_pte(u64 pte)
244 return pte != shadow_trap_nonpresent_pte
245 && pte != shadow_notrap_nonpresent_pte;
248 static int is_large_pte(u64 pte)
250 return pte & PT_PAGE_SIZE_MASK;
253 static int is_writeble_pte(unsigned long pte)
255 return pte & PT_WRITABLE_MASK;
258 static int is_dirty_gpte(unsigned long pte)
260 return pte & PT_DIRTY_MASK;
263 static int is_rmap_spte(u64 pte)
265 return is_shadow_present_pte(pte);
268 static int is_last_spte(u64 pte, int level)
270 if (level == PT_PAGE_TABLE_LEVEL)
272 if (is_large_pte(pte))
277 static pfn_t spte_to_pfn(u64 pte)
279 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
282 static gfn_t pse36_gfn_delta(u32 gpte)
284 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
286 return (gpte & PT32_DIR_PSE36_MASK) << shift;
289 static void __set_spte(u64 *sptep, u64 spte)
292 set_64bit((unsigned long *)sptep, spte);
294 set_64bit((unsigned long long *)sptep, spte);
298 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
299 struct kmem_cache *base_cache, int min)
303 if (cache->nobjs >= min)
305 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
306 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
309 cache->objects[cache->nobjs++] = obj;
314 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
317 kfree(mc->objects[--mc->nobjs]);
320 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
325 if (cache->nobjs >= min)
327 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
328 page = alloc_page(GFP_KERNEL);
331 set_page_private(page, 0);
332 cache->objects[cache->nobjs++] = page_address(page);
337 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
340 free_page((unsigned long)mc->objects[--mc->nobjs]);
343 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
347 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
351 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
355 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
358 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
359 mmu_page_header_cache, 4);
364 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
366 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
367 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
368 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
369 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
372 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
378 p = mc->objects[--mc->nobjs];
382 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
384 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
385 sizeof(struct kvm_pte_chain));
388 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
393 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
395 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
396 sizeof(struct kvm_rmap_desc));
399 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
405 * Return the pointer to the largepage write count for a given
406 * gfn, handling slots that are not large page aligned.
408 static int *slot_largepage_idx(gfn_t gfn,
409 struct kvm_memory_slot *slot,
414 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
415 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
416 return &slot->lpage_info[level - 2][idx].write_count;
419 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
421 struct kvm_memory_slot *slot;
425 gfn = unalias_gfn(kvm, gfn);
427 slot = gfn_to_memslot_unaliased(kvm, gfn);
428 for (i = PT_DIRECTORY_LEVEL;
429 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
430 write_count = slot_largepage_idx(gfn, slot, i);
435 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
437 struct kvm_memory_slot *slot;
441 gfn = unalias_gfn(kvm, gfn);
442 for (i = PT_DIRECTORY_LEVEL;
443 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
444 slot = gfn_to_memslot_unaliased(kvm, gfn);
445 write_count = slot_largepage_idx(gfn, slot, i);
447 WARN_ON(*write_count < 0);
451 static int has_wrprotected_page(struct kvm *kvm,
455 struct kvm_memory_slot *slot;
458 gfn = unalias_gfn(kvm, gfn);
459 slot = gfn_to_memslot_unaliased(kvm, gfn);
461 largepage_idx = slot_largepage_idx(gfn, slot, level);
462 return *largepage_idx;
468 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
470 unsigned long page_size = PAGE_SIZE;
471 struct vm_area_struct *vma;
475 addr = gfn_to_hva(kvm, gfn);
476 if (kvm_is_error_hva(addr))
477 return PT_PAGE_TABLE_LEVEL;
479 down_read(¤t->mm->mmap_sem);
480 vma = find_vma(current->mm, addr);
484 page_size = vma_kernel_pagesize(vma);
487 up_read(¤t->mm->mmap_sem);
489 for (i = PT_PAGE_TABLE_LEVEL;
490 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
491 if (page_size >= KVM_HPAGE_SIZE(i))
500 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
502 struct kvm_memory_slot *slot;
504 int level = PT_PAGE_TABLE_LEVEL;
506 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
507 if (slot && slot->dirty_bitmap)
508 return PT_PAGE_TABLE_LEVEL;
510 host_level = host_mapping_level(vcpu->kvm, large_gfn);
512 if (host_level == PT_PAGE_TABLE_LEVEL)
515 for (level = PT_DIRECTORY_LEVEL; level <= host_level; ++level)
516 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
523 * Take gfn and return the reverse mapping to it.
524 * Note: gfn must be unaliased before this function get called
527 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
529 struct kvm_memory_slot *slot;
532 slot = gfn_to_memslot(kvm, gfn);
533 if (likely(level == PT_PAGE_TABLE_LEVEL))
534 return &slot->rmap[gfn - slot->base_gfn];
536 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
537 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
539 return &slot->lpage_info[level - 2][idx].rmap_pde;
543 * Reverse mapping data structures:
545 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
546 * that points to page_address(page).
548 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
549 * containing more mappings.
551 * Returns the number of rmap entries before the spte was added or zero if
552 * the spte was not added.
555 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
557 struct kvm_mmu_page *sp;
558 struct kvm_rmap_desc *desc;
559 unsigned long *rmapp;
562 if (!is_rmap_spte(*spte))
564 gfn = unalias_gfn(vcpu->kvm, gfn);
565 sp = page_header(__pa(spte));
566 sp->gfns[spte - sp->spt] = gfn;
567 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
569 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
570 *rmapp = (unsigned long)spte;
571 } else if (!(*rmapp & 1)) {
572 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
573 desc = mmu_alloc_rmap_desc(vcpu);
574 desc->sptes[0] = (u64 *)*rmapp;
575 desc->sptes[1] = spte;
576 *rmapp = (unsigned long)desc | 1;
578 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
579 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
580 while (desc->sptes[RMAP_EXT-1] && desc->more) {
584 if (desc->sptes[RMAP_EXT-1]) {
585 desc->more = mmu_alloc_rmap_desc(vcpu);
588 for (i = 0; desc->sptes[i]; ++i)
590 desc->sptes[i] = spte;
595 static void rmap_desc_remove_entry(unsigned long *rmapp,
596 struct kvm_rmap_desc *desc,
598 struct kvm_rmap_desc *prev_desc)
602 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
604 desc->sptes[i] = desc->sptes[j];
605 desc->sptes[j] = NULL;
608 if (!prev_desc && !desc->more)
609 *rmapp = (unsigned long)desc->sptes[0];
612 prev_desc->more = desc->more;
614 *rmapp = (unsigned long)desc->more | 1;
615 mmu_free_rmap_desc(desc);
618 static void rmap_remove(struct kvm *kvm, u64 *spte)
620 struct kvm_rmap_desc *desc;
621 struct kvm_rmap_desc *prev_desc;
622 struct kvm_mmu_page *sp;
624 unsigned long *rmapp;
627 if (!is_rmap_spte(*spte))
629 sp = page_header(__pa(spte));
630 pfn = spte_to_pfn(*spte);
631 if (*spte & shadow_accessed_mask)
632 kvm_set_pfn_accessed(pfn);
633 if (is_writeble_pte(*spte))
634 kvm_set_pfn_dirty(pfn);
635 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
637 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
639 } else if (!(*rmapp & 1)) {
640 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
641 if ((u64 *)*rmapp != spte) {
642 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
648 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
649 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
652 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
653 if (desc->sptes[i] == spte) {
654 rmap_desc_remove_entry(rmapp,
662 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
667 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
669 struct kvm_rmap_desc *desc;
670 struct kvm_rmap_desc *prev_desc;
676 else if (!(*rmapp & 1)) {
678 return (u64 *)*rmapp;
681 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
685 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
686 if (prev_spte == spte)
687 return desc->sptes[i];
688 prev_spte = desc->sptes[i];
695 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
697 unsigned long *rmapp;
699 int i, write_protected = 0;
701 gfn = unalias_gfn(kvm, gfn);
702 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
704 spte = rmap_next(kvm, rmapp, NULL);
707 BUG_ON(!(*spte & PT_PRESENT_MASK));
708 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
709 if (is_writeble_pte(*spte)) {
710 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
713 spte = rmap_next(kvm, rmapp, spte);
715 if (write_protected) {
718 spte = rmap_next(kvm, rmapp, NULL);
719 pfn = spte_to_pfn(*spte);
720 kvm_set_pfn_dirty(pfn);
723 /* check for huge page mappings */
724 for (i = PT_DIRECTORY_LEVEL;
725 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
726 rmapp = gfn_to_rmap(kvm, gfn, i);
727 spte = rmap_next(kvm, rmapp, NULL);
730 BUG_ON(!(*spte & PT_PRESENT_MASK));
731 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
732 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
733 if (is_writeble_pte(*spte)) {
734 rmap_remove(kvm, spte);
736 __set_spte(spte, shadow_trap_nonpresent_pte);
740 spte = rmap_next(kvm, rmapp, spte);
744 return write_protected;
747 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
751 int need_tlb_flush = 0;
753 while ((spte = rmap_next(kvm, rmapp, NULL))) {
754 BUG_ON(!(*spte & PT_PRESENT_MASK));
755 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
756 rmap_remove(kvm, spte);
757 __set_spte(spte, shadow_trap_nonpresent_pte);
760 return need_tlb_flush;
763 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
768 pte_t *ptep = (pte_t *)data;
771 WARN_ON(pte_huge(*ptep));
772 new_pfn = pte_pfn(*ptep);
773 spte = rmap_next(kvm, rmapp, NULL);
775 BUG_ON(!is_shadow_present_pte(*spte));
776 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
778 if (pte_write(*ptep)) {
779 rmap_remove(kvm, spte);
780 __set_spte(spte, shadow_trap_nonpresent_pte);
781 spte = rmap_next(kvm, rmapp, NULL);
783 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
784 new_spte |= (u64)new_pfn << PAGE_SHIFT;
786 new_spte &= ~PT_WRITABLE_MASK;
787 new_spte &= ~SPTE_HOST_WRITEABLE;
788 if (is_writeble_pte(*spte))
789 kvm_set_pfn_dirty(spte_to_pfn(*spte));
790 __set_spte(spte, new_spte);
791 spte = rmap_next(kvm, rmapp, spte);
795 kvm_flush_remote_tlbs(kvm);
800 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
802 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
807 struct kvm_memslots *slots;
809 slots = rcu_dereference(kvm->memslots);
811 for (i = 0; i < slots->nmemslots; i++) {
812 struct kvm_memory_slot *memslot = &slots->memslots[i];
813 unsigned long start = memslot->userspace_addr;
816 end = start + (memslot->npages << PAGE_SHIFT);
817 if (hva >= start && hva < end) {
818 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
820 retval |= handler(kvm, &memslot->rmap[gfn_offset],
823 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
824 int idx = gfn_offset;
825 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
826 retval |= handler(kvm,
827 &memslot->lpage_info[j][idx].rmap_pde,
836 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
838 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
841 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
843 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
846 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
852 /* always return old for EPT */
853 if (!shadow_accessed_mask)
856 spte = rmap_next(kvm, rmapp, NULL);
860 BUG_ON(!(_spte & PT_PRESENT_MASK));
861 _young = _spte & PT_ACCESSED_MASK;
864 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
866 spte = rmap_next(kvm, rmapp, spte);
871 #define RMAP_RECYCLE_THRESHOLD 1000
873 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
875 unsigned long *rmapp;
876 struct kvm_mmu_page *sp;
878 sp = page_header(__pa(spte));
880 gfn = unalias_gfn(vcpu->kvm, gfn);
881 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
883 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
884 kvm_flush_remote_tlbs(vcpu->kvm);
887 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
889 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
893 static int is_empty_shadow_page(u64 *spt)
898 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
899 if (is_shadow_present_pte(*pos)) {
900 printk(KERN_ERR "%s: %p %llx\n", __func__,
908 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
910 ASSERT(is_empty_shadow_page(sp->spt));
912 __free_page(virt_to_page(sp->spt));
913 __free_page(virt_to_page(sp->gfns));
915 ++kvm->arch.n_free_mmu_pages;
918 static unsigned kvm_page_table_hashfn(gfn_t gfn)
920 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
923 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
926 struct kvm_mmu_page *sp;
928 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
929 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
930 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
931 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
932 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
933 INIT_LIST_HEAD(&sp->oos_link);
934 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
936 sp->parent_pte = parent_pte;
937 --vcpu->kvm->arch.n_free_mmu_pages;
941 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
942 struct kvm_mmu_page *sp, u64 *parent_pte)
944 struct kvm_pte_chain *pte_chain;
945 struct hlist_node *node;
950 if (!sp->multimapped) {
951 u64 *old = sp->parent_pte;
954 sp->parent_pte = parent_pte;
958 pte_chain = mmu_alloc_pte_chain(vcpu);
959 INIT_HLIST_HEAD(&sp->parent_ptes);
960 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
961 pte_chain->parent_ptes[0] = old;
963 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
964 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
966 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
967 if (!pte_chain->parent_ptes[i]) {
968 pte_chain->parent_ptes[i] = parent_pte;
972 pte_chain = mmu_alloc_pte_chain(vcpu);
974 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
975 pte_chain->parent_ptes[0] = parent_pte;
978 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
981 struct kvm_pte_chain *pte_chain;
982 struct hlist_node *node;
985 if (!sp->multimapped) {
986 BUG_ON(sp->parent_pte != parent_pte);
987 sp->parent_pte = NULL;
990 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
991 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
992 if (!pte_chain->parent_ptes[i])
994 if (pte_chain->parent_ptes[i] != parent_pte)
996 while (i + 1 < NR_PTE_CHAIN_ENTRIES
997 && pte_chain->parent_ptes[i + 1]) {
998 pte_chain->parent_ptes[i]
999 = pte_chain->parent_ptes[i + 1];
1002 pte_chain->parent_ptes[i] = NULL;
1004 hlist_del(&pte_chain->link);
1005 mmu_free_pte_chain(pte_chain);
1006 if (hlist_empty(&sp->parent_ptes)) {
1007 sp->multimapped = 0;
1008 sp->parent_pte = NULL;
1017 static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1018 mmu_parent_walk_fn fn)
1020 struct kvm_pte_chain *pte_chain;
1021 struct hlist_node *node;
1022 struct kvm_mmu_page *parent_sp;
1025 if (!sp->multimapped && sp->parent_pte) {
1026 parent_sp = page_header(__pa(sp->parent_pte));
1027 fn(vcpu, parent_sp);
1028 mmu_parent_walk(vcpu, parent_sp, fn);
1031 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1032 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1033 if (!pte_chain->parent_ptes[i])
1035 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1036 fn(vcpu, parent_sp);
1037 mmu_parent_walk(vcpu, parent_sp, fn);
1041 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1044 struct kvm_mmu_page *sp = page_header(__pa(spte));
1046 index = spte - sp->spt;
1047 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1048 sp->unsync_children++;
1049 WARN_ON(!sp->unsync_children);
1052 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1054 struct kvm_pte_chain *pte_chain;
1055 struct hlist_node *node;
1058 if (!sp->parent_pte)
1061 if (!sp->multimapped) {
1062 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1066 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1067 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1068 if (!pte_chain->parent_ptes[i])
1070 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1074 static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1076 kvm_mmu_update_parents_unsync(sp);
1080 static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
1081 struct kvm_mmu_page *sp)
1083 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
1084 kvm_mmu_update_parents_unsync(sp);
1087 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1088 struct kvm_mmu_page *sp)
1092 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1093 sp->spt[i] = shadow_trap_nonpresent_pte;
1096 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1097 struct kvm_mmu_page *sp)
1102 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1106 #define KVM_PAGE_ARRAY_NR 16
1108 struct kvm_mmu_pages {
1109 struct mmu_page_and_offset {
1110 struct kvm_mmu_page *sp;
1112 } page[KVM_PAGE_ARRAY_NR];
1116 #define for_each_unsync_children(bitmap, idx) \
1117 for (idx = find_first_bit(bitmap, 512); \
1119 idx = find_next_bit(bitmap, 512, idx+1))
1121 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1127 for (i=0; i < pvec->nr; i++)
1128 if (pvec->page[i].sp == sp)
1131 pvec->page[pvec->nr].sp = sp;
1132 pvec->page[pvec->nr].idx = idx;
1134 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1137 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1138 struct kvm_mmu_pages *pvec)
1140 int i, ret, nr_unsync_leaf = 0;
1142 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1143 u64 ent = sp->spt[i];
1145 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1146 struct kvm_mmu_page *child;
1147 child = page_header(ent & PT64_BASE_ADDR_MASK);
1149 if (child->unsync_children) {
1150 if (mmu_pages_add(pvec, child, i))
1153 ret = __mmu_unsync_walk(child, pvec);
1155 __clear_bit(i, sp->unsync_child_bitmap);
1157 nr_unsync_leaf += ret;
1162 if (child->unsync) {
1164 if (mmu_pages_add(pvec, child, i))
1170 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1171 sp->unsync_children = 0;
1173 return nr_unsync_leaf;
1176 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1177 struct kvm_mmu_pages *pvec)
1179 if (!sp->unsync_children)
1182 mmu_pages_add(pvec, sp, 0);
1183 return __mmu_unsync_walk(sp, pvec);
1186 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1189 struct hlist_head *bucket;
1190 struct kvm_mmu_page *sp;
1191 struct hlist_node *node;
1193 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1194 index = kvm_page_table_hashfn(gfn);
1195 bucket = &kvm->arch.mmu_page_hash[index];
1196 hlist_for_each_entry(sp, node, bucket, hash_link)
1197 if (sp->gfn == gfn && !sp->role.direct
1198 && !sp->role.invalid) {
1199 pgprintk("%s: found role %x\n",
1200 __func__, sp->role.word);
1206 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1208 WARN_ON(!sp->unsync);
1210 --kvm->stat.mmu_unsync;
1213 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1215 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1217 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1218 kvm_mmu_zap_page(vcpu->kvm, sp);
1222 trace_kvm_mmu_sync_page(sp);
1223 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1224 kvm_flush_remote_tlbs(vcpu->kvm);
1225 kvm_unlink_unsync_page(vcpu->kvm, sp);
1226 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1227 kvm_mmu_zap_page(vcpu->kvm, sp);
1231 kvm_mmu_flush_tlb(vcpu);
1235 struct mmu_page_path {
1236 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1237 unsigned int idx[PT64_ROOT_LEVEL-1];
1240 #define for_each_sp(pvec, sp, parents, i) \
1241 for (i = mmu_pages_next(&pvec, &parents, -1), \
1242 sp = pvec.page[i].sp; \
1243 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1244 i = mmu_pages_next(&pvec, &parents, i))
1246 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1247 struct mmu_page_path *parents,
1252 for (n = i+1; n < pvec->nr; n++) {
1253 struct kvm_mmu_page *sp = pvec->page[n].sp;
1255 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1256 parents->idx[0] = pvec->page[n].idx;
1260 parents->parent[sp->role.level-2] = sp;
1261 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1267 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1269 struct kvm_mmu_page *sp;
1270 unsigned int level = 0;
1273 unsigned int idx = parents->idx[level];
1275 sp = parents->parent[level];
1279 --sp->unsync_children;
1280 WARN_ON((int)sp->unsync_children < 0);
1281 __clear_bit(idx, sp->unsync_child_bitmap);
1283 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1286 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1287 struct mmu_page_path *parents,
1288 struct kvm_mmu_pages *pvec)
1290 parents->parent[parent->role.level-1] = NULL;
1294 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1295 struct kvm_mmu_page *parent)
1298 struct kvm_mmu_page *sp;
1299 struct mmu_page_path parents;
1300 struct kvm_mmu_pages pages;
1302 kvm_mmu_pages_init(parent, &parents, &pages);
1303 while (mmu_unsync_walk(parent, &pages)) {
1306 for_each_sp(pages, sp, parents, i)
1307 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1310 kvm_flush_remote_tlbs(vcpu->kvm);
1312 for_each_sp(pages, sp, parents, i) {
1313 kvm_sync_page(vcpu, sp);
1314 mmu_pages_clear_parents(&parents);
1316 cond_resched_lock(&vcpu->kvm->mmu_lock);
1317 kvm_mmu_pages_init(parent, &parents, &pages);
1321 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1329 union kvm_mmu_page_role role;
1332 struct hlist_head *bucket;
1333 struct kvm_mmu_page *sp;
1334 struct hlist_node *node, *tmp;
1336 role = vcpu->arch.mmu.base_role;
1338 role.direct = direct;
1339 role.access = access;
1340 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1341 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1342 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1343 role.quadrant = quadrant;
1345 index = kvm_page_table_hashfn(gfn);
1346 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1347 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1348 if (sp->gfn == gfn) {
1350 if (kvm_sync_page(vcpu, sp))
1353 if (sp->role.word != role.word)
1356 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1357 if (sp->unsync_children) {
1358 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1359 kvm_mmu_mark_parents_unsync(vcpu, sp);
1361 trace_kvm_mmu_get_page(sp, false);
1364 ++vcpu->kvm->stat.mmu_cache_miss;
1365 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1370 hlist_add_head(&sp->hash_link, bucket);
1372 if (rmap_write_protect(vcpu->kvm, gfn))
1373 kvm_flush_remote_tlbs(vcpu->kvm);
1374 account_shadowed(vcpu->kvm, gfn);
1376 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1377 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1379 nonpaging_prefetch_page(vcpu, sp);
1380 trace_kvm_mmu_get_page(sp, true);
1384 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1385 struct kvm_vcpu *vcpu, u64 addr)
1387 iterator->addr = addr;
1388 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1389 iterator->level = vcpu->arch.mmu.shadow_root_level;
1390 if (iterator->level == PT32E_ROOT_LEVEL) {
1391 iterator->shadow_addr
1392 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1393 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1395 if (!iterator->shadow_addr)
1396 iterator->level = 0;
1400 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1402 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1405 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1406 if (is_large_pte(*iterator->sptep))
1409 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1410 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1414 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1416 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1420 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1421 struct kvm_mmu_page *sp)
1429 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1432 if (is_shadow_present_pte(ent)) {
1433 if (!is_last_spte(ent, sp->role.level)) {
1434 ent &= PT64_BASE_ADDR_MASK;
1435 mmu_page_remove_parent_pte(page_header(ent),
1438 if (is_large_pte(ent))
1440 rmap_remove(kvm, &pt[i]);
1443 pt[i] = shadow_trap_nonpresent_pte;
1447 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1449 mmu_page_remove_parent_pte(sp, parent_pte);
1452 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1455 struct kvm_vcpu *vcpu;
1457 kvm_for_each_vcpu(i, vcpu, kvm)
1458 vcpu->arch.last_pte_updated = NULL;
1461 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1465 while (sp->multimapped || sp->parent_pte) {
1466 if (!sp->multimapped)
1467 parent_pte = sp->parent_pte;
1469 struct kvm_pte_chain *chain;
1471 chain = container_of(sp->parent_ptes.first,
1472 struct kvm_pte_chain, link);
1473 parent_pte = chain->parent_ptes[0];
1475 BUG_ON(!parent_pte);
1476 kvm_mmu_put_page(sp, parent_pte);
1477 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1481 static int mmu_zap_unsync_children(struct kvm *kvm,
1482 struct kvm_mmu_page *parent)
1485 struct mmu_page_path parents;
1486 struct kvm_mmu_pages pages;
1488 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1491 kvm_mmu_pages_init(parent, &parents, &pages);
1492 while (mmu_unsync_walk(parent, &pages)) {
1493 struct kvm_mmu_page *sp;
1495 for_each_sp(pages, sp, parents, i) {
1496 kvm_mmu_zap_page(kvm, sp);
1497 mmu_pages_clear_parents(&parents);
1500 kvm_mmu_pages_init(parent, &parents, &pages);
1506 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1510 trace_kvm_mmu_zap_page(sp);
1511 ++kvm->stat.mmu_shadow_zapped;
1512 ret = mmu_zap_unsync_children(kvm, sp);
1513 kvm_mmu_page_unlink_children(kvm, sp);
1514 kvm_mmu_unlink_parents(kvm, sp);
1515 kvm_flush_remote_tlbs(kvm);
1516 if (!sp->role.invalid && !sp->role.direct)
1517 unaccount_shadowed(kvm, sp->gfn);
1519 kvm_unlink_unsync_page(kvm, sp);
1520 if (!sp->root_count) {
1521 hlist_del(&sp->hash_link);
1522 kvm_mmu_free_page(kvm, sp);
1524 sp->role.invalid = 1;
1525 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1526 kvm_reload_remote_mmus(kvm);
1528 kvm_mmu_reset_last_pte_updated(kvm);
1533 * Changing the number of mmu pages allocated to the vm
1534 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1536 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1540 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1541 used_pages = max(0, used_pages);
1544 * If we set the number of mmu pages to be smaller be than the
1545 * number of actived pages , we must to free some mmu pages before we
1549 if (used_pages > kvm_nr_mmu_pages) {
1550 while (used_pages > kvm_nr_mmu_pages) {
1551 struct kvm_mmu_page *page;
1553 page = container_of(kvm->arch.active_mmu_pages.prev,
1554 struct kvm_mmu_page, link);
1555 kvm_mmu_zap_page(kvm, page);
1558 kvm->arch.n_free_mmu_pages = 0;
1561 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1562 - kvm->arch.n_alloc_mmu_pages;
1564 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1567 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1570 struct hlist_head *bucket;
1571 struct kvm_mmu_page *sp;
1572 struct hlist_node *node, *n;
1575 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1577 index = kvm_page_table_hashfn(gfn);
1578 bucket = &kvm->arch.mmu_page_hash[index];
1579 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1580 if (sp->gfn == gfn && !sp->role.direct) {
1581 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1584 if (kvm_mmu_zap_page(kvm, sp))
1590 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1593 struct hlist_head *bucket;
1594 struct kvm_mmu_page *sp;
1595 struct hlist_node *node, *nn;
1597 index = kvm_page_table_hashfn(gfn);
1598 bucket = &kvm->arch.mmu_page_hash[index];
1599 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1600 if (sp->gfn == gfn && !sp->role.direct
1601 && !sp->role.invalid) {
1602 pgprintk("%s: zap %lx %x\n",
1603 __func__, gfn, sp->role.word);
1604 kvm_mmu_zap_page(kvm, sp);
1609 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1611 int slot = memslot_id(kvm, gfn);
1612 struct kvm_mmu_page *sp = page_header(__pa(pte));
1614 __set_bit(slot, sp->slot_bitmap);
1617 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1622 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1625 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1626 if (pt[i] == shadow_notrap_nonpresent_pte)
1627 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1631 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1635 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
1637 if (gpa == UNMAPPED_GVA)
1640 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1646 * The function is based on mtrr_type_lookup() in
1647 * arch/x86/kernel/cpu/mtrr/generic.c
1649 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1654 u8 prev_match, curr_match;
1655 int num_var_ranges = KVM_NR_VAR_MTRR;
1657 if (!mtrr_state->enabled)
1660 /* Make end inclusive end, instead of exclusive */
1663 /* Look in fixed ranges. Just return the type as per start */
1664 if (mtrr_state->have_fixed && (start < 0x100000)) {
1667 if (start < 0x80000) {
1669 idx += (start >> 16);
1670 return mtrr_state->fixed_ranges[idx];
1671 } else if (start < 0xC0000) {
1673 idx += ((start - 0x80000) >> 14);
1674 return mtrr_state->fixed_ranges[idx];
1675 } else if (start < 0x1000000) {
1677 idx += ((start - 0xC0000) >> 12);
1678 return mtrr_state->fixed_ranges[idx];
1683 * Look in variable ranges
1684 * Look of multiple ranges matching this address and pick type
1685 * as per MTRR precedence
1687 if (!(mtrr_state->enabled & 2))
1688 return mtrr_state->def_type;
1691 for (i = 0; i < num_var_ranges; ++i) {
1692 unsigned short start_state, end_state;
1694 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1697 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1698 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1699 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1700 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1702 start_state = ((start & mask) == (base & mask));
1703 end_state = ((end & mask) == (base & mask));
1704 if (start_state != end_state)
1707 if ((start & mask) != (base & mask))
1710 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1711 if (prev_match == 0xFF) {
1712 prev_match = curr_match;
1716 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1717 curr_match == MTRR_TYPE_UNCACHABLE)
1718 return MTRR_TYPE_UNCACHABLE;
1720 if ((prev_match == MTRR_TYPE_WRBACK &&
1721 curr_match == MTRR_TYPE_WRTHROUGH) ||
1722 (prev_match == MTRR_TYPE_WRTHROUGH &&
1723 curr_match == MTRR_TYPE_WRBACK)) {
1724 prev_match = MTRR_TYPE_WRTHROUGH;
1725 curr_match = MTRR_TYPE_WRTHROUGH;
1728 if (prev_match != curr_match)
1729 return MTRR_TYPE_UNCACHABLE;
1732 if (prev_match != 0xFF)
1735 return mtrr_state->def_type;
1738 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1742 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1743 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1744 if (mtrr == 0xfe || mtrr == 0xff)
1745 mtrr = MTRR_TYPE_WRBACK;
1748 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1750 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1753 struct hlist_head *bucket;
1754 struct kvm_mmu_page *s;
1755 struct hlist_node *node, *n;
1757 trace_kvm_mmu_unsync_page(sp);
1758 index = kvm_page_table_hashfn(sp->gfn);
1759 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1760 /* don't unsync if pagetable is shadowed with multiple roles */
1761 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1762 if (s->gfn != sp->gfn || s->role.direct)
1764 if (s->role.word != sp->role.word)
1767 ++vcpu->kvm->stat.mmu_unsync;
1770 kvm_mmu_mark_parents_unsync(vcpu, sp);
1772 mmu_convert_notrap(sp);
1776 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1779 struct kvm_mmu_page *shadow;
1781 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1783 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1787 if (can_unsync && oos_shadow)
1788 return kvm_unsync_page(vcpu, shadow);
1794 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1795 unsigned pte_access, int user_fault,
1796 int write_fault, int dirty, int level,
1797 gfn_t gfn, pfn_t pfn, bool speculative,
1798 bool can_unsync, bool reset_host_protection)
1804 * We don't set the accessed bit, since we sometimes want to see
1805 * whether the guest actually used the pte (in order to detect
1808 spte = shadow_base_present_pte | shadow_dirty_mask;
1810 spte |= shadow_accessed_mask;
1812 pte_access &= ~ACC_WRITE_MASK;
1813 if (pte_access & ACC_EXEC_MASK)
1814 spte |= shadow_x_mask;
1816 spte |= shadow_nx_mask;
1817 if (pte_access & ACC_USER_MASK)
1818 spte |= shadow_user_mask;
1819 if (level > PT_PAGE_TABLE_LEVEL)
1820 spte |= PT_PAGE_SIZE_MASK;
1822 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1823 kvm_is_mmio_pfn(pfn));
1825 if (reset_host_protection)
1826 spte |= SPTE_HOST_WRITEABLE;
1828 spte |= (u64)pfn << PAGE_SHIFT;
1830 if ((pte_access & ACC_WRITE_MASK)
1831 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1833 if (level > PT_PAGE_TABLE_LEVEL &&
1834 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1836 spte = shadow_trap_nonpresent_pte;
1840 spte |= PT_WRITABLE_MASK;
1843 * Optimization: for pte sync, if spte was writable the hash
1844 * lookup is unnecessary (and expensive). Write protection
1845 * is responsibility of mmu_get_page / kvm_sync_page.
1846 * Same reasoning can be applied to dirty page accounting.
1848 if (!can_unsync && is_writeble_pte(*sptep))
1851 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1852 pgprintk("%s: found shadow page for %lx, marking ro\n",
1855 pte_access &= ~ACC_WRITE_MASK;
1856 if (is_writeble_pte(spte))
1857 spte &= ~PT_WRITABLE_MASK;
1861 if (pte_access & ACC_WRITE_MASK)
1862 mark_page_dirty(vcpu->kvm, gfn);
1865 __set_spte(sptep, spte);
1869 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1870 unsigned pt_access, unsigned pte_access,
1871 int user_fault, int write_fault, int dirty,
1872 int *ptwrite, int level, gfn_t gfn,
1873 pfn_t pfn, bool speculative,
1874 bool reset_host_protection)
1876 int was_rmapped = 0;
1877 int was_writeble = is_writeble_pte(*sptep);
1880 pgprintk("%s: spte %llx access %x write_fault %d"
1881 " user_fault %d gfn %lx\n",
1882 __func__, *sptep, pt_access,
1883 write_fault, user_fault, gfn);
1885 if (is_rmap_spte(*sptep)) {
1887 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1888 * the parent of the now unreachable PTE.
1890 if (level > PT_PAGE_TABLE_LEVEL &&
1891 !is_large_pte(*sptep)) {
1892 struct kvm_mmu_page *child;
1895 child = page_header(pte & PT64_BASE_ADDR_MASK);
1896 mmu_page_remove_parent_pte(child, sptep);
1897 } else if (pfn != spte_to_pfn(*sptep)) {
1898 pgprintk("hfn old %lx new %lx\n",
1899 spte_to_pfn(*sptep), pfn);
1900 rmap_remove(vcpu->kvm, sptep);
1905 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1906 dirty, level, gfn, pfn, speculative, true,
1907 reset_host_protection)) {
1910 kvm_x86_ops->tlb_flush(vcpu);
1913 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1914 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1915 is_large_pte(*sptep)? "2MB" : "4kB",
1916 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1918 if (!was_rmapped && is_large_pte(*sptep))
1919 ++vcpu->kvm->stat.lpages;
1921 page_header_update_slot(vcpu->kvm, sptep, gfn);
1923 rmap_count = rmap_add(vcpu, sptep, gfn);
1924 kvm_release_pfn_clean(pfn);
1925 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1926 rmap_recycle(vcpu, sptep, gfn);
1929 kvm_release_pfn_dirty(pfn);
1931 kvm_release_pfn_clean(pfn);
1934 vcpu->arch.last_pte_updated = sptep;
1935 vcpu->arch.last_pte_gfn = gfn;
1939 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1943 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1944 int level, gfn_t gfn, pfn_t pfn)
1946 struct kvm_shadow_walk_iterator iterator;
1947 struct kvm_mmu_page *sp;
1951 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1952 if (iterator.level == level) {
1953 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1954 0, write, 1, &pt_write,
1955 level, gfn, pfn, false, true);
1956 ++vcpu->stat.pf_fixed;
1960 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1961 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1962 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1964 1, ACC_ALL, iterator.sptep);
1966 pgprintk("nonpaging_map: ENOMEM\n");
1967 kvm_release_pfn_clean(pfn);
1971 __set_spte(iterator.sptep,
1973 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1974 | shadow_user_mask | shadow_x_mask);
1980 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1985 unsigned long mmu_seq;
1987 level = mapping_level(vcpu, gfn);
1990 * This path builds a PAE pagetable - so we can map 2mb pages at
1991 * maximum. Therefore check if the level is larger than that.
1993 if (level > PT_DIRECTORY_LEVEL)
1994 level = PT_DIRECTORY_LEVEL;
1996 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
1998 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2000 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2003 if (is_error_pfn(pfn)) {
2004 kvm_release_pfn_clean(pfn);
2008 spin_lock(&vcpu->kvm->mmu_lock);
2009 if (mmu_notifier_retry(vcpu, mmu_seq))
2011 kvm_mmu_free_some_pages(vcpu);
2012 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2013 spin_unlock(&vcpu->kvm->mmu_lock);
2019 spin_unlock(&vcpu->kvm->mmu_lock);
2020 kvm_release_pfn_clean(pfn);
2025 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2028 struct kvm_mmu_page *sp;
2030 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2032 spin_lock(&vcpu->kvm->mmu_lock);
2033 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2034 hpa_t root = vcpu->arch.mmu.root_hpa;
2036 sp = page_header(root);
2038 if (!sp->root_count && sp->role.invalid)
2039 kvm_mmu_zap_page(vcpu->kvm, sp);
2040 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2041 spin_unlock(&vcpu->kvm->mmu_lock);
2044 for (i = 0; i < 4; ++i) {
2045 hpa_t root = vcpu->arch.mmu.pae_root[i];
2048 root &= PT64_BASE_ADDR_MASK;
2049 sp = page_header(root);
2051 if (!sp->root_count && sp->role.invalid)
2052 kvm_mmu_zap_page(vcpu->kvm, sp);
2054 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2056 spin_unlock(&vcpu->kvm->mmu_lock);
2057 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2060 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2064 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2065 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2072 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2076 struct kvm_mmu_page *sp;
2080 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2082 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2083 hpa_t root = vcpu->arch.mmu.root_hpa;
2085 ASSERT(!VALID_PAGE(root));
2088 if (mmu_check_root(vcpu, root_gfn))
2090 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2091 PT64_ROOT_LEVEL, direct,
2093 root = __pa(sp->spt);
2095 vcpu->arch.mmu.root_hpa = root;
2098 direct = !is_paging(vcpu);
2101 for (i = 0; i < 4; ++i) {
2102 hpa_t root = vcpu->arch.mmu.pae_root[i];
2104 ASSERT(!VALID_PAGE(root));
2105 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2106 pdptr = kvm_pdptr_read(vcpu, i);
2107 if (!is_present_gpte(pdptr)) {
2108 vcpu->arch.mmu.pae_root[i] = 0;
2111 root_gfn = pdptr >> PAGE_SHIFT;
2112 } else if (vcpu->arch.mmu.root_level == 0)
2114 if (mmu_check_root(vcpu, root_gfn))
2116 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2117 PT32_ROOT_LEVEL, direct,
2119 root = __pa(sp->spt);
2121 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2123 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2127 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2130 struct kvm_mmu_page *sp;
2132 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2134 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2135 hpa_t root = vcpu->arch.mmu.root_hpa;
2136 sp = page_header(root);
2137 mmu_sync_children(vcpu, sp);
2140 for (i = 0; i < 4; ++i) {
2141 hpa_t root = vcpu->arch.mmu.pae_root[i];
2143 if (root && VALID_PAGE(root)) {
2144 root &= PT64_BASE_ADDR_MASK;
2145 sp = page_header(root);
2146 mmu_sync_children(vcpu, sp);
2151 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2153 spin_lock(&vcpu->kvm->mmu_lock);
2154 mmu_sync_roots(vcpu);
2155 spin_unlock(&vcpu->kvm->mmu_lock);
2158 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2163 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2169 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2170 r = mmu_topup_memory_caches(vcpu);
2175 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2177 gfn = gva >> PAGE_SHIFT;
2179 return nonpaging_map(vcpu, gva & PAGE_MASK,
2180 error_code & PFERR_WRITE_MASK, gfn);
2183 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2189 gfn_t gfn = gpa >> PAGE_SHIFT;
2190 unsigned long mmu_seq;
2193 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2195 r = mmu_topup_memory_caches(vcpu);
2199 level = mapping_level(vcpu, gfn);
2201 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2203 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2205 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2206 if (is_error_pfn(pfn)) {
2207 kvm_release_pfn_clean(pfn);
2210 spin_lock(&vcpu->kvm->mmu_lock);
2211 if (mmu_notifier_retry(vcpu, mmu_seq))
2213 kvm_mmu_free_some_pages(vcpu);
2214 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2216 spin_unlock(&vcpu->kvm->mmu_lock);
2221 spin_unlock(&vcpu->kvm->mmu_lock);
2222 kvm_release_pfn_clean(pfn);
2226 static void nonpaging_free(struct kvm_vcpu *vcpu)
2228 mmu_free_roots(vcpu);
2231 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2233 struct kvm_mmu *context = &vcpu->arch.mmu;
2235 context->new_cr3 = nonpaging_new_cr3;
2236 context->page_fault = nonpaging_page_fault;
2237 context->gva_to_gpa = nonpaging_gva_to_gpa;
2238 context->free = nonpaging_free;
2239 context->prefetch_page = nonpaging_prefetch_page;
2240 context->sync_page = nonpaging_sync_page;
2241 context->invlpg = nonpaging_invlpg;
2242 context->root_level = 0;
2243 context->shadow_root_level = PT32E_ROOT_LEVEL;
2244 context->root_hpa = INVALID_PAGE;
2248 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2250 ++vcpu->stat.tlb_flush;
2251 kvm_x86_ops->tlb_flush(vcpu);
2254 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2256 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2257 mmu_free_roots(vcpu);
2260 static void inject_page_fault(struct kvm_vcpu *vcpu,
2264 kvm_inject_page_fault(vcpu, addr, err_code);
2267 static void paging_free(struct kvm_vcpu *vcpu)
2269 nonpaging_free(vcpu);
2272 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2276 bit7 = (gpte >> 7) & 1;
2277 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2281 #include "paging_tmpl.h"
2285 #include "paging_tmpl.h"
2288 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2290 struct kvm_mmu *context = &vcpu->arch.mmu;
2291 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2292 u64 exb_bit_rsvd = 0;
2295 exb_bit_rsvd = rsvd_bits(63, 63);
2297 case PT32_ROOT_LEVEL:
2298 /* no rsvd bits for 2 level 4K page table entries */
2299 context->rsvd_bits_mask[0][1] = 0;
2300 context->rsvd_bits_mask[0][0] = 0;
2301 if (is_cpuid_PSE36())
2302 /* 36bits PSE 4MB page */
2303 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2305 /* 32 bits PSE 4MB page */
2306 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2307 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2309 case PT32E_ROOT_LEVEL:
2310 context->rsvd_bits_mask[0][2] =
2311 rsvd_bits(maxphyaddr, 63) |
2312 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2313 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2314 rsvd_bits(maxphyaddr, 62); /* PDE */
2315 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2316 rsvd_bits(maxphyaddr, 62); /* PTE */
2317 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2318 rsvd_bits(maxphyaddr, 62) |
2319 rsvd_bits(13, 20); /* large page */
2320 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2322 case PT64_ROOT_LEVEL:
2323 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2324 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2325 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2326 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2327 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2328 rsvd_bits(maxphyaddr, 51);
2329 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2330 rsvd_bits(maxphyaddr, 51);
2331 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2332 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2333 rsvd_bits(maxphyaddr, 51) |
2335 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2336 rsvd_bits(maxphyaddr, 51) |
2337 rsvd_bits(13, 20); /* large page */
2338 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2343 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2345 struct kvm_mmu *context = &vcpu->arch.mmu;
2347 ASSERT(is_pae(vcpu));
2348 context->new_cr3 = paging_new_cr3;
2349 context->page_fault = paging64_page_fault;
2350 context->gva_to_gpa = paging64_gva_to_gpa;
2351 context->prefetch_page = paging64_prefetch_page;
2352 context->sync_page = paging64_sync_page;
2353 context->invlpg = paging64_invlpg;
2354 context->free = paging_free;
2355 context->root_level = level;
2356 context->shadow_root_level = level;
2357 context->root_hpa = INVALID_PAGE;
2361 static int paging64_init_context(struct kvm_vcpu *vcpu)
2363 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2364 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2367 static int paging32_init_context(struct kvm_vcpu *vcpu)
2369 struct kvm_mmu *context = &vcpu->arch.mmu;
2371 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2372 context->new_cr3 = paging_new_cr3;
2373 context->page_fault = paging32_page_fault;
2374 context->gva_to_gpa = paging32_gva_to_gpa;
2375 context->free = paging_free;
2376 context->prefetch_page = paging32_prefetch_page;
2377 context->sync_page = paging32_sync_page;
2378 context->invlpg = paging32_invlpg;
2379 context->root_level = PT32_ROOT_LEVEL;
2380 context->shadow_root_level = PT32E_ROOT_LEVEL;
2381 context->root_hpa = INVALID_PAGE;
2385 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2387 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2388 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2391 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2393 struct kvm_mmu *context = &vcpu->arch.mmu;
2395 context->new_cr3 = nonpaging_new_cr3;
2396 context->page_fault = tdp_page_fault;
2397 context->free = nonpaging_free;
2398 context->prefetch_page = nonpaging_prefetch_page;
2399 context->sync_page = nonpaging_sync_page;
2400 context->invlpg = nonpaging_invlpg;
2401 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2402 context->root_hpa = INVALID_PAGE;
2404 if (!is_paging(vcpu)) {
2405 context->gva_to_gpa = nonpaging_gva_to_gpa;
2406 context->root_level = 0;
2407 } else if (is_long_mode(vcpu)) {
2408 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2409 context->gva_to_gpa = paging64_gva_to_gpa;
2410 context->root_level = PT64_ROOT_LEVEL;
2411 } else if (is_pae(vcpu)) {
2412 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2413 context->gva_to_gpa = paging64_gva_to_gpa;
2414 context->root_level = PT32E_ROOT_LEVEL;
2416 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2417 context->gva_to_gpa = paging32_gva_to_gpa;
2418 context->root_level = PT32_ROOT_LEVEL;
2424 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2429 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2431 if (!is_paging(vcpu))
2432 r = nonpaging_init_context(vcpu);
2433 else if (is_long_mode(vcpu))
2434 r = paging64_init_context(vcpu);
2435 else if (is_pae(vcpu))
2436 r = paging32E_init_context(vcpu);
2438 r = paging32_init_context(vcpu);
2440 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2445 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2447 vcpu->arch.update_pte.pfn = bad_pfn;
2450 return init_kvm_tdp_mmu(vcpu);
2452 return init_kvm_softmmu(vcpu);
2455 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2458 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2459 vcpu->arch.mmu.free(vcpu);
2460 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2464 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2466 destroy_kvm_mmu(vcpu);
2467 return init_kvm_mmu(vcpu);
2469 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2471 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2475 r = mmu_topup_memory_caches(vcpu);
2478 spin_lock(&vcpu->kvm->mmu_lock);
2479 kvm_mmu_free_some_pages(vcpu);
2480 r = mmu_alloc_roots(vcpu);
2481 mmu_sync_roots(vcpu);
2482 spin_unlock(&vcpu->kvm->mmu_lock);
2485 /* set_cr3() should ensure TLB has been flushed */
2486 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2490 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2492 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2494 mmu_free_roots(vcpu);
2497 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2498 struct kvm_mmu_page *sp,
2502 struct kvm_mmu_page *child;
2505 if (is_shadow_present_pte(pte)) {
2506 if (is_last_spte(pte, sp->role.level))
2507 rmap_remove(vcpu->kvm, spte);
2509 child = page_header(pte & PT64_BASE_ADDR_MASK);
2510 mmu_page_remove_parent_pte(child, spte);
2513 __set_spte(spte, shadow_trap_nonpresent_pte);
2514 if (is_large_pte(pte))
2515 --vcpu->kvm->stat.lpages;
2518 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2519 struct kvm_mmu_page *sp,
2523 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2524 ++vcpu->kvm->stat.mmu_pde_zapped;
2528 ++vcpu->kvm->stat.mmu_pte_updated;
2529 if (sp->role.glevels == PT32_ROOT_LEVEL)
2530 paging32_update_pte(vcpu, sp, spte, new);
2532 paging64_update_pte(vcpu, sp, spte, new);
2535 static bool need_remote_flush(u64 old, u64 new)
2537 if (!is_shadow_present_pte(old))
2539 if (!is_shadow_present_pte(new))
2541 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2543 old ^= PT64_NX_MASK;
2544 new ^= PT64_NX_MASK;
2545 return (old & ~new & PT64_PERM_MASK) != 0;
2548 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2550 if (need_remote_flush(old, new))
2551 kvm_flush_remote_tlbs(vcpu->kvm);
2553 kvm_mmu_flush_tlb(vcpu);
2556 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2558 u64 *spte = vcpu->arch.last_pte_updated;
2560 return !!(spte && (*spte & shadow_accessed_mask));
2563 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2564 const u8 *new, int bytes)
2571 if (bytes != 4 && bytes != 8)
2575 * Assume that the pte write on a page table of the same type
2576 * as the current vcpu paging mode. This is nearly always true
2577 * (might be false while changing modes). Note it is verified later
2581 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2582 if ((bytes == 4) && (gpa % 4 == 0)) {
2583 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2586 memcpy((void *)&gpte + (gpa % 8), new, 4);
2587 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2588 memcpy((void *)&gpte, new, 8);
2591 if ((bytes == 4) && (gpa % 4 == 0))
2592 memcpy((void *)&gpte, new, 4);
2594 if (!is_present_gpte(gpte))
2596 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2598 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2600 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2602 if (is_error_pfn(pfn)) {
2603 kvm_release_pfn_clean(pfn);
2606 vcpu->arch.update_pte.gfn = gfn;
2607 vcpu->arch.update_pte.pfn = pfn;
2610 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2612 u64 *spte = vcpu->arch.last_pte_updated;
2615 && vcpu->arch.last_pte_gfn == gfn
2616 && shadow_accessed_mask
2617 && !(*spte & shadow_accessed_mask)
2618 && is_shadow_present_pte(*spte))
2619 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2622 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2623 const u8 *new, int bytes,
2624 bool guest_initiated)
2626 gfn_t gfn = gpa >> PAGE_SHIFT;
2627 struct kvm_mmu_page *sp;
2628 struct hlist_node *node, *n;
2629 struct hlist_head *bucket;
2633 unsigned offset = offset_in_page(gpa);
2635 unsigned page_offset;
2636 unsigned misaligned;
2643 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2644 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
2645 spin_lock(&vcpu->kvm->mmu_lock);
2646 kvm_mmu_access_page(vcpu, gfn);
2647 kvm_mmu_free_some_pages(vcpu);
2648 ++vcpu->kvm->stat.mmu_pte_write;
2649 kvm_mmu_audit(vcpu, "pre pte write");
2650 if (guest_initiated) {
2651 if (gfn == vcpu->arch.last_pt_write_gfn
2652 && !last_updated_pte_accessed(vcpu)) {
2653 ++vcpu->arch.last_pt_write_count;
2654 if (vcpu->arch.last_pt_write_count >= 3)
2657 vcpu->arch.last_pt_write_gfn = gfn;
2658 vcpu->arch.last_pt_write_count = 1;
2659 vcpu->arch.last_pte_updated = NULL;
2662 index = kvm_page_table_hashfn(gfn);
2663 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2664 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2665 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2667 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
2668 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2669 misaligned |= bytes < 4;
2670 if (misaligned || flooded) {
2672 * Misaligned accesses are too much trouble to fix
2673 * up; also, they usually indicate a page is not used
2676 * If we're seeing too many writes to a page,
2677 * it may no longer be a page table, or we may be
2678 * forking, in which case it is better to unmap the
2681 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2682 gpa, bytes, sp->role.word);
2683 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2685 ++vcpu->kvm->stat.mmu_flooded;
2688 page_offset = offset;
2689 level = sp->role.level;
2691 if (sp->role.glevels == PT32_ROOT_LEVEL) {
2692 page_offset <<= 1; /* 32->64 */
2694 * A 32-bit pde maps 4MB while the shadow pdes map
2695 * only 2MB. So we need to double the offset again
2696 * and zap two pdes instead of one.
2698 if (level == PT32_ROOT_LEVEL) {
2699 page_offset &= ~7; /* kill rounding error */
2703 quadrant = page_offset >> PAGE_SHIFT;
2704 page_offset &= ~PAGE_MASK;
2705 if (quadrant != sp->role.quadrant)
2708 spte = &sp->spt[page_offset / sizeof(*spte)];
2709 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2711 r = kvm_read_guest_atomic(vcpu->kvm,
2712 gpa & ~(u64)(pte_size - 1),
2714 new = (const void *)&gentry;
2720 mmu_pte_write_zap_pte(vcpu, sp, spte);
2722 mmu_pte_write_new_pte(vcpu, sp, spte, new);
2723 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2727 kvm_mmu_audit(vcpu, "post pte write");
2728 spin_unlock(&vcpu->kvm->mmu_lock);
2729 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2730 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2731 vcpu->arch.update_pte.pfn = bad_pfn;
2735 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2743 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
2745 spin_lock(&vcpu->kvm->mmu_lock);
2746 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2747 spin_unlock(&vcpu->kvm->mmu_lock);
2750 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2752 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2754 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2755 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2756 struct kvm_mmu_page *sp;
2758 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2759 struct kvm_mmu_page, link);
2760 kvm_mmu_zap_page(vcpu->kvm, sp);
2761 ++vcpu->kvm->stat.mmu_recycled;
2765 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2768 enum emulation_result er;
2770 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2779 r = mmu_topup_memory_caches(vcpu);
2783 er = emulate_instruction(vcpu, cr2, error_code, 0);
2788 case EMULATE_DO_MMIO:
2789 ++vcpu->stat.mmio_exits;
2792 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2793 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
2794 vcpu->run->internal.ndata = 0;
2802 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2804 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2806 vcpu->arch.mmu.invlpg(vcpu, gva);
2807 kvm_mmu_flush_tlb(vcpu);
2808 ++vcpu->stat.invlpg;
2810 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2812 void kvm_enable_tdp(void)
2816 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2818 void kvm_disable_tdp(void)
2820 tdp_enabled = false;
2822 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2824 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2826 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2829 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2837 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2838 * Therefore we need to allocate shadow page tables in the first
2839 * 4GB of memory, which happens to fit the DMA32 zone.
2841 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2844 vcpu->arch.mmu.pae_root = page_address(page);
2845 for (i = 0; i < 4; ++i)
2846 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2851 free_mmu_pages(vcpu);
2855 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2858 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2860 return alloc_mmu_pages(vcpu);
2863 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2866 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2868 return init_kvm_mmu(vcpu);
2871 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2875 destroy_kvm_mmu(vcpu);
2876 free_mmu_pages(vcpu);
2877 mmu_free_memory_caches(vcpu);
2880 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2882 struct kvm_mmu_page *sp;
2884 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2888 if (!test_bit(slot, sp->slot_bitmap))
2892 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2894 if (pt[i] & PT_WRITABLE_MASK)
2895 pt[i] &= ~PT_WRITABLE_MASK;
2897 kvm_flush_remote_tlbs(kvm);
2900 void kvm_mmu_zap_all(struct kvm *kvm)
2902 struct kvm_mmu_page *sp, *node;
2904 spin_lock(&kvm->mmu_lock);
2905 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2906 if (kvm_mmu_zap_page(kvm, sp))
2907 node = container_of(kvm->arch.active_mmu_pages.next,
2908 struct kvm_mmu_page, link);
2909 spin_unlock(&kvm->mmu_lock);
2911 kvm_flush_remote_tlbs(kvm);
2914 static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
2916 struct kvm_mmu_page *page;
2918 page = container_of(kvm->arch.active_mmu_pages.prev,
2919 struct kvm_mmu_page, link);
2920 kvm_mmu_zap_page(kvm, page);
2923 static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2926 struct kvm *kvm_freed = NULL;
2927 int cache_count = 0;
2929 spin_lock(&kvm_lock);
2931 list_for_each_entry(kvm, &vm_list, vm_list) {
2934 idx = srcu_read_lock(&kvm->srcu);
2935 spin_lock(&kvm->mmu_lock);
2936 npages = kvm->arch.n_alloc_mmu_pages -
2937 kvm->arch.n_free_mmu_pages;
2938 cache_count += npages;
2939 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2940 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2946 spin_unlock(&kvm->mmu_lock);
2947 srcu_read_unlock(&kvm->srcu, idx);
2950 list_move_tail(&kvm_freed->vm_list, &vm_list);
2952 spin_unlock(&kvm_lock);
2957 static struct shrinker mmu_shrinker = {
2958 .shrink = mmu_shrink,
2959 .seeks = DEFAULT_SEEKS * 10,
2962 static void mmu_destroy_caches(void)
2964 if (pte_chain_cache)
2965 kmem_cache_destroy(pte_chain_cache);
2966 if (rmap_desc_cache)
2967 kmem_cache_destroy(rmap_desc_cache);
2968 if (mmu_page_header_cache)
2969 kmem_cache_destroy(mmu_page_header_cache);
2972 void kvm_mmu_module_exit(void)
2974 mmu_destroy_caches();
2975 unregister_shrinker(&mmu_shrinker);
2978 int kvm_mmu_module_init(void)
2980 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2981 sizeof(struct kvm_pte_chain),
2983 if (!pte_chain_cache)
2985 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2986 sizeof(struct kvm_rmap_desc),
2988 if (!rmap_desc_cache)
2991 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2992 sizeof(struct kvm_mmu_page),
2994 if (!mmu_page_header_cache)
2997 register_shrinker(&mmu_shrinker);
3002 mmu_destroy_caches();
3007 * Caculate mmu pages needed for kvm.
3009 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3012 unsigned int nr_mmu_pages;
3013 unsigned int nr_pages = 0;
3014 struct kvm_memslots *slots;
3016 slots = rcu_dereference(kvm->memslots);
3017 for (i = 0; i < slots->nmemslots; i++)
3018 nr_pages += slots->memslots[i].npages;
3020 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3021 nr_mmu_pages = max(nr_mmu_pages,
3022 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3024 return nr_mmu_pages;
3027 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3030 if (len > buffer->len)
3035 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3040 ret = pv_mmu_peek_buffer(buffer, len);
3045 buffer->processed += len;
3049 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3050 gpa_t addr, gpa_t value)
3055 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3058 r = mmu_topup_memory_caches(vcpu);
3062 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3068 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3070 kvm_set_cr3(vcpu, vcpu->arch.cr3);
3074 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3076 spin_lock(&vcpu->kvm->mmu_lock);
3077 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3078 spin_unlock(&vcpu->kvm->mmu_lock);
3082 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3083 struct kvm_pv_mmu_op_buffer *buffer)
3085 struct kvm_mmu_op_header *header;
3087 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3090 switch (header->op) {
3091 case KVM_MMU_OP_WRITE_PTE: {
3092 struct kvm_mmu_op_write_pte *wpte;
3094 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3097 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3100 case KVM_MMU_OP_FLUSH_TLB: {
3101 struct kvm_mmu_op_flush_tlb *ftlb;
3103 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3106 return kvm_pv_mmu_flush_tlb(vcpu);
3108 case KVM_MMU_OP_RELEASE_PT: {
3109 struct kvm_mmu_op_release_pt *rpt;
3111 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3114 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3120 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3121 gpa_t addr, unsigned long *ret)
3124 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3126 buffer->ptr = buffer->buf;
3127 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3128 buffer->processed = 0;
3130 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3134 while (buffer->len) {
3135 r = kvm_pv_mmu_op_one(vcpu, buffer);
3144 *ret = buffer->processed;
3148 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3150 struct kvm_shadow_walk_iterator iterator;
3153 spin_lock(&vcpu->kvm->mmu_lock);
3154 for_each_shadow_entry(vcpu, addr, iterator) {
3155 sptes[iterator.level-1] = *iterator.sptep;
3157 if (!is_shadow_present_pte(*iterator.sptep))
3160 spin_unlock(&vcpu->kvm->mmu_lock);
3164 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3168 static const char *audit_msg;
3170 static gva_t canonicalize(gva_t gva)
3172 #ifdef CONFIG_X86_64
3173 gva = (long long)(gva << 16) >> 16;
3179 typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp,
3182 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3187 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3188 u64 ent = sp->spt[i];
3190 if (is_shadow_present_pte(ent)) {
3191 if (!is_last_spte(ent, sp->role.level)) {
3192 struct kvm_mmu_page *child;
3193 child = page_header(ent & PT64_BASE_ADDR_MASK);
3194 __mmu_spte_walk(kvm, child, fn);
3196 fn(kvm, sp, &sp->spt[i]);
3201 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3204 struct kvm_mmu_page *sp;
3206 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3208 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3209 hpa_t root = vcpu->arch.mmu.root_hpa;
3210 sp = page_header(root);
3211 __mmu_spte_walk(vcpu->kvm, sp, fn);
3214 for (i = 0; i < 4; ++i) {
3215 hpa_t root = vcpu->arch.mmu.pae_root[i];
3217 if (root && VALID_PAGE(root)) {
3218 root &= PT64_BASE_ADDR_MASK;
3219 sp = page_header(root);
3220 __mmu_spte_walk(vcpu->kvm, sp, fn);
3226 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3227 gva_t va, int level)
3229 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3231 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3233 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3236 if (ent == shadow_trap_nonpresent_pte)
3239 va = canonicalize(va);
3240 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3241 audit_mappings_page(vcpu, ent, va, level - 1);
3243 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
3244 gfn_t gfn = gpa >> PAGE_SHIFT;
3245 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3246 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3248 if (is_error_pfn(pfn)) {
3249 kvm_release_pfn_clean(pfn);
3253 if (is_shadow_present_pte(ent)
3254 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3255 printk(KERN_ERR "xx audit error: (%s) levels %d"
3256 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3257 audit_msg, vcpu->arch.mmu.root_level,
3259 is_shadow_present_pte(ent));
3260 else if (ent == shadow_notrap_nonpresent_pte
3261 && !is_error_hpa(hpa))
3262 printk(KERN_ERR "audit: (%s) notrap shadow,"
3263 " valid guest gva %lx\n", audit_msg, va);
3264 kvm_release_pfn_clean(pfn);
3270 static void audit_mappings(struct kvm_vcpu *vcpu)
3274 if (vcpu->arch.mmu.root_level == 4)
3275 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3277 for (i = 0; i < 4; ++i)
3278 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3279 audit_mappings_page(vcpu,
3280 vcpu->arch.mmu.pae_root[i],
3285 static int count_rmaps(struct kvm_vcpu *vcpu)
3290 idx = srcu_read_lock(&kvm->srcu);
3291 slots = rcu_dereference(kvm->memslots);
3292 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3293 struct kvm_memory_slot *m = &slots->memslots[i];
3294 struct kvm_rmap_desc *d;
3296 for (j = 0; j < m->npages; ++j) {
3297 unsigned long *rmapp = &m->rmap[j];
3301 if (!(*rmapp & 1)) {
3305 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3307 for (k = 0; k < RMAP_EXT; ++k)
3316 srcu_read_unlock(&kvm->srcu, idx);
3320 void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep)
3322 unsigned long *rmapp;
3323 struct kvm_mmu_page *rev_sp;
3326 if (*sptep & PT_WRITABLE_MASK) {
3327 rev_sp = page_header(__pa(sptep));
3328 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3330 if (!gfn_to_memslot(kvm, gfn)) {
3331 if (!printk_ratelimit())
3333 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3335 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3336 audit_msg, sptep - rev_sp->spt,
3342 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3343 is_large_pte(*sptep));
3345 if (!printk_ratelimit())
3347 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3355 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3357 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3360 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3362 struct kvm_mmu_page *sp;
3365 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3368 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3371 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3374 if (!(ent & PT_PRESENT_MASK))
3376 if (!(ent & PT_WRITABLE_MASK))
3378 inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]);
3384 static void audit_rmap(struct kvm_vcpu *vcpu)
3386 check_writable_mappings_rmap(vcpu);
3390 static void audit_write_protection(struct kvm_vcpu *vcpu)
3392 struct kvm_mmu_page *sp;
3393 struct kvm_memory_slot *slot;
3394 unsigned long *rmapp;
3398 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3399 if (sp->role.direct)
3404 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3405 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3406 rmapp = &slot->rmap[gfn - slot->base_gfn];
3408 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3410 if (*spte & PT_WRITABLE_MASK)
3411 printk(KERN_ERR "%s: (%s) shadow page has "
3412 "writable mappings: gfn %lx role %x\n",
3413 __func__, audit_msg, sp->gfn,
3415 spte = rmap_next(vcpu->kvm, rmapp, spte);
3420 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3427 audit_write_protection(vcpu);
3428 if (strcmp("pre pte write", audit_msg) != 0)
3429 audit_mappings(vcpu);
3430 audit_writable_sptes_have_rmaps(vcpu);