2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
21 #include "kvm_cache_regs.h"
23 #include <linux/kvm_host.h>
24 #include <linux/types.h>
25 #include <linux/string.h>
27 #include <linux/highmem.h>
28 #include <linux/module.h>
29 #include <linux/swap.h>
30 #include <linux/hugetlb.h>
31 #include <linux/compiler.h>
34 #include <asm/cmpxchg.h>
39 * When setting this variable to true it enables Two-Dimensional-Paging
40 * where the hardware walks 2 page tables:
41 * 1. the guest-virtual to guest-physical
42 * 2. while doing 1. it walks guest-physical to host-physical
43 * If the hardware supports that we don't need to do shadow paging.
45 bool tdp_enabled = false;
52 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
54 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
59 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
60 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
64 #define pgprintk(x...) do { } while (0)
65 #define rmap_printk(x...) do { } while (0)
69 #if defined(MMU_DEBUG) || defined(AUDIT)
71 module_param(dbg, bool, 0644);
74 static int oos_shadow = 1;
75 module_param(oos_shadow, bool, 0644);
78 #define ASSERT(x) do { } while (0)
82 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
83 __FILE__, __LINE__, #x); \
87 #define PT_FIRST_AVAIL_BITS_SHIFT 9
88 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
90 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
92 #define PT64_LEVEL_BITS 9
94 #define PT64_LEVEL_SHIFT(level) \
95 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
97 #define PT64_LEVEL_MASK(level) \
98 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
100 #define PT64_INDEX(address, level)\
101 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
104 #define PT32_LEVEL_BITS 10
106 #define PT32_LEVEL_SHIFT(level) \
107 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
109 #define PT32_LEVEL_MASK(level) \
110 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
112 #define PT32_INDEX(address, level)\
113 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
116 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
117 #define PT64_DIR_BASE_ADDR_MASK \
118 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
120 #define PT32_BASE_ADDR_MASK PAGE_MASK
121 #define PT32_DIR_BASE_ADDR_MASK \
122 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
124 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
127 #define PFERR_PRESENT_MASK (1U << 0)
128 #define PFERR_WRITE_MASK (1U << 1)
129 #define PFERR_USER_MASK (1U << 2)
130 #define PFERR_RSVD_MASK (1U << 3)
131 #define PFERR_FETCH_MASK (1U << 4)
133 #define PT_DIRECTORY_LEVEL 2
134 #define PT_PAGE_TABLE_LEVEL 1
138 #define ACC_EXEC_MASK 1
139 #define ACC_WRITE_MASK PT_WRITABLE_MASK
140 #define ACC_USER_MASK PT_USER_MASK
141 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
143 #define CREATE_TRACE_POINTS
144 #include "mmutrace.h"
146 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
148 struct kvm_rmap_desc {
149 u64 *sptes[RMAP_EXT];
150 struct kvm_rmap_desc *more;
153 struct kvm_shadow_walk_iterator {
161 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
162 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
163 shadow_walk_okay(&(_walker)); \
164 shadow_walk_next(&(_walker)))
167 struct kvm_unsync_walk {
168 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
171 typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
173 static struct kmem_cache *pte_chain_cache;
174 static struct kmem_cache *rmap_desc_cache;
175 static struct kmem_cache *mmu_page_header_cache;
177 static u64 __read_mostly shadow_trap_nonpresent_pte;
178 static u64 __read_mostly shadow_notrap_nonpresent_pte;
179 static u64 __read_mostly shadow_base_present_pte;
180 static u64 __read_mostly shadow_nx_mask;
181 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
182 static u64 __read_mostly shadow_user_mask;
183 static u64 __read_mostly shadow_accessed_mask;
184 static u64 __read_mostly shadow_dirty_mask;
186 static inline u64 rsvd_bits(int s, int e)
188 return ((1ULL << (e - s + 1)) - 1) << s;
191 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
193 shadow_trap_nonpresent_pte = trap_pte;
194 shadow_notrap_nonpresent_pte = notrap_pte;
196 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
198 void kvm_mmu_set_base_ptes(u64 base_pte)
200 shadow_base_present_pte = base_pte;
202 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
204 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
205 u64 dirty_mask, u64 nx_mask, u64 x_mask)
207 shadow_user_mask = user_mask;
208 shadow_accessed_mask = accessed_mask;
209 shadow_dirty_mask = dirty_mask;
210 shadow_nx_mask = nx_mask;
211 shadow_x_mask = x_mask;
213 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
215 static int is_write_protection(struct kvm_vcpu *vcpu)
217 return vcpu->arch.cr0 & X86_CR0_WP;
220 static int is_cpuid_PSE36(void)
225 static int is_nx(struct kvm_vcpu *vcpu)
227 return vcpu->arch.shadow_efer & EFER_NX;
230 static int is_shadow_present_pte(u64 pte)
232 return pte != shadow_trap_nonpresent_pte
233 && pte != shadow_notrap_nonpresent_pte;
236 static int is_large_pte(u64 pte)
238 return pte & PT_PAGE_SIZE_MASK;
241 static int is_writeble_pte(unsigned long pte)
243 return pte & PT_WRITABLE_MASK;
246 static int is_dirty_gpte(unsigned long pte)
248 return pte & PT_DIRTY_MASK;
251 static int is_rmap_spte(u64 pte)
253 return is_shadow_present_pte(pte);
256 static int is_last_spte(u64 pte, int level)
258 if (level == PT_PAGE_TABLE_LEVEL)
260 if (is_large_pte(pte))
265 static pfn_t spte_to_pfn(u64 pte)
267 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
270 static gfn_t pse36_gfn_delta(u32 gpte)
272 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
274 return (gpte & PT32_DIR_PSE36_MASK) << shift;
277 static void __set_spte(u64 *sptep, u64 spte)
280 set_64bit((unsigned long *)sptep, spte);
282 set_64bit((unsigned long long *)sptep, spte);
286 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
287 struct kmem_cache *base_cache, int min)
291 if (cache->nobjs >= min)
293 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
294 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
297 cache->objects[cache->nobjs++] = obj;
302 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
305 kfree(mc->objects[--mc->nobjs]);
308 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
313 if (cache->nobjs >= min)
315 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
316 page = alloc_page(GFP_KERNEL);
319 set_page_private(page, 0);
320 cache->objects[cache->nobjs++] = page_address(page);
325 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
328 free_page((unsigned long)mc->objects[--mc->nobjs]);
331 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
335 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
339 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
343 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
346 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
347 mmu_page_header_cache, 4);
352 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
354 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
355 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
356 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
357 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
360 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
366 p = mc->objects[--mc->nobjs];
370 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
372 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
373 sizeof(struct kvm_pte_chain));
376 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
381 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
383 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
384 sizeof(struct kvm_rmap_desc));
387 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
393 * Return the pointer to the largepage write count for a given
394 * gfn, handling slots that are not large page aligned.
396 static int *slot_largepage_idx(gfn_t gfn,
397 struct kvm_memory_slot *slot,
402 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
403 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
404 return &slot->lpage_info[level - 2][idx].write_count;
407 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
409 struct kvm_memory_slot *slot;
413 gfn = unalias_gfn(kvm, gfn);
415 slot = gfn_to_memslot_unaliased(kvm, gfn);
416 for (i = PT_DIRECTORY_LEVEL;
417 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
418 write_count = slot_largepage_idx(gfn, slot, i);
423 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
425 struct kvm_memory_slot *slot;
429 gfn = unalias_gfn(kvm, gfn);
430 for (i = PT_DIRECTORY_LEVEL;
431 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
432 slot = gfn_to_memslot_unaliased(kvm, gfn);
433 write_count = slot_largepage_idx(gfn, slot, i);
435 WARN_ON(*write_count < 0);
439 static int has_wrprotected_page(struct kvm *kvm,
443 struct kvm_memory_slot *slot;
446 gfn = unalias_gfn(kvm, gfn);
447 slot = gfn_to_memslot_unaliased(kvm, gfn);
449 largepage_idx = slot_largepage_idx(gfn, slot, level);
450 return *largepage_idx;
456 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
458 unsigned long page_size = PAGE_SIZE;
459 struct vm_area_struct *vma;
463 addr = gfn_to_hva(kvm, gfn);
464 if (kvm_is_error_hva(addr))
467 down_read(¤t->mm->mmap_sem);
468 vma = find_vma(current->mm, addr);
472 page_size = vma_kernel_pagesize(vma);
475 up_read(¤t->mm->mmap_sem);
477 for (i = PT_PAGE_TABLE_LEVEL;
478 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
479 if (page_size >= KVM_HPAGE_SIZE(i))
488 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
490 struct kvm_memory_slot *slot;
492 int level = PT_PAGE_TABLE_LEVEL;
494 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
495 if (slot && slot->dirty_bitmap)
496 return PT_PAGE_TABLE_LEVEL;
498 host_level = host_mapping_level(vcpu->kvm, large_gfn);
500 if (host_level == PT_PAGE_TABLE_LEVEL)
503 for (level = PT_DIRECTORY_LEVEL; level <= host_level; ++level) {
505 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
513 * Take gfn and return the reverse mapping to it.
514 * Note: gfn must be unaliased before this function get called
517 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
519 struct kvm_memory_slot *slot;
522 slot = gfn_to_memslot(kvm, gfn);
523 if (likely(level == PT_PAGE_TABLE_LEVEL))
524 return &slot->rmap[gfn - slot->base_gfn];
526 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
527 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
529 return &slot->lpage_info[level - 2][idx].rmap_pde;
533 * Reverse mapping data structures:
535 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
536 * that points to page_address(page).
538 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
539 * containing more mappings.
541 * Returns the number of rmap entries before the spte was added or zero if
542 * the spte was not added.
545 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
547 struct kvm_mmu_page *sp;
548 struct kvm_rmap_desc *desc;
549 unsigned long *rmapp;
552 if (!is_rmap_spte(*spte))
554 gfn = unalias_gfn(vcpu->kvm, gfn);
555 sp = page_header(__pa(spte));
556 sp->gfns[spte - sp->spt] = gfn;
557 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
559 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
560 *rmapp = (unsigned long)spte;
561 } else if (!(*rmapp & 1)) {
562 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
563 desc = mmu_alloc_rmap_desc(vcpu);
564 desc->sptes[0] = (u64 *)*rmapp;
565 desc->sptes[1] = spte;
566 *rmapp = (unsigned long)desc | 1;
568 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
569 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
570 while (desc->sptes[RMAP_EXT-1] && desc->more) {
574 if (desc->sptes[RMAP_EXT-1]) {
575 desc->more = mmu_alloc_rmap_desc(vcpu);
578 for (i = 0; desc->sptes[i]; ++i)
580 desc->sptes[i] = spte;
585 static void rmap_desc_remove_entry(unsigned long *rmapp,
586 struct kvm_rmap_desc *desc,
588 struct kvm_rmap_desc *prev_desc)
592 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
594 desc->sptes[i] = desc->sptes[j];
595 desc->sptes[j] = NULL;
598 if (!prev_desc && !desc->more)
599 *rmapp = (unsigned long)desc->sptes[0];
602 prev_desc->more = desc->more;
604 *rmapp = (unsigned long)desc->more | 1;
605 mmu_free_rmap_desc(desc);
608 static void rmap_remove(struct kvm *kvm, u64 *spte)
610 struct kvm_rmap_desc *desc;
611 struct kvm_rmap_desc *prev_desc;
612 struct kvm_mmu_page *sp;
614 unsigned long *rmapp;
617 if (!is_rmap_spte(*spte))
619 sp = page_header(__pa(spte));
620 pfn = spte_to_pfn(*spte);
621 if (*spte & shadow_accessed_mask)
622 kvm_set_pfn_accessed(pfn);
623 if (is_writeble_pte(*spte))
624 kvm_release_pfn_dirty(pfn);
626 kvm_release_pfn_clean(pfn);
627 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
629 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
631 } else if (!(*rmapp & 1)) {
632 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
633 if ((u64 *)*rmapp != spte) {
634 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
640 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
641 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
644 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
645 if (desc->sptes[i] == spte) {
646 rmap_desc_remove_entry(rmapp,
658 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
660 struct kvm_rmap_desc *desc;
661 struct kvm_rmap_desc *prev_desc;
667 else if (!(*rmapp & 1)) {
669 return (u64 *)*rmapp;
672 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
676 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
677 if (prev_spte == spte)
678 return desc->sptes[i];
679 prev_spte = desc->sptes[i];
686 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
688 unsigned long *rmapp;
690 int i, write_protected = 0;
692 gfn = unalias_gfn(kvm, gfn);
693 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
695 spte = rmap_next(kvm, rmapp, NULL);
698 BUG_ON(!(*spte & PT_PRESENT_MASK));
699 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
700 if (is_writeble_pte(*spte)) {
701 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
704 spte = rmap_next(kvm, rmapp, spte);
706 if (write_protected) {
709 spte = rmap_next(kvm, rmapp, NULL);
710 pfn = spte_to_pfn(*spte);
711 kvm_set_pfn_dirty(pfn);
714 /* check for huge page mappings */
715 for (i = PT_DIRECTORY_LEVEL;
716 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
717 rmapp = gfn_to_rmap(kvm, gfn, i);
718 spte = rmap_next(kvm, rmapp, NULL);
721 BUG_ON(!(*spte & PT_PRESENT_MASK));
722 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
723 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
724 if (is_writeble_pte(*spte)) {
725 rmap_remove(kvm, spte);
727 __set_spte(spte, shadow_trap_nonpresent_pte);
731 spte = rmap_next(kvm, rmapp, spte);
735 return write_protected;
738 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
741 int need_tlb_flush = 0;
743 while ((spte = rmap_next(kvm, rmapp, NULL))) {
744 BUG_ON(!(*spte & PT_PRESENT_MASK));
745 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
746 rmap_remove(kvm, spte);
747 __set_spte(spte, shadow_trap_nonpresent_pte);
750 return need_tlb_flush;
753 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
754 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
760 * If mmap_sem isn't taken, we can look the memslots with only
761 * the mmu_lock by skipping over the slots with userspace_addr == 0.
763 for (i = 0; i < kvm->nmemslots; i++) {
764 struct kvm_memory_slot *memslot = &kvm->memslots[i];
765 unsigned long start = memslot->userspace_addr;
768 /* mmu_lock protects userspace_addr */
772 end = start + (memslot->npages << PAGE_SHIFT);
773 if (hva >= start && hva < end) {
774 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
776 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
778 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
779 int idx = gfn_offset;
780 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
781 retval |= handler(kvm,
782 &memslot->lpage_info[j][idx].rmap_pde);
790 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
792 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
795 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
800 /* always return old for EPT */
801 if (!shadow_accessed_mask)
804 spte = rmap_next(kvm, rmapp, NULL);
808 BUG_ON(!(_spte & PT_PRESENT_MASK));
809 _young = _spte & PT_ACCESSED_MASK;
812 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
814 spte = rmap_next(kvm, rmapp, spte);
819 #define RMAP_RECYCLE_THRESHOLD 1000
821 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
823 unsigned long *rmapp;
824 struct kvm_mmu_page *sp;
826 sp = page_header(__pa(spte));
828 gfn = unalias_gfn(vcpu->kvm, gfn);
829 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
831 kvm_unmap_rmapp(vcpu->kvm, rmapp);
832 kvm_flush_remote_tlbs(vcpu->kvm);
835 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
837 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
841 static int is_empty_shadow_page(u64 *spt)
846 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
847 if (is_shadow_present_pte(*pos)) {
848 printk(KERN_ERR "%s: %p %llx\n", __func__,
856 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
858 ASSERT(is_empty_shadow_page(sp->spt));
860 __free_page(virt_to_page(sp->spt));
861 __free_page(virt_to_page(sp->gfns));
863 ++kvm->arch.n_free_mmu_pages;
866 static unsigned kvm_page_table_hashfn(gfn_t gfn)
868 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
871 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
874 struct kvm_mmu_page *sp;
876 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
877 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
878 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
879 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
880 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
881 INIT_LIST_HEAD(&sp->oos_link);
882 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
884 sp->parent_pte = parent_pte;
885 --vcpu->kvm->arch.n_free_mmu_pages;
889 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
890 struct kvm_mmu_page *sp, u64 *parent_pte)
892 struct kvm_pte_chain *pte_chain;
893 struct hlist_node *node;
898 if (!sp->multimapped) {
899 u64 *old = sp->parent_pte;
902 sp->parent_pte = parent_pte;
906 pte_chain = mmu_alloc_pte_chain(vcpu);
907 INIT_HLIST_HEAD(&sp->parent_ptes);
908 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
909 pte_chain->parent_ptes[0] = old;
911 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
912 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
914 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
915 if (!pte_chain->parent_ptes[i]) {
916 pte_chain->parent_ptes[i] = parent_pte;
920 pte_chain = mmu_alloc_pte_chain(vcpu);
922 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
923 pte_chain->parent_ptes[0] = parent_pte;
926 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
929 struct kvm_pte_chain *pte_chain;
930 struct hlist_node *node;
933 if (!sp->multimapped) {
934 BUG_ON(sp->parent_pte != parent_pte);
935 sp->parent_pte = NULL;
938 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
939 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
940 if (!pte_chain->parent_ptes[i])
942 if (pte_chain->parent_ptes[i] != parent_pte)
944 while (i + 1 < NR_PTE_CHAIN_ENTRIES
945 && pte_chain->parent_ptes[i + 1]) {
946 pte_chain->parent_ptes[i]
947 = pte_chain->parent_ptes[i + 1];
950 pte_chain->parent_ptes[i] = NULL;
952 hlist_del(&pte_chain->link);
953 mmu_free_pte_chain(pte_chain);
954 if (hlist_empty(&sp->parent_ptes)) {
956 sp->parent_pte = NULL;
965 static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
966 mmu_parent_walk_fn fn)
968 struct kvm_pte_chain *pte_chain;
969 struct hlist_node *node;
970 struct kvm_mmu_page *parent_sp;
973 if (!sp->multimapped && sp->parent_pte) {
974 parent_sp = page_header(__pa(sp->parent_pte));
976 mmu_parent_walk(vcpu, parent_sp, fn);
979 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
980 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
981 if (!pte_chain->parent_ptes[i])
983 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
985 mmu_parent_walk(vcpu, parent_sp, fn);
989 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
992 struct kvm_mmu_page *sp = page_header(__pa(spte));
994 index = spte - sp->spt;
995 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
996 sp->unsync_children++;
997 WARN_ON(!sp->unsync_children);
1000 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1002 struct kvm_pte_chain *pte_chain;
1003 struct hlist_node *node;
1006 if (!sp->parent_pte)
1009 if (!sp->multimapped) {
1010 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1014 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1015 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1016 if (!pte_chain->parent_ptes[i])
1018 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1022 static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1024 kvm_mmu_update_parents_unsync(sp);
1028 static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
1029 struct kvm_mmu_page *sp)
1031 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
1032 kvm_mmu_update_parents_unsync(sp);
1035 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1036 struct kvm_mmu_page *sp)
1040 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1041 sp->spt[i] = shadow_trap_nonpresent_pte;
1044 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1045 struct kvm_mmu_page *sp)
1050 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1054 #define KVM_PAGE_ARRAY_NR 16
1056 struct kvm_mmu_pages {
1057 struct mmu_page_and_offset {
1058 struct kvm_mmu_page *sp;
1060 } page[KVM_PAGE_ARRAY_NR];
1064 #define for_each_unsync_children(bitmap, idx) \
1065 for (idx = find_first_bit(bitmap, 512); \
1067 idx = find_next_bit(bitmap, 512, idx+1))
1069 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1075 for (i=0; i < pvec->nr; i++)
1076 if (pvec->page[i].sp == sp)
1079 pvec->page[pvec->nr].sp = sp;
1080 pvec->page[pvec->nr].idx = idx;
1082 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1085 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1086 struct kvm_mmu_pages *pvec)
1088 int i, ret, nr_unsync_leaf = 0;
1090 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1091 u64 ent = sp->spt[i];
1093 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1094 struct kvm_mmu_page *child;
1095 child = page_header(ent & PT64_BASE_ADDR_MASK);
1097 if (child->unsync_children) {
1098 if (mmu_pages_add(pvec, child, i))
1101 ret = __mmu_unsync_walk(child, pvec);
1103 __clear_bit(i, sp->unsync_child_bitmap);
1105 nr_unsync_leaf += ret;
1110 if (child->unsync) {
1112 if (mmu_pages_add(pvec, child, i))
1118 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1119 sp->unsync_children = 0;
1121 return nr_unsync_leaf;
1124 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1125 struct kvm_mmu_pages *pvec)
1127 if (!sp->unsync_children)
1130 mmu_pages_add(pvec, sp, 0);
1131 return __mmu_unsync_walk(sp, pvec);
1134 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1137 struct hlist_head *bucket;
1138 struct kvm_mmu_page *sp;
1139 struct hlist_node *node;
1141 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1142 index = kvm_page_table_hashfn(gfn);
1143 bucket = &kvm->arch.mmu_page_hash[index];
1144 hlist_for_each_entry(sp, node, bucket, hash_link)
1145 if (sp->gfn == gfn && !sp->role.direct
1146 && !sp->role.invalid) {
1147 pgprintk("%s: found role %x\n",
1148 __func__, sp->role.word);
1154 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1156 WARN_ON(!sp->unsync);
1158 --kvm->stat.mmu_unsync;
1161 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1163 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1165 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1166 kvm_mmu_zap_page(vcpu->kvm, sp);
1170 trace_kvm_mmu_sync_page(sp);
1171 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1172 kvm_flush_remote_tlbs(vcpu->kvm);
1173 kvm_unlink_unsync_page(vcpu->kvm, sp);
1174 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1175 kvm_mmu_zap_page(vcpu->kvm, sp);
1179 kvm_mmu_flush_tlb(vcpu);
1183 struct mmu_page_path {
1184 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1185 unsigned int idx[PT64_ROOT_LEVEL-1];
1188 #define for_each_sp(pvec, sp, parents, i) \
1189 for (i = mmu_pages_next(&pvec, &parents, -1), \
1190 sp = pvec.page[i].sp; \
1191 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1192 i = mmu_pages_next(&pvec, &parents, i))
1194 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1195 struct mmu_page_path *parents,
1200 for (n = i+1; n < pvec->nr; n++) {
1201 struct kvm_mmu_page *sp = pvec->page[n].sp;
1203 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1204 parents->idx[0] = pvec->page[n].idx;
1208 parents->parent[sp->role.level-2] = sp;
1209 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1215 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1217 struct kvm_mmu_page *sp;
1218 unsigned int level = 0;
1221 unsigned int idx = parents->idx[level];
1223 sp = parents->parent[level];
1227 --sp->unsync_children;
1228 WARN_ON((int)sp->unsync_children < 0);
1229 __clear_bit(idx, sp->unsync_child_bitmap);
1231 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1234 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1235 struct mmu_page_path *parents,
1236 struct kvm_mmu_pages *pvec)
1238 parents->parent[parent->role.level-1] = NULL;
1242 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1243 struct kvm_mmu_page *parent)
1246 struct kvm_mmu_page *sp;
1247 struct mmu_page_path parents;
1248 struct kvm_mmu_pages pages;
1250 kvm_mmu_pages_init(parent, &parents, &pages);
1251 while (mmu_unsync_walk(parent, &pages)) {
1254 for_each_sp(pages, sp, parents, i)
1255 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1258 kvm_flush_remote_tlbs(vcpu->kvm);
1260 for_each_sp(pages, sp, parents, i) {
1261 kvm_sync_page(vcpu, sp);
1262 mmu_pages_clear_parents(&parents);
1264 cond_resched_lock(&vcpu->kvm->mmu_lock);
1265 kvm_mmu_pages_init(parent, &parents, &pages);
1269 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1277 union kvm_mmu_page_role role;
1280 struct hlist_head *bucket;
1281 struct kvm_mmu_page *sp;
1282 struct hlist_node *node, *tmp;
1284 role = vcpu->arch.mmu.base_role;
1286 role.direct = direct;
1287 role.access = access;
1288 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1289 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1290 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1291 role.quadrant = quadrant;
1293 index = kvm_page_table_hashfn(gfn);
1294 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1295 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1296 if (sp->gfn == gfn) {
1298 if (kvm_sync_page(vcpu, sp))
1301 if (sp->role.word != role.word)
1304 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1305 if (sp->unsync_children) {
1306 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1307 kvm_mmu_mark_parents_unsync(vcpu, sp);
1309 trace_kvm_mmu_get_page(sp, false);
1312 ++vcpu->kvm->stat.mmu_cache_miss;
1313 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1318 hlist_add_head(&sp->hash_link, bucket);
1320 if (rmap_write_protect(vcpu->kvm, gfn))
1321 kvm_flush_remote_tlbs(vcpu->kvm);
1322 account_shadowed(vcpu->kvm, gfn);
1324 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1325 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1327 nonpaging_prefetch_page(vcpu, sp);
1328 trace_kvm_mmu_get_page(sp, true);
1332 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1333 struct kvm_vcpu *vcpu, u64 addr)
1335 iterator->addr = addr;
1336 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1337 iterator->level = vcpu->arch.mmu.shadow_root_level;
1338 if (iterator->level == PT32E_ROOT_LEVEL) {
1339 iterator->shadow_addr
1340 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1341 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1343 if (!iterator->shadow_addr)
1344 iterator->level = 0;
1348 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1350 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1353 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1354 if (is_large_pte(*iterator->sptep))
1357 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1358 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1362 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1364 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1368 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1369 struct kvm_mmu_page *sp)
1377 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1380 if (is_shadow_present_pte(ent)) {
1381 if (!is_last_spte(ent, sp->role.level)) {
1382 ent &= PT64_BASE_ADDR_MASK;
1383 mmu_page_remove_parent_pte(page_header(ent),
1386 if (is_large_pte(ent))
1388 rmap_remove(kvm, &pt[i]);
1391 pt[i] = shadow_trap_nonpresent_pte;
1395 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1397 mmu_page_remove_parent_pte(sp, parent_pte);
1400 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1403 struct kvm_vcpu *vcpu;
1405 kvm_for_each_vcpu(i, vcpu, kvm)
1406 vcpu->arch.last_pte_updated = NULL;
1409 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1413 while (sp->multimapped || sp->parent_pte) {
1414 if (!sp->multimapped)
1415 parent_pte = sp->parent_pte;
1417 struct kvm_pte_chain *chain;
1419 chain = container_of(sp->parent_ptes.first,
1420 struct kvm_pte_chain, link);
1421 parent_pte = chain->parent_ptes[0];
1423 BUG_ON(!parent_pte);
1424 kvm_mmu_put_page(sp, parent_pte);
1425 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1429 static int mmu_zap_unsync_children(struct kvm *kvm,
1430 struct kvm_mmu_page *parent)
1433 struct mmu_page_path parents;
1434 struct kvm_mmu_pages pages;
1436 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1439 kvm_mmu_pages_init(parent, &parents, &pages);
1440 while (mmu_unsync_walk(parent, &pages)) {
1441 struct kvm_mmu_page *sp;
1443 for_each_sp(pages, sp, parents, i) {
1444 kvm_mmu_zap_page(kvm, sp);
1445 mmu_pages_clear_parents(&parents);
1448 kvm_mmu_pages_init(parent, &parents, &pages);
1454 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1458 trace_kvm_mmu_zap_page(sp);
1459 ++kvm->stat.mmu_shadow_zapped;
1460 ret = mmu_zap_unsync_children(kvm, sp);
1461 kvm_mmu_page_unlink_children(kvm, sp);
1462 kvm_mmu_unlink_parents(kvm, sp);
1463 kvm_flush_remote_tlbs(kvm);
1464 if (!sp->role.invalid && !sp->role.direct)
1465 unaccount_shadowed(kvm, sp->gfn);
1467 kvm_unlink_unsync_page(kvm, sp);
1468 if (!sp->root_count) {
1469 hlist_del(&sp->hash_link);
1470 kvm_mmu_free_page(kvm, sp);
1472 sp->role.invalid = 1;
1473 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1474 kvm_reload_remote_mmus(kvm);
1476 kvm_mmu_reset_last_pte_updated(kvm);
1481 * Changing the number of mmu pages allocated to the vm
1482 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1484 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1488 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1489 used_pages = max(0, used_pages);
1492 * If we set the number of mmu pages to be smaller be than the
1493 * number of actived pages , we must to free some mmu pages before we
1497 if (used_pages > kvm_nr_mmu_pages) {
1498 while (used_pages > kvm_nr_mmu_pages) {
1499 struct kvm_mmu_page *page;
1501 page = container_of(kvm->arch.active_mmu_pages.prev,
1502 struct kvm_mmu_page, link);
1503 kvm_mmu_zap_page(kvm, page);
1506 kvm->arch.n_free_mmu_pages = 0;
1509 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1510 - kvm->arch.n_alloc_mmu_pages;
1512 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1515 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1518 struct hlist_head *bucket;
1519 struct kvm_mmu_page *sp;
1520 struct hlist_node *node, *n;
1523 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1525 index = kvm_page_table_hashfn(gfn);
1526 bucket = &kvm->arch.mmu_page_hash[index];
1527 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1528 if (sp->gfn == gfn && !sp->role.direct) {
1529 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1532 if (kvm_mmu_zap_page(kvm, sp))
1538 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1541 struct hlist_head *bucket;
1542 struct kvm_mmu_page *sp;
1543 struct hlist_node *node, *nn;
1545 index = kvm_page_table_hashfn(gfn);
1546 bucket = &kvm->arch.mmu_page_hash[index];
1547 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1548 if (sp->gfn == gfn && !sp->role.direct
1549 && !sp->role.invalid) {
1550 pgprintk("%s: zap %lx %x\n",
1551 __func__, gfn, sp->role.word);
1552 kvm_mmu_zap_page(kvm, sp);
1557 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1559 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
1560 struct kvm_mmu_page *sp = page_header(__pa(pte));
1562 __set_bit(slot, sp->slot_bitmap);
1565 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1570 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1573 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1574 if (pt[i] == shadow_notrap_nonpresent_pte)
1575 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1579 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1583 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
1585 if (gpa == UNMAPPED_GVA)
1588 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1594 * The function is based on mtrr_type_lookup() in
1595 * arch/x86/kernel/cpu/mtrr/generic.c
1597 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1602 u8 prev_match, curr_match;
1603 int num_var_ranges = KVM_NR_VAR_MTRR;
1605 if (!mtrr_state->enabled)
1608 /* Make end inclusive end, instead of exclusive */
1611 /* Look in fixed ranges. Just return the type as per start */
1612 if (mtrr_state->have_fixed && (start < 0x100000)) {
1615 if (start < 0x80000) {
1617 idx += (start >> 16);
1618 return mtrr_state->fixed_ranges[idx];
1619 } else if (start < 0xC0000) {
1621 idx += ((start - 0x80000) >> 14);
1622 return mtrr_state->fixed_ranges[idx];
1623 } else if (start < 0x1000000) {
1625 idx += ((start - 0xC0000) >> 12);
1626 return mtrr_state->fixed_ranges[idx];
1631 * Look in variable ranges
1632 * Look of multiple ranges matching this address and pick type
1633 * as per MTRR precedence
1635 if (!(mtrr_state->enabled & 2))
1636 return mtrr_state->def_type;
1639 for (i = 0; i < num_var_ranges; ++i) {
1640 unsigned short start_state, end_state;
1642 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1645 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1646 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1647 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1648 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1650 start_state = ((start & mask) == (base & mask));
1651 end_state = ((end & mask) == (base & mask));
1652 if (start_state != end_state)
1655 if ((start & mask) != (base & mask))
1658 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1659 if (prev_match == 0xFF) {
1660 prev_match = curr_match;
1664 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1665 curr_match == MTRR_TYPE_UNCACHABLE)
1666 return MTRR_TYPE_UNCACHABLE;
1668 if ((prev_match == MTRR_TYPE_WRBACK &&
1669 curr_match == MTRR_TYPE_WRTHROUGH) ||
1670 (prev_match == MTRR_TYPE_WRTHROUGH &&
1671 curr_match == MTRR_TYPE_WRBACK)) {
1672 prev_match = MTRR_TYPE_WRTHROUGH;
1673 curr_match = MTRR_TYPE_WRTHROUGH;
1676 if (prev_match != curr_match)
1677 return MTRR_TYPE_UNCACHABLE;
1680 if (prev_match != 0xFF)
1683 return mtrr_state->def_type;
1686 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1690 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1691 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1692 if (mtrr == 0xfe || mtrr == 0xff)
1693 mtrr = MTRR_TYPE_WRBACK;
1696 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1698 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1701 struct hlist_head *bucket;
1702 struct kvm_mmu_page *s;
1703 struct hlist_node *node, *n;
1705 trace_kvm_mmu_unsync_page(sp);
1706 index = kvm_page_table_hashfn(sp->gfn);
1707 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1708 /* don't unsync if pagetable is shadowed with multiple roles */
1709 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1710 if (s->gfn != sp->gfn || s->role.direct)
1712 if (s->role.word != sp->role.word)
1715 ++vcpu->kvm->stat.mmu_unsync;
1718 kvm_mmu_mark_parents_unsync(vcpu, sp);
1720 mmu_convert_notrap(sp);
1724 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1727 struct kvm_mmu_page *shadow;
1729 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1731 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1735 if (can_unsync && oos_shadow)
1736 return kvm_unsync_page(vcpu, shadow);
1742 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1743 unsigned pte_access, int user_fault,
1744 int write_fault, int dirty, int level,
1745 gfn_t gfn, pfn_t pfn, bool speculative,
1752 * We don't set the accessed bit, since we sometimes want to see
1753 * whether the guest actually used the pte (in order to detect
1756 spte = shadow_base_present_pte | shadow_dirty_mask;
1758 spte |= shadow_accessed_mask;
1760 pte_access &= ~ACC_WRITE_MASK;
1761 if (pte_access & ACC_EXEC_MASK)
1762 spte |= shadow_x_mask;
1764 spte |= shadow_nx_mask;
1765 if (pte_access & ACC_USER_MASK)
1766 spte |= shadow_user_mask;
1767 if (level > PT_PAGE_TABLE_LEVEL)
1768 spte |= PT_PAGE_SIZE_MASK;
1770 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1771 kvm_is_mmio_pfn(pfn));
1773 spte |= (u64)pfn << PAGE_SHIFT;
1775 if ((pte_access & ACC_WRITE_MASK)
1776 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1778 if (level > PT_PAGE_TABLE_LEVEL &&
1779 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1781 spte = shadow_trap_nonpresent_pte;
1785 spte |= PT_WRITABLE_MASK;
1788 * Optimization: for pte sync, if spte was writable the hash
1789 * lookup is unnecessary (and expensive). Write protection
1790 * is responsibility of mmu_get_page / kvm_sync_page.
1791 * Same reasoning can be applied to dirty page accounting.
1793 if (!can_unsync && is_writeble_pte(*sptep))
1796 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1797 pgprintk("%s: found shadow page for %lx, marking ro\n",
1800 pte_access &= ~ACC_WRITE_MASK;
1801 if (is_writeble_pte(spte))
1802 spte &= ~PT_WRITABLE_MASK;
1806 if (pte_access & ACC_WRITE_MASK)
1807 mark_page_dirty(vcpu->kvm, gfn);
1810 __set_spte(sptep, spte);
1814 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1815 unsigned pt_access, unsigned pte_access,
1816 int user_fault, int write_fault, int dirty,
1817 int *ptwrite, int level, gfn_t gfn,
1818 pfn_t pfn, bool speculative)
1820 int was_rmapped = 0;
1821 int was_writeble = is_writeble_pte(*sptep);
1824 pgprintk("%s: spte %llx access %x write_fault %d"
1825 " user_fault %d gfn %lx\n",
1826 __func__, *sptep, pt_access,
1827 write_fault, user_fault, gfn);
1829 if (is_rmap_spte(*sptep)) {
1831 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1832 * the parent of the now unreachable PTE.
1834 if (level > PT_PAGE_TABLE_LEVEL &&
1835 !is_large_pte(*sptep)) {
1836 struct kvm_mmu_page *child;
1839 child = page_header(pte & PT64_BASE_ADDR_MASK);
1840 mmu_page_remove_parent_pte(child, sptep);
1841 } else if (pfn != spte_to_pfn(*sptep)) {
1842 pgprintk("hfn old %lx new %lx\n",
1843 spte_to_pfn(*sptep), pfn);
1844 rmap_remove(vcpu->kvm, sptep);
1849 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1850 dirty, level, gfn, pfn, speculative, true)) {
1853 kvm_x86_ops->tlb_flush(vcpu);
1856 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1857 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1858 is_large_pte(*sptep)? "2MB" : "4kB",
1859 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1861 if (!was_rmapped && is_large_pte(*sptep))
1862 ++vcpu->kvm->stat.lpages;
1864 page_header_update_slot(vcpu->kvm, sptep, gfn);
1866 rmap_count = rmap_add(vcpu, sptep, gfn);
1867 if (!is_rmap_spte(*sptep))
1868 kvm_release_pfn_clean(pfn);
1869 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1870 rmap_recycle(vcpu, sptep, gfn);
1873 kvm_release_pfn_dirty(pfn);
1875 kvm_release_pfn_clean(pfn);
1878 vcpu->arch.last_pte_updated = sptep;
1879 vcpu->arch.last_pte_gfn = gfn;
1883 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1887 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1888 int level, gfn_t gfn, pfn_t pfn)
1890 struct kvm_shadow_walk_iterator iterator;
1891 struct kvm_mmu_page *sp;
1895 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1896 if (iterator.level == level) {
1897 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1898 0, write, 1, &pt_write,
1899 level, gfn, pfn, false);
1900 ++vcpu->stat.pf_fixed;
1904 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1905 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1906 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1908 1, ACC_ALL, iterator.sptep);
1910 pgprintk("nonpaging_map: ENOMEM\n");
1911 kvm_release_pfn_clean(pfn);
1915 __set_spte(iterator.sptep,
1917 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1918 | shadow_user_mask | shadow_x_mask);
1924 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1929 unsigned long mmu_seq;
1931 level = mapping_level(vcpu, gfn);
1934 * This path builds a PAE pagetable - so we can map 2mb pages at
1935 * maximum. Therefore check if the level is larger than that.
1937 if (level > PT_DIRECTORY_LEVEL)
1938 level = PT_DIRECTORY_LEVEL;
1940 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
1942 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1944 pfn = gfn_to_pfn(vcpu->kvm, gfn);
1947 if (is_error_pfn(pfn)) {
1948 kvm_release_pfn_clean(pfn);
1952 spin_lock(&vcpu->kvm->mmu_lock);
1953 if (mmu_notifier_retry(vcpu, mmu_seq))
1955 kvm_mmu_free_some_pages(vcpu);
1956 r = __direct_map(vcpu, v, write, level, gfn, pfn);
1957 spin_unlock(&vcpu->kvm->mmu_lock);
1963 spin_unlock(&vcpu->kvm->mmu_lock);
1964 kvm_release_pfn_clean(pfn);
1969 static void mmu_free_roots(struct kvm_vcpu *vcpu)
1972 struct kvm_mmu_page *sp;
1974 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
1976 spin_lock(&vcpu->kvm->mmu_lock);
1977 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1978 hpa_t root = vcpu->arch.mmu.root_hpa;
1980 sp = page_header(root);
1982 if (!sp->root_count && sp->role.invalid)
1983 kvm_mmu_zap_page(vcpu->kvm, sp);
1984 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1985 spin_unlock(&vcpu->kvm->mmu_lock);
1988 for (i = 0; i < 4; ++i) {
1989 hpa_t root = vcpu->arch.mmu.pae_root[i];
1992 root &= PT64_BASE_ADDR_MASK;
1993 sp = page_header(root);
1995 if (!sp->root_count && sp->role.invalid)
1996 kvm_mmu_zap_page(vcpu->kvm, sp);
1998 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2000 spin_unlock(&vcpu->kvm->mmu_lock);
2001 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2004 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2008 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2009 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2016 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2020 struct kvm_mmu_page *sp;
2024 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2026 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2027 hpa_t root = vcpu->arch.mmu.root_hpa;
2029 ASSERT(!VALID_PAGE(root));
2032 if (mmu_check_root(vcpu, root_gfn))
2034 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2035 PT64_ROOT_LEVEL, direct,
2037 root = __pa(sp->spt);
2039 vcpu->arch.mmu.root_hpa = root;
2042 direct = !is_paging(vcpu);
2045 for (i = 0; i < 4; ++i) {
2046 hpa_t root = vcpu->arch.mmu.pae_root[i];
2048 ASSERT(!VALID_PAGE(root));
2049 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2050 pdptr = kvm_pdptr_read(vcpu, i);
2051 if (!is_present_gpte(pdptr)) {
2052 vcpu->arch.mmu.pae_root[i] = 0;
2055 root_gfn = pdptr >> PAGE_SHIFT;
2056 } else if (vcpu->arch.mmu.root_level == 0)
2058 if (mmu_check_root(vcpu, root_gfn))
2060 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2061 PT32_ROOT_LEVEL, direct,
2063 root = __pa(sp->spt);
2065 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2067 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2071 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2074 struct kvm_mmu_page *sp;
2076 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2078 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2079 hpa_t root = vcpu->arch.mmu.root_hpa;
2080 sp = page_header(root);
2081 mmu_sync_children(vcpu, sp);
2084 for (i = 0; i < 4; ++i) {
2085 hpa_t root = vcpu->arch.mmu.pae_root[i];
2087 if (root && VALID_PAGE(root)) {
2088 root &= PT64_BASE_ADDR_MASK;
2089 sp = page_header(root);
2090 mmu_sync_children(vcpu, sp);
2095 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2097 spin_lock(&vcpu->kvm->mmu_lock);
2098 mmu_sync_roots(vcpu);
2099 spin_unlock(&vcpu->kvm->mmu_lock);
2102 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2107 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2113 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2114 r = mmu_topup_memory_caches(vcpu);
2119 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2121 gfn = gva >> PAGE_SHIFT;
2123 return nonpaging_map(vcpu, gva & PAGE_MASK,
2124 error_code & PFERR_WRITE_MASK, gfn);
2127 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2133 gfn_t gfn = gpa >> PAGE_SHIFT;
2134 unsigned long mmu_seq;
2137 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2139 r = mmu_topup_memory_caches(vcpu);
2143 level = mapping_level(vcpu, gfn);
2145 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2147 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2149 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2150 if (is_error_pfn(pfn)) {
2151 kvm_release_pfn_clean(pfn);
2154 spin_lock(&vcpu->kvm->mmu_lock);
2155 if (mmu_notifier_retry(vcpu, mmu_seq))
2157 kvm_mmu_free_some_pages(vcpu);
2158 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2160 spin_unlock(&vcpu->kvm->mmu_lock);
2165 spin_unlock(&vcpu->kvm->mmu_lock);
2166 kvm_release_pfn_clean(pfn);
2170 static void nonpaging_free(struct kvm_vcpu *vcpu)
2172 mmu_free_roots(vcpu);
2175 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2177 struct kvm_mmu *context = &vcpu->arch.mmu;
2179 context->new_cr3 = nonpaging_new_cr3;
2180 context->page_fault = nonpaging_page_fault;
2181 context->gva_to_gpa = nonpaging_gva_to_gpa;
2182 context->free = nonpaging_free;
2183 context->prefetch_page = nonpaging_prefetch_page;
2184 context->sync_page = nonpaging_sync_page;
2185 context->invlpg = nonpaging_invlpg;
2186 context->root_level = 0;
2187 context->shadow_root_level = PT32E_ROOT_LEVEL;
2188 context->root_hpa = INVALID_PAGE;
2192 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2194 ++vcpu->stat.tlb_flush;
2195 kvm_x86_ops->tlb_flush(vcpu);
2198 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2200 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2201 mmu_free_roots(vcpu);
2204 static void inject_page_fault(struct kvm_vcpu *vcpu,
2208 kvm_inject_page_fault(vcpu, addr, err_code);
2211 static void paging_free(struct kvm_vcpu *vcpu)
2213 nonpaging_free(vcpu);
2216 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2220 bit7 = (gpte >> 7) & 1;
2221 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2225 #include "paging_tmpl.h"
2229 #include "paging_tmpl.h"
2232 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2234 struct kvm_mmu *context = &vcpu->arch.mmu;
2235 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2236 u64 exb_bit_rsvd = 0;
2239 exb_bit_rsvd = rsvd_bits(63, 63);
2241 case PT32_ROOT_LEVEL:
2242 /* no rsvd bits for 2 level 4K page table entries */
2243 context->rsvd_bits_mask[0][1] = 0;
2244 context->rsvd_bits_mask[0][0] = 0;
2245 if (is_cpuid_PSE36())
2246 /* 36bits PSE 4MB page */
2247 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2249 /* 32 bits PSE 4MB page */
2250 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2251 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2253 case PT32E_ROOT_LEVEL:
2254 context->rsvd_bits_mask[0][2] =
2255 rsvd_bits(maxphyaddr, 63) |
2256 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2257 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2258 rsvd_bits(maxphyaddr, 62); /* PDE */
2259 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2260 rsvd_bits(maxphyaddr, 62); /* PTE */
2261 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2262 rsvd_bits(maxphyaddr, 62) |
2263 rsvd_bits(13, 20); /* large page */
2264 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2266 case PT64_ROOT_LEVEL:
2267 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2268 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2269 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2270 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2271 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2272 rsvd_bits(maxphyaddr, 51);
2273 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2274 rsvd_bits(maxphyaddr, 51);
2275 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2276 context->rsvd_bits_mask[1][2] = context->rsvd_bits_mask[0][2];
2277 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2278 rsvd_bits(maxphyaddr, 51) |
2279 rsvd_bits(13, 20); /* large page */
2280 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2285 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2287 struct kvm_mmu *context = &vcpu->arch.mmu;
2289 ASSERT(is_pae(vcpu));
2290 context->new_cr3 = paging_new_cr3;
2291 context->page_fault = paging64_page_fault;
2292 context->gva_to_gpa = paging64_gva_to_gpa;
2293 context->prefetch_page = paging64_prefetch_page;
2294 context->sync_page = paging64_sync_page;
2295 context->invlpg = paging64_invlpg;
2296 context->free = paging_free;
2297 context->root_level = level;
2298 context->shadow_root_level = level;
2299 context->root_hpa = INVALID_PAGE;
2303 static int paging64_init_context(struct kvm_vcpu *vcpu)
2305 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2306 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2309 static int paging32_init_context(struct kvm_vcpu *vcpu)
2311 struct kvm_mmu *context = &vcpu->arch.mmu;
2313 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2314 context->new_cr3 = paging_new_cr3;
2315 context->page_fault = paging32_page_fault;
2316 context->gva_to_gpa = paging32_gva_to_gpa;
2317 context->free = paging_free;
2318 context->prefetch_page = paging32_prefetch_page;
2319 context->sync_page = paging32_sync_page;
2320 context->invlpg = paging32_invlpg;
2321 context->root_level = PT32_ROOT_LEVEL;
2322 context->shadow_root_level = PT32E_ROOT_LEVEL;
2323 context->root_hpa = INVALID_PAGE;
2327 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2329 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2330 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2333 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2335 struct kvm_mmu *context = &vcpu->arch.mmu;
2337 context->new_cr3 = nonpaging_new_cr3;
2338 context->page_fault = tdp_page_fault;
2339 context->free = nonpaging_free;
2340 context->prefetch_page = nonpaging_prefetch_page;
2341 context->sync_page = nonpaging_sync_page;
2342 context->invlpg = nonpaging_invlpg;
2343 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2344 context->root_hpa = INVALID_PAGE;
2346 if (!is_paging(vcpu)) {
2347 context->gva_to_gpa = nonpaging_gva_to_gpa;
2348 context->root_level = 0;
2349 } else if (is_long_mode(vcpu)) {
2350 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2351 context->gva_to_gpa = paging64_gva_to_gpa;
2352 context->root_level = PT64_ROOT_LEVEL;
2353 } else if (is_pae(vcpu)) {
2354 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2355 context->gva_to_gpa = paging64_gva_to_gpa;
2356 context->root_level = PT32E_ROOT_LEVEL;
2358 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2359 context->gva_to_gpa = paging32_gva_to_gpa;
2360 context->root_level = PT32_ROOT_LEVEL;
2366 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2371 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2373 if (!is_paging(vcpu))
2374 r = nonpaging_init_context(vcpu);
2375 else if (is_long_mode(vcpu))
2376 r = paging64_init_context(vcpu);
2377 else if (is_pae(vcpu))
2378 r = paging32E_init_context(vcpu);
2380 r = paging32_init_context(vcpu);
2382 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2387 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2389 vcpu->arch.update_pte.pfn = bad_pfn;
2392 return init_kvm_tdp_mmu(vcpu);
2394 return init_kvm_softmmu(vcpu);
2397 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2400 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2401 vcpu->arch.mmu.free(vcpu);
2402 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2406 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2408 destroy_kvm_mmu(vcpu);
2409 return init_kvm_mmu(vcpu);
2411 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2413 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2417 r = mmu_topup_memory_caches(vcpu);
2420 spin_lock(&vcpu->kvm->mmu_lock);
2421 kvm_mmu_free_some_pages(vcpu);
2422 r = mmu_alloc_roots(vcpu);
2423 mmu_sync_roots(vcpu);
2424 spin_unlock(&vcpu->kvm->mmu_lock);
2427 /* set_cr3() should ensure TLB has been flushed */
2428 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2432 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2434 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2436 mmu_free_roots(vcpu);
2439 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2440 struct kvm_mmu_page *sp,
2444 struct kvm_mmu_page *child;
2447 if (is_shadow_present_pte(pte)) {
2448 if (is_last_spte(pte, sp->role.level))
2449 rmap_remove(vcpu->kvm, spte);
2451 child = page_header(pte & PT64_BASE_ADDR_MASK);
2452 mmu_page_remove_parent_pte(child, spte);
2455 __set_spte(spte, shadow_trap_nonpresent_pte);
2456 if (is_large_pte(pte))
2457 --vcpu->kvm->stat.lpages;
2460 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2461 struct kvm_mmu_page *sp,
2465 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2466 if (vcpu->arch.update_pte.level == PT_PAGE_TABLE_LEVEL ||
2467 sp->role.glevels == PT32_ROOT_LEVEL) {
2468 ++vcpu->kvm->stat.mmu_pde_zapped;
2473 ++vcpu->kvm->stat.mmu_pte_updated;
2474 if (sp->role.glevels == PT32_ROOT_LEVEL)
2475 paging32_update_pte(vcpu, sp, spte, new);
2477 paging64_update_pte(vcpu, sp, spte, new);
2480 static bool need_remote_flush(u64 old, u64 new)
2482 if (!is_shadow_present_pte(old))
2484 if (!is_shadow_present_pte(new))
2486 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2488 old ^= PT64_NX_MASK;
2489 new ^= PT64_NX_MASK;
2490 return (old & ~new & PT64_PERM_MASK) != 0;
2493 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2495 if (need_remote_flush(old, new))
2496 kvm_flush_remote_tlbs(vcpu->kvm);
2498 kvm_mmu_flush_tlb(vcpu);
2501 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2503 u64 *spte = vcpu->arch.last_pte_updated;
2505 return !!(spte && (*spte & shadow_accessed_mask));
2508 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2509 const u8 *new, int bytes)
2516 vcpu->arch.update_pte.level = PT_PAGE_TABLE_LEVEL;
2518 if (bytes != 4 && bytes != 8)
2522 * Assume that the pte write on a page table of the same type
2523 * as the current vcpu paging mode. This is nearly always true
2524 * (might be false while changing modes). Note it is verified later
2528 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2529 if ((bytes == 4) && (gpa % 4 == 0)) {
2530 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2533 memcpy((void *)&gpte + (gpa % 8), new, 4);
2534 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2535 memcpy((void *)&gpte, new, 8);
2538 if ((bytes == 4) && (gpa % 4 == 0))
2539 memcpy((void *)&gpte, new, 4);
2541 if (!is_present_gpte(gpte))
2543 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2545 if (is_large_pte(gpte) &&
2546 (mapping_level(vcpu, gfn) == PT_DIRECTORY_LEVEL)) {
2547 gfn &= ~(KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL) - 1);
2548 vcpu->arch.update_pte.level = PT_DIRECTORY_LEVEL;
2550 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2552 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2554 if (is_error_pfn(pfn)) {
2555 kvm_release_pfn_clean(pfn);
2558 vcpu->arch.update_pte.gfn = gfn;
2559 vcpu->arch.update_pte.pfn = pfn;
2562 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2564 u64 *spte = vcpu->arch.last_pte_updated;
2567 && vcpu->arch.last_pte_gfn == gfn
2568 && shadow_accessed_mask
2569 && !(*spte & shadow_accessed_mask)
2570 && is_shadow_present_pte(*spte))
2571 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2574 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2575 const u8 *new, int bytes,
2576 bool guest_initiated)
2578 gfn_t gfn = gpa >> PAGE_SHIFT;
2579 struct kvm_mmu_page *sp;
2580 struct hlist_node *node, *n;
2581 struct hlist_head *bucket;
2585 unsigned offset = offset_in_page(gpa);
2587 unsigned page_offset;
2588 unsigned misaligned;
2595 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2596 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
2597 spin_lock(&vcpu->kvm->mmu_lock);
2598 kvm_mmu_access_page(vcpu, gfn);
2599 kvm_mmu_free_some_pages(vcpu);
2600 ++vcpu->kvm->stat.mmu_pte_write;
2601 kvm_mmu_audit(vcpu, "pre pte write");
2602 if (guest_initiated) {
2603 if (gfn == vcpu->arch.last_pt_write_gfn
2604 && !last_updated_pte_accessed(vcpu)) {
2605 ++vcpu->arch.last_pt_write_count;
2606 if (vcpu->arch.last_pt_write_count >= 3)
2609 vcpu->arch.last_pt_write_gfn = gfn;
2610 vcpu->arch.last_pt_write_count = 1;
2611 vcpu->arch.last_pte_updated = NULL;
2614 index = kvm_page_table_hashfn(gfn);
2615 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2616 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2617 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2619 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
2620 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2621 misaligned |= bytes < 4;
2622 if (misaligned || flooded) {
2624 * Misaligned accesses are too much trouble to fix
2625 * up; also, they usually indicate a page is not used
2628 * If we're seeing too many writes to a page,
2629 * it may no longer be a page table, or we may be
2630 * forking, in which case it is better to unmap the
2633 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2634 gpa, bytes, sp->role.word);
2635 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2637 ++vcpu->kvm->stat.mmu_flooded;
2640 page_offset = offset;
2641 level = sp->role.level;
2643 if (sp->role.glevels == PT32_ROOT_LEVEL) {
2644 page_offset <<= 1; /* 32->64 */
2646 * A 32-bit pde maps 4MB while the shadow pdes map
2647 * only 2MB. So we need to double the offset again
2648 * and zap two pdes instead of one.
2650 if (level == PT32_ROOT_LEVEL) {
2651 page_offset &= ~7; /* kill rounding error */
2655 quadrant = page_offset >> PAGE_SHIFT;
2656 page_offset &= ~PAGE_MASK;
2657 if (quadrant != sp->role.quadrant)
2660 spte = &sp->spt[page_offset / sizeof(*spte)];
2661 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2663 r = kvm_read_guest_atomic(vcpu->kvm,
2664 gpa & ~(u64)(pte_size - 1),
2666 new = (const void *)&gentry;
2672 mmu_pte_write_zap_pte(vcpu, sp, spte);
2674 mmu_pte_write_new_pte(vcpu, sp, spte, new);
2675 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2679 kvm_mmu_audit(vcpu, "post pte write");
2680 spin_unlock(&vcpu->kvm->mmu_lock);
2681 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2682 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2683 vcpu->arch.update_pte.pfn = bad_pfn;
2687 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2692 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
2694 spin_lock(&vcpu->kvm->mmu_lock);
2695 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2696 spin_unlock(&vcpu->kvm->mmu_lock);
2699 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2701 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2703 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
2704 struct kvm_mmu_page *sp;
2706 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2707 struct kvm_mmu_page, link);
2708 kvm_mmu_zap_page(vcpu->kvm, sp);
2709 ++vcpu->kvm->stat.mmu_recycled;
2713 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2716 enum emulation_result er;
2718 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2727 r = mmu_topup_memory_caches(vcpu);
2731 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
2736 case EMULATE_DO_MMIO:
2737 ++vcpu->stat.mmio_exits;
2740 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2741 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
2749 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2751 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2753 vcpu->arch.mmu.invlpg(vcpu, gva);
2754 kvm_mmu_flush_tlb(vcpu);
2755 ++vcpu->stat.invlpg;
2757 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2759 void kvm_enable_tdp(void)
2763 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2765 void kvm_disable_tdp(void)
2767 tdp_enabled = false;
2769 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2771 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2773 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2776 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2783 spin_lock(&vcpu->kvm->mmu_lock);
2784 if (vcpu->kvm->arch.n_requested_mmu_pages)
2785 vcpu->kvm->arch.n_free_mmu_pages =
2786 vcpu->kvm->arch.n_requested_mmu_pages;
2788 vcpu->kvm->arch.n_free_mmu_pages =
2789 vcpu->kvm->arch.n_alloc_mmu_pages;
2790 spin_unlock(&vcpu->kvm->mmu_lock);
2792 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2793 * Therefore we need to allocate shadow page tables in the first
2794 * 4GB of memory, which happens to fit the DMA32 zone.
2796 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2799 vcpu->arch.mmu.pae_root = page_address(page);
2800 for (i = 0; i < 4; ++i)
2801 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2806 free_mmu_pages(vcpu);
2810 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2813 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2815 return alloc_mmu_pages(vcpu);
2818 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2821 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2823 return init_kvm_mmu(vcpu);
2826 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2830 destroy_kvm_mmu(vcpu);
2831 free_mmu_pages(vcpu);
2832 mmu_free_memory_caches(vcpu);
2835 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2837 struct kvm_mmu_page *sp;
2839 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2843 if (!test_bit(slot, sp->slot_bitmap))
2847 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2849 if (pt[i] & PT_WRITABLE_MASK)
2850 pt[i] &= ~PT_WRITABLE_MASK;
2852 kvm_flush_remote_tlbs(kvm);
2855 void kvm_mmu_zap_all(struct kvm *kvm)
2857 struct kvm_mmu_page *sp, *node;
2859 spin_lock(&kvm->mmu_lock);
2860 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2861 if (kvm_mmu_zap_page(kvm, sp))
2862 node = container_of(kvm->arch.active_mmu_pages.next,
2863 struct kvm_mmu_page, link);
2864 spin_unlock(&kvm->mmu_lock);
2866 kvm_flush_remote_tlbs(kvm);
2869 static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
2871 struct kvm_mmu_page *page;
2873 page = container_of(kvm->arch.active_mmu_pages.prev,
2874 struct kvm_mmu_page, link);
2875 kvm_mmu_zap_page(kvm, page);
2878 static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2881 struct kvm *kvm_freed = NULL;
2882 int cache_count = 0;
2884 spin_lock(&kvm_lock);
2886 list_for_each_entry(kvm, &vm_list, vm_list) {
2889 if (!down_read_trylock(&kvm->slots_lock))
2891 spin_lock(&kvm->mmu_lock);
2892 npages = kvm->arch.n_alloc_mmu_pages -
2893 kvm->arch.n_free_mmu_pages;
2894 cache_count += npages;
2895 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2896 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2902 spin_unlock(&kvm->mmu_lock);
2903 up_read(&kvm->slots_lock);
2906 list_move_tail(&kvm_freed->vm_list, &vm_list);
2908 spin_unlock(&kvm_lock);
2913 static struct shrinker mmu_shrinker = {
2914 .shrink = mmu_shrink,
2915 .seeks = DEFAULT_SEEKS * 10,
2918 static void mmu_destroy_caches(void)
2920 if (pte_chain_cache)
2921 kmem_cache_destroy(pte_chain_cache);
2922 if (rmap_desc_cache)
2923 kmem_cache_destroy(rmap_desc_cache);
2924 if (mmu_page_header_cache)
2925 kmem_cache_destroy(mmu_page_header_cache);
2928 void kvm_mmu_module_exit(void)
2930 mmu_destroy_caches();
2931 unregister_shrinker(&mmu_shrinker);
2934 int kvm_mmu_module_init(void)
2936 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2937 sizeof(struct kvm_pte_chain),
2939 if (!pte_chain_cache)
2941 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2942 sizeof(struct kvm_rmap_desc),
2944 if (!rmap_desc_cache)
2947 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2948 sizeof(struct kvm_mmu_page),
2950 if (!mmu_page_header_cache)
2953 register_shrinker(&mmu_shrinker);
2958 mmu_destroy_caches();
2963 * Caculate mmu pages needed for kvm.
2965 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2968 unsigned int nr_mmu_pages;
2969 unsigned int nr_pages = 0;
2971 for (i = 0; i < kvm->nmemslots; i++)
2972 nr_pages += kvm->memslots[i].npages;
2974 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2975 nr_mmu_pages = max(nr_mmu_pages,
2976 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2978 return nr_mmu_pages;
2981 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2984 if (len > buffer->len)
2989 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2994 ret = pv_mmu_peek_buffer(buffer, len);
2999 buffer->processed += len;
3003 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3004 gpa_t addr, gpa_t value)
3009 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3012 r = mmu_topup_memory_caches(vcpu);
3016 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3022 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3024 kvm_set_cr3(vcpu, vcpu->arch.cr3);
3028 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3030 spin_lock(&vcpu->kvm->mmu_lock);
3031 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3032 spin_unlock(&vcpu->kvm->mmu_lock);
3036 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3037 struct kvm_pv_mmu_op_buffer *buffer)
3039 struct kvm_mmu_op_header *header;
3041 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3044 switch (header->op) {
3045 case KVM_MMU_OP_WRITE_PTE: {
3046 struct kvm_mmu_op_write_pte *wpte;
3048 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3051 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3054 case KVM_MMU_OP_FLUSH_TLB: {
3055 struct kvm_mmu_op_flush_tlb *ftlb;
3057 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3060 return kvm_pv_mmu_flush_tlb(vcpu);
3062 case KVM_MMU_OP_RELEASE_PT: {
3063 struct kvm_mmu_op_release_pt *rpt;
3065 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3068 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3074 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3075 gpa_t addr, unsigned long *ret)
3078 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3080 buffer->ptr = buffer->buf;
3081 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3082 buffer->processed = 0;
3084 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3088 while (buffer->len) {
3089 r = kvm_pv_mmu_op_one(vcpu, buffer);
3098 *ret = buffer->processed;
3102 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3104 struct kvm_shadow_walk_iterator iterator;
3107 spin_lock(&vcpu->kvm->mmu_lock);
3108 for_each_shadow_entry(vcpu, addr, iterator) {
3109 sptes[iterator.level-1] = *iterator.sptep;
3111 if (!is_shadow_present_pte(*iterator.sptep))
3114 spin_unlock(&vcpu->kvm->mmu_lock);
3118 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3122 static const char *audit_msg;
3124 static gva_t canonicalize(gva_t gva)
3126 #ifdef CONFIG_X86_64
3127 gva = (long long)(gva << 16) >> 16;
3133 typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp,
3136 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3141 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3142 u64 ent = sp->spt[i];
3144 if (is_shadow_present_pte(ent)) {
3145 if (!is_last_spte(ent, sp->role.level)) {
3146 struct kvm_mmu_page *child;
3147 child = page_header(ent & PT64_BASE_ADDR_MASK);
3148 __mmu_spte_walk(kvm, child, fn);
3150 fn(kvm, sp, &sp->spt[i]);
3155 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3158 struct kvm_mmu_page *sp;
3160 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3162 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3163 hpa_t root = vcpu->arch.mmu.root_hpa;
3164 sp = page_header(root);
3165 __mmu_spte_walk(vcpu->kvm, sp, fn);
3168 for (i = 0; i < 4; ++i) {
3169 hpa_t root = vcpu->arch.mmu.pae_root[i];
3171 if (root && VALID_PAGE(root)) {
3172 root &= PT64_BASE_ADDR_MASK;
3173 sp = page_header(root);
3174 __mmu_spte_walk(vcpu->kvm, sp, fn);
3180 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3181 gva_t va, int level)
3183 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3185 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3187 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3190 if (ent == shadow_trap_nonpresent_pte)
3193 va = canonicalize(va);
3194 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3195 audit_mappings_page(vcpu, ent, va, level - 1);
3197 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
3198 gfn_t gfn = gpa >> PAGE_SHIFT;
3199 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3200 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3202 if (is_error_pfn(pfn)) {
3203 kvm_release_pfn_clean(pfn);
3207 if (is_shadow_present_pte(ent)
3208 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3209 printk(KERN_ERR "xx audit error: (%s) levels %d"
3210 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3211 audit_msg, vcpu->arch.mmu.root_level,
3213 is_shadow_present_pte(ent));
3214 else if (ent == shadow_notrap_nonpresent_pte
3215 && !is_error_hpa(hpa))
3216 printk(KERN_ERR "audit: (%s) notrap shadow,"
3217 " valid guest gva %lx\n", audit_msg, va);
3218 kvm_release_pfn_clean(pfn);
3224 static void audit_mappings(struct kvm_vcpu *vcpu)
3228 if (vcpu->arch.mmu.root_level == 4)
3229 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3231 for (i = 0; i < 4; ++i)
3232 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3233 audit_mappings_page(vcpu,
3234 vcpu->arch.mmu.pae_root[i],
3239 static int count_rmaps(struct kvm_vcpu *vcpu)
3244 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3245 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
3246 struct kvm_rmap_desc *d;
3248 for (j = 0; j < m->npages; ++j) {
3249 unsigned long *rmapp = &m->rmap[j];
3253 if (!(*rmapp & 1)) {
3257 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3259 for (k = 0; k < RMAP_EXT; ++k)
3271 void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep)
3273 unsigned long *rmapp;
3274 struct kvm_mmu_page *rev_sp;
3277 if (*sptep & PT_WRITABLE_MASK) {
3278 rev_sp = page_header(__pa(sptep));
3279 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3281 if (!gfn_to_memslot(kvm, gfn)) {
3282 if (!printk_ratelimit())
3284 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3286 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3287 audit_msg, sptep - rev_sp->spt,
3293 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3294 is_large_pte(*sptep));
3296 if (!printk_ratelimit())
3298 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3306 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3308 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3311 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3313 struct kvm_mmu_page *sp;
3316 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3319 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3322 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3325 if (!(ent & PT_PRESENT_MASK))
3327 if (!(ent & PT_WRITABLE_MASK))
3329 inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]);
3335 static void audit_rmap(struct kvm_vcpu *vcpu)
3337 check_writable_mappings_rmap(vcpu);
3341 static void audit_write_protection(struct kvm_vcpu *vcpu)
3343 struct kvm_mmu_page *sp;
3344 struct kvm_memory_slot *slot;
3345 unsigned long *rmapp;
3349 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3350 if (sp->role.direct)
3355 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3356 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3357 rmapp = &slot->rmap[gfn - slot->base_gfn];
3359 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3361 if (*spte & PT_WRITABLE_MASK)
3362 printk(KERN_ERR "%s: (%s) shadow page has "
3363 "writable mappings: gfn %lx role %x\n",
3364 __func__, audit_msg, sp->gfn,
3366 spte = rmap_next(vcpu->kvm, rmapp, spte);
3371 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3378 audit_write_protection(vcpu);
3379 if (strcmp("pre pte write", audit_msg) != 0)
3380 audit_mappings(vcpu);
3381 audit_writable_sptes_have_rmaps(vcpu);