2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
21 #include "kvm_cache_regs.h"
23 #include <linux/kvm_host.h>
24 #include <linux/types.h>
25 #include <linux/string.h>
27 #include <linux/highmem.h>
28 #include <linux/module.h>
29 #include <linux/swap.h>
30 #include <linux/hugetlb.h>
31 #include <linux/compiler.h>
34 #include <asm/cmpxchg.h>
39 * When setting this variable to true it enables Two-Dimensional-Paging
40 * where the hardware walks 2 page tables:
41 * 1. the guest-virtual to guest-physical
42 * 2. while doing 1. it walks guest-physical to host-physical
43 * If the hardware supports that we don't need to do shadow paging.
45 bool tdp_enabled = false;
52 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
54 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
59 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
60 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
64 #define pgprintk(x...) do { } while (0)
65 #define rmap_printk(x...) do { } while (0)
69 #if defined(MMU_DEBUG) || defined(AUDIT)
71 module_param(dbg, bool, 0644);
74 static int oos_shadow = 1;
75 module_param(oos_shadow, bool, 0644);
78 #define ASSERT(x) do { } while (0)
82 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
83 __FILE__, __LINE__, #x); \
87 #define PT_FIRST_AVAIL_BITS_SHIFT 9
88 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
90 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
92 #define PT64_LEVEL_BITS 9
94 #define PT64_LEVEL_SHIFT(level) \
95 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
97 #define PT64_LEVEL_MASK(level) \
98 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
100 #define PT64_INDEX(address, level)\
101 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
104 #define PT32_LEVEL_BITS 10
106 #define PT32_LEVEL_SHIFT(level) \
107 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
109 #define PT32_LEVEL_MASK(level) \
110 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
112 #define PT32_INDEX(address, level)\
113 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
116 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
117 #define PT64_DIR_BASE_ADDR_MASK \
118 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
120 #define PT32_BASE_ADDR_MASK PAGE_MASK
121 #define PT32_DIR_BASE_ADDR_MASK \
122 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
124 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
127 #define PFERR_PRESENT_MASK (1U << 0)
128 #define PFERR_WRITE_MASK (1U << 1)
129 #define PFERR_USER_MASK (1U << 2)
130 #define PFERR_RSVD_MASK (1U << 3)
131 #define PFERR_FETCH_MASK (1U << 4)
133 #define PT_DIRECTORY_LEVEL 2
134 #define PT_PAGE_TABLE_LEVEL 1
138 #define ACC_EXEC_MASK 1
139 #define ACC_WRITE_MASK PT_WRITABLE_MASK
140 #define ACC_USER_MASK PT_USER_MASK
141 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
143 #define CREATE_TRACE_POINTS
144 #include "mmutrace.h"
146 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
148 struct kvm_rmap_desc {
149 u64 *sptes[RMAP_EXT];
150 struct kvm_rmap_desc *more;
153 struct kvm_shadow_walk_iterator {
161 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
162 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
163 shadow_walk_okay(&(_walker)); \
164 shadow_walk_next(&(_walker)))
167 struct kvm_unsync_walk {
168 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
171 typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
173 static struct kmem_cache *pte_chain_cache;
174 static struct kmem_cache *rmap_desc_cache;
175 static struct kmem_cache *mmu_page_header_cache;
177 static u64 __read_mostly shadow_trap_nonpresent_pte;
178 static u64 __read_mostly shadow_notrap_nonpresent_pte;
179 static u64 __read_mostly shadow_base_present_pte;
180 static u64 __read_mostly shadow_nx_mask;
181 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
182 static u64 __read_mostly shadow_user_mask;
183 static u64 __read_mostly shadow_accessed_mask;
184 static u64 __read_mostly shadow_dirty_mask;
186 static inline u64 rsvd_bits(int s, int e)
188 return ((1ULL << (e - s + 1)) - 1) << s;
191 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
193 shadow_trap_nonpresent_pte = trap_pte;
194 shadow_notrap_nonpresent_pte = notrap_pte;
196 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
198 void kvm_mmu_set_base_ptes(u64 base_pte)
200 shadow_base_present_pte = base_pte;
202 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
204 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
205 u64 dirty_mask, u64 nx_mask, u64 x_mask)
207 shadow_user_mask = user_mask;
208 shadow_accessed_mask = accessed_mask;
209 shadow_dirty_mask = dirty_mask;
210 shadow_nx_mask = nx_mask;
211 shadow_x_mask = x_mask;
213 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
215 static int is_write_protection(struct kvm_vcpu *vcpu)
217 return vcpu->arch.cr0 & X86_CR0_WP;
220 static int is_cpuid_PSE36(void)
225 static int is_nx(struct kvm_vcpu *vcpu)
227 return vcpu->arch.shadow_efer & EFER_NX;
230 static int is_shadow_present_pte(u64 pte)
232 return pte != shadow_trap_nonpresent_pte
233 && pte != shadow_notrap_nonpresent_pte;
236 static int is_large_pte(u64 pte)
238 return pte & PT_PAGE_SIZE_MASK;
241 static int is_writeble_pte(unsigned long pte)
243 return pte & PT_WRITABLE_MASK;
246 static int is_dirty_gpte(unsigned long pte)
248 return pte & PT_DIRTY_MASK;
251 static int is_rmap_spte(u64 pte)
253 return is_shadow_present_pte(pte);
256 static int is_last_spte(u64 pte, int level)
258 if (level == PT_PAGE_TABLE_LEVEL)
260 if (level == PT_DIRECTORY_LEVEL && is_large_pte(pte))
265 static pfn_t spte_to_pfn(u64 pte)
267 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
270 static gfn_t pse36_gfn_delta(u32 gpte)
272 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
274 return (gpte & PT32_DIR_PSE36_MASK) << shift;
277 static void __set_spte(u64 *sptep, u64 spte)
280 set_64bit((unsigned long *)sptep, spte);
282 set_64bit((unsigned long long *)sptep, spte);
286 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
287 struct kmem_cache *base_cache, int min)
291 if (cache->nobjs >= min)
293 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
294 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
297 cache->objects[cache->nobjs++] = obj;
302 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
305 kfree(mc->objects[--mc->nobjs]);
308 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
313 if (cache->nobjs >= min)
315 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
316 page = alloc_page(GFP_KERNEL);
319 set_page_private(page, 0);
320 cache->objects[cache->nobjs++] = page_address(page);
325 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
328 free_page((unsigned long)mc->objects[--mc->nobjs]);
331 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
335 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
339 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
343 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
346 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
347 mmu_page_header_cache, 4);
352 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
354 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
355 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
356 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
357 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
360 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
366 p = mc->objects[--mc->nobjs];
370 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
372 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
373 sizeof(struct kvm_pte_chain));
376 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
381 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
383 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
384 sizeof(struct kvm_rmap_desc));
387 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
393 * Return the pointer to the largepage write count for a given
394 * gfn, handling slots that are not large page aligned.
396 static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
400 idx = (gfn / KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL)) -
401 (slot->base_gfn / KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL));
402 return &slot->lpage_info[0][idx].write_count;
405 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
409 gfn = unalias_gfn(kvm, gfn);
410 write_count = slot_largepage_idx(gfn,
411 gfn_to_memslot_unaliased(kvm, gfn));
415 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
419 gfn = unalias_gfn(kvm, gfn);
420 write_count = slot_largepage_idx(gfn,
421 gfn_to_memslot_unaliased(kvm, gfn));
423 WARN_ON(*write_count < 0);
426 static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
428 struct kvm_memory_slot *slot;
431 gfn = unalias_gfn(kvm, gfn);
432 slot = gfn_to_memslot_unaliased(kvm, gfn);
434 largepage_idx = slot_largepage_idx(gfn, slot);
435 return *largepage_idx;
441 static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
443 struct vm_area_struct *vma;
447 addr = gfn_to_hva(kvm, gfn);
448 if (kvm_is_error_hva(addr))
451 down_read(¤t->mm->mmap_sem);
452 vma = find_vma(current->mm, addr);
453 if (vma && is_vm_hugetlb_page(vma))
455 up_read(¤t->mm->mmap_sem);
460 static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
462 struct kvm_memory_slot *slot;
464 if (has_wrprotected_page(vcpu->kvm, large_gfn))
467 if (!host_largepage_backed(vcpu->kvm, large_gfn))
470 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
471 if (slot && slot->dirty_bitmap)
478 * Take gfn and return the reverse mapping to it.
479 * Note: gfn must be unaliased before this function get called
482 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
484 struct kvm_memory_slot *slot;
487 slot = gfn_to_memslot(kvm, gfn);
488 if (likely(level == PT_PAGE_TABLE_LEVEL))
489 return &slot->rmap[gfn - slot->base_gfn];
491 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
492 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
494 return &slot->lpage_info[level - 2][idx].rmap_pde;
498 * Reverse mapping data structures:
500 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
501 * that points to page_address(page).
503 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
504 * containing more mappings.
506 * Returns the number of rmap entries before the spte was added or zero if
507 * the spte was not added.
510 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
512 struct kvm_mmu_page *sp;
513 struct kvm_rmap_desc *desc;
514 unsigned long *rmapp;
517 if (!is_rmap_spte(*spte))
519 gfn = unalias_gfn(vcpu->kvm, gfn);
520 sp = page_header(__pa(spte));
521 sp->gfns[spte - sp->spt] = gfn;
522 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
524 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
525 *rmapp = (unsigned long)spte;
526 } else if (!(*rmapp & 1)) {
527 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
528 desc = mmu_alloc_rmap_desc(vcpu);
529 desc->sptes[0] = (u64 *)*rmapp;
530 desc->sptes[1] = spte;
531 *rmapp = (unsigned long)desc | 1;
533 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
534 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
535 while (desc->sptes[RMAP_EXT-1] && desc->more) {
539 if (desc->sptes[RMAP_EXT-1]) {
540 desc->more = mmu_alloc_rmap_desc(vcpu);
543 for (i = 0; desc->sptes[i]; ++i)
545 desc->sptes[i] = spte;
550 static void rmap_desc_remove_entry(unsigned long *rmapp,
551 struct kvm_rmap_desc *desc,
553 struct kvm_rmap_desc *prev_desc)
557 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
559 desc->sptes[i] = desc->sptes[j];
560 desc->sptes[j] = NULL;
563 if (!prev_desc && !desc->more)
564 *rmapp = (unsigned long)desc->sptes[0];
567 prev_desc->more = desc->more;
569 *rmapp = (unsigned long)desc->more | 1;
570 mmu_free_rmap_desc(desc);
573 static void rmap_remove(struct kvm *kvm, u64 *spte)
575 struct kvm_rmap_desc *desc;
576 struct kvm_rmap_desc *prev_desc;
577 struct kvm_mmu_page *sp;
579 unsigned long *rmapp;
582 if (!is_rmap_spte(*spte))
584 sp = page_header(__pa(spte));
585 pfn = spte_to_pfn(*spte);
586 if (*spte & shadow_accessed_mask)
587 kvm_set_pfn_accessed(pfn);
588 if (is_writeble_pte(*spte))
589 kvm_release_pfn_dirty(pfn);
591 kvm_release_pfn_clean(pfn);
592 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
594 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
596 } else if (!(*rmapp & 1)) {
597 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
598 if ((u64 *)*rmapp != spte) {
599 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
605 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
606 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
609 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
610 if (desc->sptes[i] == spte) {
611 rmap_desc_remove_entry(rmapp,
623 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
625 struct kvm_rmap_desc *desc;
626 struct kvm_rmap_desc *prev_desc;
632 else if (!(*rmapp & 1)) {
634 return (u64 *)*rmapp;
637 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
641 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
642 if (prev_spte == spte)
643 return desc->sptes[i];
644 prev_spte = desc->sptes[i];
651 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
653 unsigned long *rmapp;
655 int i, write_protected = 0;
657 gfn = unalias_gfn(kvm, gfn);
658 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
660 spte = rmap_next(kvm, rmapp, NULL);
663 BUG_ON(!(*spte & PT_PRESENT_MASK));
664 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
665 if (is_writeble_pte(*spte)) {
666 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
669 spte = rmap_next(kvm, rmapp, spte);
671 if (write_protected) {
674 spte = rmap_next(kvm, rmapp, NULL);
675 pfn = spte_to_pfn(*spte);
676 kvm_set_pfn_dirty(pfn);
679 /* check for huge page mappings */
680 for (i = PT_DIRECTORY_LEVEL;
681 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
682 rmapp = gfn_to_rmap(kvm, gfn, i);
683 spte = rmap_next(kvm, rmapp, NULL);
686 BUG_ON(!(*spte & PT_PRESENT_MASK));
687 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
688 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
689 if (is_writeble_pte(*spte)) {
690 rmap_remove(kvm, spte);
692 __set_spte(spte, shadow_trap_nonpresent_pte);
696 spte = rmap_next(kvm, rmapp, spte);
700 return write_protected;
703 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
706 int need_tlb_flush = 0;
708 while ((spte = rmap_next(kvm, rmapp, NULL))) {
709 BUG_ON(!(*spte & PT_PRESENT_MASK));
710 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
711 rmap_remove(kvm, spte);
712 __set_spte(spte, shadow_trap_nonpresent_pte);
715 return need_tlb_flush;
718 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
719 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
725 * If mmap_sem isn't taken, we can look the memslots with only
726 * the mmu_lock by skipping over the slots with userspace_addr == 0.
728 for (i = 0; i < kvm->nmemslots; i++) {
729 struct kvm_memory_slot *memslot = &kvm->memslots[i];
730 unsigned long start = memslot->userspace_addr;
733 /* mmu_lock protects userspace_addr */
737 end = start + (memslot->npages << PAGE_SHIFT);
738 if (hva >= start && hva < end) {
739 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
740 int idx = gfn_offset /
741 KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL);
742 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
743 retval |= handler(kvm,
744 &memslot->lpage_info[0][idx].rmap_pde);
751 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
753 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
756 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
761 /* always return old for EPT */
762 if (!shadow_accessed_mask)
765 spte = rmap_next(kvm, rmapp, NULL);
769 BUG_ON(!(_spte & PT_PRESENT_MASK));
770 _young = _spte & PT_ACCESSED_MASK;
773 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
775 spte = rmap_next(kvm, rmapp, spte);
780 #define RMAP_RECYCLE_THRESHOLD 1000
782 static void rmap_recycle(struct kvm_vcpu *vcpu, gfn_t gfn, int lpage)
784 unsigned long *rmapp;
786 gfn = unalias_gfn(vcpu->kvm, gfn);
787 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
789 kvm_unmap_rmapp(vcpu->kvm, rmapp);
790 kvm_flush_remote_tlbs(vcpu->kvm);
793 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
795 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
799 static int is_empty_shadow_page(u64 *spt)
804 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
805 if (is_shadow_present_pte(*pos)) {
806 printk(KERN_ERR "%s: %p %llx\n", __func__,
814 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
816 ASSERT(is_empty_shadow_page(sp->spt));
818 __free_page(virt_to_page(sp->spt));
819 __free_page(virt_to_page(sp->gfns));
821 ++kvm->arch.n_free_mmu_pages;
824 static unsigned kvm_page_table_hashfn(gfn_t gfn)
826 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
829 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
832 struct kvm_mmu_page *sp;
834 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
835 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
836 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
837 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
838 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
839 INIT_LIST_HEAD(&sp->oos_link);
840 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
842 sp->parent_pte = parent_pte;
843 --vcpu->kvm->arch.n_free_mmu_pages;
847 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
848 struct kvm_mmu_page *sp, u64 *parent_pte)
850 struct kvm_pte_chain *pte_chain;
851 struct hlist_node *node;
856 if (!sp->multimapped) {
857 u64 *old = sp->parent_pte;
860 sp->parent_pte = parent_pte;
864 pte_chain = mmu_alloc_pte_chain(vcpu);
865 INIT_HLIST_HEAD(&sp->parent_ptes);
866 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
867 pte_chain->parent_ptes[0] = old;
869 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
870 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
872 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
873 if (!pte_chain->parent_ptes[i]) {
874 pte_chain->parent_ptes[i] = parent_pte;
878 pte_chain = mmu_alloc_pte_chain(vcpu);
880 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
881 pte_chain->parent_ptes[0] = parent_pte;
884 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
887 struct kvm_pte_chain *pte_chain;
888 struct hlist_node *node;
891 if (!sp->multimapped) {
892 BUG_ON(sp->parent_pte != parent_pte);
893 sp->parent_pte = NULL;
896 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
897 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
898 if (!pte_chain->parent_ptes[i])
900 if (pte_chain->parent_ptes[i] != parent_pte)
902 while (i + 1 < NR_PTE_CHAIN_ENTRIES
903 && pte_chain->parent_ptes[i + 1]) {
904 pte_chain->parent_ptes[i]
905 = pte_chain->parent_ptes[i + 1];
908 pte_chain->parent_ptes[i] = NULL;
910 hlist_del(&pte_chain->link);
911 mmu_free_pte_chain(pte_chain);
912 if (hlist_empty(&sp->parent_ptes)) {
914 sp->parent_pte = NULL;
923 static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
924 mmu_parent_walk_fn fn)
926 struct kvm_pte_chain *pte_chain;
927 struct hlist_node *node;
928 struct kvm_mmu_page *parent_sp;
931 if (!sp->multimapped && sp->parent_pte) {
932 parent_sp = page_header(__pa(sp->parent_pte));
934 mmu_parent_walk(vcpu, parent_sp, fn);
937 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
938 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
939 if (!pte_chain->parent_ptes[i])
941 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
943 mmu_parent_walk(vcpu, parent_sp, fn);
947 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
950 struct kvm_mmu_page *sp = page_header(__pa(spte));
952 index = spte - sp->spt;
953 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
954 sp->unsync_children++;
955 WARN_ON(!sp->unsync_children);
958 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
960 struct kvm_pte_chain *pte_chain;
961 struct hlist_node *node;
967 if (!sp->multimapped) {
968 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
972 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
973 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
974 if (!pte_chain->parent_ptes[i])
976 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
980 static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
982 kvm_mmu_update_parents_unsync(sp);
986 static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
987 struct kvm_mmu_page *sp)
989 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
990 kvm_mmu_update_parents_unsync(sp);
993 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
994 struct kvm_mmu_page *sp)
998 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
999 sp->spt[i] = shadow_trap_nonpresent_pte;
1002 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1003 struct kvm_mmu_page *sp)
1008 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1012 #define KVM_PAGE_ARRAY_NR 16
1014 struct kvm_mmu_pages {
1015 struct mmu_page_and_offset {
1016 struct kvm_mmu_page *sp;
1018 } page[KVM_PAGE_ARRAY_NR];
1022 #define for_each_unsync_children(bitmap, idx) \
1023 for (idx = find_first_bit(bitmap, 512); \
1025 idx = find_next_bit(bitmap, 512, idx+1))
1027 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1033 for (i=0; i < pvec->nr; i++)
1034 if (pvec->page[i].sp == sp)
1037 pvec->page[pvec->nr].sp = sp;
1038 pvec->page[pvec->nr].idx = idx;
1040 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1043 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1044 struct kvm_mmu_pages *pvec)
1046 int i, ret, nr_unsync_leaf = 0;
1048 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1049 u64 ent = sp->spt[i];
1051 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1052 struct kvm_mmu_page *child;
1053 child = page_header(ent & PT64_BASE_ADDR_MASK);
1055 if (child->unsync_children) {
1056 if (mmu_pages_add(pvec, child, i))
1059 ret = __mmu_unsync_walk(child, pvec);
1061 __clear_bit(i, sp->unsync_child_bitmap);
1063 nr_unsync_leaf += ret;
1068 if (child->unsync) {
1070 if (mmu_pages_add(pvec, child, i))
1076 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1077 sp->unsync_children = 0;
1079 return nr_unsync_leaf;
1082 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1083 struct kvm_mmu_pages *pvec)
1085 if (!sp->unsync_children)
1088 mmu_pages_add(pvec, sp, 0);
1089 return __mmu_unsync_walk(sp, pvec);
1092 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1095 struct hlist_head *bucket;
1096 struct kvm_mmu_page *sp;
1097 struct hlist_node *node;
1099 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1100 index = kvm_page_table_hashfn(gfn);
1101 bucket = &kvm->arch.mmu_page_hash[index];
1102 hlist_for_each_entry(sp, node, bucket, hash_link)
1103 if (sp->gfn == gfn && !sp->role.direct
1104 && !sp->role.invalid) {
1105 pgprintk("%s: found role %x\n",
1106 __func__, sp->role.word);
1112 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1114 WARN_ON(!sp->unsync);
1116 --kvm->stat.mmu_unsync;
1119 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1121 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1123 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1124 kvm_mmu_zap_page(vcpu->kvm, sp);
1128 trace_kvm_mmu_sync_page(sp);
1129 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1130 kvm_flush_remote_tlbs(vcpu->kvm);
1131 kvm_unlink_unsync_page(vcpu->kvm, sp);
1132 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1133 kvm_mmu_zap_page(vcpu->kvm, sp);
1137 kvm_mmu_flush_tlb(vcpu);
1141 struct mmu_page_path {
1142 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1143 unsigned int idx[PT64_ROOT_LEVEL-1];
1146 #define for_each_sp(pvec, sp, parents, i) \
1147 for (i = mmu_pages_next(&pvec, &parents, -1), \
1148 sp = pvec.page[i].sp; \
1149 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1150 i = mmu_pages_next(&pvec, &parents, i))
1152 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1153 struct mmu_page_path *parents,
1158 for (n = i+1; n < pvec->nr; n++) {
1159 struct kvm_mmu_page *sp = pvec->page[n].sp;
1161 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1162 parents->idx[0] = pvec->page[n].idx;
1166 parents->parent[sp->role.level-2] = sp;
1167 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1173 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1175 struct kvm_mmu_page *sp;
1176 unsigned int level = 0;
1179 unsigned int idx = parents->idx[level];
1181 sp = parents->parent[level];
1185 --sp->unsync_children;
1186 WARN_ON((int)sp->unsync_children < 0);
1187 __clear_bit(idx, sp->unsync_child_bitmap);
1189 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1192 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1193 struct mmu_page_path *parents,
1194 struct kvm_mmu_pages *pvec)
1196 parents->parent[parent->role.level-1] = NULL;
1200 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1201 struct kvm_mmu_page *parent)
1204 struct kvm_mmu_page *sp;
1205 struct mmu_page_path parents;
1206 struct kvm_mmu_pages pages;
1208 kvm_mmu_pages_init(parent, &parents, &pages);
1209 while (mmu_unsync_walk(parent, &pages)) {
1212 for_each_sp(pages, sp, parents, i)
1213 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1216 kvm_flush_remote_tlbs(vcpu->kvm);
1218 for_each_sp(pages, sp, parents, i) {
1219 kvm_sync_page(vcpu, sp);
1220 mmu_pages_clear_parents(&parents);
1222 cond_resched_lock(&vcpu->kvm->mmu_lock);
1223 kvm_mmu_pages_init(parent, &parents, &pages);
1227 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1235 union kvm_mmu_page_role role;
1238 struct hlist_head *bucket;
1239 struct kvm_mmu_page *sp;
1240 struct hlist_node *node, *tmp;
1242 role = vcpu->arch.mmu.base_role;
1244 role.direct = direct;
1245 role.access = access;
1246 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1247 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1248 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1249 role.quadrant = quadrant;
1251 index = kvm_page_table_hashfn(gfn);
1252 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1253 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1254 if (sp->gfn == gfn) {
1256 if (kvm_sync_page(vcpu, sp))
1259 if (sp->role.word != role.word)
1262 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1263 if (sp->unsync_children) {
1264 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1265 kvm_mmu_mark_parents_unsync(vcpu, sp);
1267 trace_kvm_mmu_get_page(sp, false);
1270 ++vcpu->kvm->stat.mmu_cache_miss;
1271 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1276 hlist_add_head(&sp->hash_link, bucket);
1278 if (rmap_write_protect(vcpu->kvm, gfn))
1279 kvm_flush_remote_tlbs(vcpu->kvm);
1280 account_shadowed(vcpu->kvm, gfn);
1282 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1283 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1285 nonpaging_prefetch_page(vcpu, sp);
1286 trace_kvm_mmu_get_page(sp, true);
1290 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1291 struct kvm_vcpu *vcpu, u64 addr)
1293 iterator->addr = addr;
1294 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1295 iterator->level = vcpu->arch.mmu.shadow_root_level;
1296 if (iterator->level == PT32E_ROOT_LEVEL) {
1297 iterator->shadow_addr
1298 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1299 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1301 if (!iterator->shadow_addr)
1302 iterator->level = 0;
1306 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1308 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1311 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1312 if (is_large_pte(*iterator->sptep))
1315 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1316 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1320 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1322 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1326 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1327 struct kvm_mmu_page *sp)
1335 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1338 if (is_shadow_present_pte(ent)) {
1339 if (!is_last_spte(ent, sp->role.level)) {
1340 ent &= PT64_BASE_ADDR_MASK;
1341 mmu_page_remove_parent_pte(page_header(ent),
1344 if (is_large_pte(ent))
1346 rmap_remove(kvm, &pt[i]);
1349 pt[i] = shadow_trap_nonpresent_pte;
1353 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1355 mmu_page_remove_parent_pte(sp, parent_pte);
1358 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1361 struct kvm_vcpu *vcpu;
1363 kvm_for_each_vcpu(i, vcpu, kvm)
1364 vcpu->arch.last_pte_updated = NULL;
1367 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1371 while (sp->multimapped || sp->parent_pte) {
1372 if (!sp->multimapped)
1373 parent_pte = sp->parent_pte;
1375 struct kvm_pte_chain *chain;
1377 chain = container_of(sp->parent_ptes.first,
1378 struct kvm_pte_chain, link);
1379 parent_pte = chain->parent_ptes[0];
1381 BUG_ON(!parent_pte);
1382 kvm_mmu_put_page(sp, parent_pte);
1383 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1387 static int mmu_zap_unsync_children(struct kvm *kvm,
1388 struct kvm_mmu_page *parent)
1391 struct mmu_page_path parents;
1392 struct kvm_mmu_pages pages;
1394 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1397 kvm_mmu_pages_init(parent, &parents, &pages);
1398 while (mmu_unsync_walk(parent, &pages)) {
1399 struct kvm_mmu_page *sp;
1401 for_each_sp(pages, sp, parents, i) {
1402 kvm_mmu_zap_page(kvm, sp);
1403 mmu_pages_clear_parents(&parents);
1406 kvm_mmu_pages_init(parent, &parents, &pages);
1412 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1416 trace_kvm_mmu_zap_page(sp);
1417 ++kvm->stat.mmu_shadow_zapped;
1418 ret = mmu_zap_unsync_children(kvm, sp);
1419 kvm_mmu_page_unlink_children(kvm, sp);
1420 kvm_mmu_unlink_parents(kvm, sp);
1421 kvm_flush_remote_tlbs(kvm);
1422 if (!sp->role.invalid && !sp->role.direct)
1423 unaccount_shadowed(kvm, sp->gfn);
1425 kvm_unlink_unsync_page(kvm, sp);
1426 if (!sp->root_count) {
1427 hlist_del(&sp->hash_link);
1428 kvm_mmu_free_page(kvm, sp);
1430 sp->role.invalid = 1;
1431 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1432 kvm_reload_remote_mmus(kvm);
1434 kvm_mmu_reset_last_pte_updated(kvm);
1439 * Changing the number of mmu pages allocated to the vm
1440 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1442 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1446 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1447 used_pages = max(0, used_pages);
1450 * If we set the number of mmu pages to be smaller be than the
1451 * number of actived pages , we must to free some mmu pages before we
1455 if (used_pages > kvm_nr_mmu_pages) {
1456 while (used_pages > kvm_nr_mmu_pages) {
1457 struct kvm_mmu_page *page;
1459 page = container_of(kvm->arch.active_mmu_pages.prev,
1460 struct kvm_mmu_page, link);
1461 kvm_mmu_zap_page(kvm, page);
1464 kvm->arch.n_free_mmu_pages = 0;
1467 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1468 - kvm->arch.n_alloc_mmu_pages;
1470 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1473 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1476 struct hlist_head *bucket;
1477 struct kvm_mmu_page *sp;
1478 struct hlist_node *node, *n;
1481 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1483 index = kvm_page_table_hashfn(gfn);
1484 bucket = &kvm->arch.mmu_page_hash[index];
1485 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1486 if (sp->gfn == gfn && !sp->role.direct) {
1487 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1490 if (kvm_mmu_zap_page(kvm, sp))
1496 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1499 struct hlist_head *bucket;
1500 struct kvm_mmu_page *sp;
1501 struct hlist_node *node, *nn;
1503 index = kvm_page_table_hashfn(gfn);
1504 bucket = &kvm->arch.mmu_page_hash[index];
1505 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1506 if (sp->gfn == gfn && !sp->role.direct
1507 && !sp->role.invalid) {
1508 pgprintk("%s: zap %lx %x\n",
1509 __func__, gfn, sp->role.word);
1510 kvm_mmu_zap_page(kvm, sp);
1515 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1517 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
1518 struct kvm_mmu_page *sp = page_header(__pa(pte));
1520 __set_bit(slot, sp->slot_bitmap);
1523 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1528 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1531 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1532 if (pt[i] == shadow_notrap_nonpresent_pte)
1533 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1537 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1541 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
1543 if (gpa == UNMAPPED_GVA)
1546 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1552 * The function is based on mtrr_type_lookup() in
1553 * arch/x86/kernel/cpu/mtrr/generic.c
1555 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1560 u8 prev_match, curr_match;
1561 int num_var_ranges = KVM_NR_VAR_MTRR;
1563 if (!mtrr_state->enabled)
1566 /* Make end inclusive end, instead of exclusive */
1569 /* Look in fixed ranges. Just return the type as per start */
1570 if (mtrr_state->have_fixed && (start < 0x100000)) {
1573 if (start < 0x80000) {
1575 idx += (start >> 16);
1576 return mtrr_state->fixed_ranges[idx];
1577 } else if (start < 0xC0000) {
1579 idx += ((start - 0x80000) >> 14);
1580 return mtrr_state->fixed_ranges[idx];
1581 } else if (start < 0x1000000) {
1583 idx += ((start - 0xC0000) >> 12);
1584 return mtrr_state->fixed_ranges[idx];
1589 * Look in variable ranges
1590 * Look of multiple ranges matching this address and pick type
1591 * as per MTRR precedence
1593 if (!(mtrr_state->enabled & 2))
1594 return mtrr_state->def_type;
1597 for (i = 0; i < num_var_ranges; ++i) {
1598 unsigned short start_state, end_state;
1600 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1603 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1604 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1605 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1606 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1608 start_state = ((start & mask) == (base & mask));
1609 end_state = ((end & mask) == (base & mask));
1610 if (start_state != end_state)
1613 if ((start & mask) != (base & mask))
1616 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1617 if (prev_match == 0xFF) {
1618 prev_match = curr_match;
1622 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1623 curr_match == MTRR_TYPE_UNCACHABLE)
1624 return MTRR_TYPE_UNCACHABLE;
1626 if ((prev_match == MTRR_TYPE_WRBACK &&
1627 curr_match == MTRR_TYPE_WRTHROUGH) ||
1628 (prev_match == MTRR_TYPE_WRTHROUGH &&
1629 curr_match == MTRR_TYPE_WRBACK)) {
1630 prev_match = MTRR_TYPE_WRTHROUGH;
1631 curr_match = MTRR_TYPE_WRTHROUGH;
1634 if (prev_match != curr_match)
1635 return MTRR_TYPE_UNCACHABLE;
1638 if (prev_match != 0xFF)
1641 return mtrr_state->def_type;
1644 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1648 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1649 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1650 if (mtrr == 0xfe || mtrr == 0xff)
1651 mtrr = MTRR_TYPE_WRBACK;
1654 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1656 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1659 struct hlist_head *bucket;
1660 struct kvm_mmu_page *s;
1661 struct hlist_node *node, *n;
1663 trace_kvm_mmu_unsync_page(sp);
1664 index = kvm_page_table_hashfn(sp->gfn);
1665 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1666 /* don't unsync if pagetable is shadowed with multiple roles */
1667 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1668 if (s->gfn != sp->gfn || s->role.direct)
1670 if (s->role.word != sp->role.word)
1673 ++vcpu->kvm->stat.mmu_unsync;
1676 kvm_mmu_mark_parents_unsync(vcpu, sp);
1678 mmu_convert_notrap(sp);
1682 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1685 struct kvm_mmu_page *shadow;
1687 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1689 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1693 if (can_unsync && oos_shadow)
1694 return kvm_unsync_page(vcpu, shadow);
1700 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1701 unsigned pte_access, int user_fault,
1702 int write_fault, int dirty, int largepage,
1703 gfn_t gfn, pfn_t pfn, bool speculative,
1710 * We don't set the accessed bit, since we sometimes want to see
1711 * whether the guest actually used the pte (in order to detect
1714 spte = shadow_base_present_pte | shadow_dirty_mask;
1716 spte |= shadow_accessed_mask;
1718 pte_access &= ~ACC_WRITE_MASK;
1719 if (pte_access & ACC_EXEC_MASK)
1720 spte |= shadow_x_mask;
1722 spte |= shadow_nx_mask;
1723 if (pte_access & ACC_USER_MASK)
1724 spte |= shadow_user_mask;
1726 spte |= PT_PAGE_SIZE_MASK;
1728 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1729 kvm_is_mmio_pfn(pfn));
1731 spte |= (u64)pfn << PAGE_SHIFT;
1733 if ((pte_access & ACC_WRITE_MASK)
1734 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1736 if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
1738 spte = shadow_trap_nonpresent_pte;
1742 spte |= PT_WRITABLE_MASK;
1745 * Optimization: for pte sync, if spte was writable the hash
1746 * lookup is unnecessary (and expensive). Write protection
1747 * is responsibility of mmu_get_page / kvm_sync_page.
1748 * Same reasoning can be applied to dirty page accounting.
1750 if (!can_unsync && is_writeble_pte(*sptep))
1753 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1754 pgprintk("%s: found shadow page for %lx, marking ro\n",
1757 pte_access &= ~ACC_WRITE_MASK;
1758 if (is_writeble_pte(spte))
1759 spte &= ~PT_WRITABLE_MASK;
1763 if (pte_access & ACC_WRITE_MASK)
1764 mark_page_dirty(vcpu->kvm, gfn);
1767 __set_spte(sptep, spte);
1771 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1772 unsigned pt_access, unsigned pte_access,
1773 int user_fault, int write_fault, int dirty,
1774 int *ptwrite, int largepage, gfn_t gfn,
1775 pfn_t pfn, bool speculative)
1777 int was_rmapped = 0;
1778 int was_writeble = is_writeble_pte(*sptep);
1781 pgprintk("%s: spte %llx access %x write_fault %d"
1782 " user_fault %d gfn %lx\n",
1783 __func__, *sptep, pt_access,
1784 write_fault, user_fault, gfn);
1786 if (is_rmap_spte(*sptep)) {
1788 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1789 * the parent of the now unreachable PTE.
1791 if (largepage && !is_large_pte(*sptep)) {
1792 struct kvm_mmu_page *child;
1795 child = page_header(pte & PT64_BASE_ADDR_MASK);
1796 mmu_page_remove_parent_pte(child, sptep);
1797 } else if (pfn != spte_to_pfn(*sptep)) {
1798 pgprintk("hfn old %lx new %lx\n",
1799 spte_to_pfn(*sptep), pfn);
1800 rmap_remove(vcpu->kvm, sptep);
1804 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1805 dirty, largepage, gfn, pfn, speculative, true)) {
1808 kvm_x86_ops->tlb_flush(vcpu);
1811 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1812 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1813 is_large_pte(*sptep)? "2MB" : "4kB",
1814 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1816 if (!was_rmapped && is_large_pte(*sptep))
1817 ++vcpu->kvm->stat.lpages;
1819 page_header_update_slot(vcpu->kvm, sptep, gfn);
1821 rmap_count = rmap_add(vcpu, sptep, gfn);
1822 if (!is_rmap_spte(*sptep))
1823 kvm_release_pfn_clean(pfn);
1824 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1825 rmap_recycle(vcpu, gfn, largepage);
1828 kvm_release_pfn_dirty(pfn);
1830 kvm_release_pfn_clean(pfn);
1833 vcpu->arch.last_pte_updated = sptep;
1834 vcpu->arch.last_pte_gfn = gfn;
1838 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1842 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1843 int largepage, gfn_t gfn, pfn_t pfn)
1845 struct kvm_shadow_walk_iterator iterator;
1846 struct kvm_mmu_page *sp;
1850 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1851 if (iterator.level == PT_PAGE_TABLE_LEVEL
1852 || (largepage && iterator.level == PT_DIRECTORY_LEVEL)) {
1853 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1854 0, write, 1, &pt_write,
1855 largepage, gfn, pfn, false);
1856 ++vcpu->stat.pf_fixed;
1860 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1861 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1862 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1864 1, ACC_ALL, iterator.sptep);
1866 pgprintk("nonpaging_map: ENOMEM\n");
1867 kvm_release_pfn_clean(pfn);
1871 __set_spte(iterator.sptep,
1873 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1874 | shadow_user_mask | shadow_x_mask);
1880 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1885 unsigned long mmu_seq;
1887 if (is_largepage_backed(vcpu, gfn &
1888 ~(KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL) - 1))) {
1889 gfn &= ~(KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL) - 1);
1893 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1895 pfn = gfn_to_pfn(vcpu->kvm, gfn);
1898 if (is_error_pfn(pfn)) {
1899 kvm_release_pfn_clean(pfn);
1903 spin_lock(&vcpu->kvm->mmu_lock);
1904 if (mmu_notifier_retry(vcpu, mmu_seq))
1906 kvm_mmu_free_some_pages(vcpu);
1907 r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
1908 spin_unlock(&vcpu->kvm->mmu_lock);
1914 spin_unlock(&vcpu->kvm->mmu_lock);
1915 kvm_release_pfn_clean(pfn);
1920 static void mmu_free_roots(struct kvm_vcpu *vcpu)
1923 struct kvm_mmu_page *sp;
1925 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
1927 spin_lock(&vcpu->kvm->mmu_lock);
1928 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1929 hpa_t root = vcpu->arch.mmu.root_hpa;
1931 sp = page_header(root);
1933 if (!sp->root_count && sp->role.invalid)
1934 kvm_mmu_zap_page(vcpu->kvm, sp);
1935 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1936 spin_unlock(&vcpu->kvm->mmu_lock);
1939 for (i = 0; i < 4; ++i) {
1940 hpa_t root = vcpu->arch.mmu.pae_root[i];
1943 root &= PT64_BASE_ADDR_MASK;
1944 sp = page_header(root);
1946 if (!sp->root_count && sp->role.invalid)
1947 kvm_mmu_zap_page(vcpu->kvm, sp);
1949 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
1951 spin_unlock(&vcpu->kvm->mmu_lock);
1952 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1955 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
1959 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
1960 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
1967 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
1971 struct kvm_mmu_page *sp;
1975 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
1977 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1978 hpa_t root = vcpu->arch.mmu.root_hpa;
1980 ASSERT(!VALID_PAGE(root));
1983 if (mmu_check_root(vcpu, root_gfn))
1985 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
1986 PT64_ROOT_LEVEL, direct,
1988 root = __pa(sp->spt);
1990 vcpu->arch.mmu.root_hpa = root;
1993 direct = !is_paging(vcpu);
1996 for (i = 0; i < 4; ++i) {
1997 hpa_t root = vcpu->arch.mmu.pae_root[i];
1999 ASSERT(!VALID_PAGE(root));
2000 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2001 pdptr = kvm_pdptr_read(vcpu, i);
2002 if (!is_present_gpte(pdptr)) {
2003 vcpu->arch.mmu.pae_root[i] = 0;
2006 root_gfn = pdptr >> PAGE_SHIFT;
2007 } else if (vcpu->arch.mmu.root_level == 0)
2009 if (mmu_check_root(vcpu, root_gfn))
2011 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2012 PT32_ROOT_LEVEL, direct,
2014 root = __pa(sp->spt);
2016 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2018 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2022 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2025 struct kvm_mmu_page *sp;
2027 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2029 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2030 hpa_t root = vcpu->arch.mmu.root_hpa;
2031 sp = page_header(root);
2032 mmu_sync_children(vcpu, sp);
2035 for (i = 0; i < 4; ++i) {
2036 hpa_t root = vcpu->arch.mmu.pae_root[i];
2038 if (root && VALID_PAGE(root)) {
2039 root &= PT64_BASE_ADDR_MASK;
2040 sp = page_header(root);
2041 mmu_sync_children(vcpu, sp);
2046 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2048 spin_lock(&vcpu->kvm->mmu_lock);
2049 mmu_sync_roots(vcpu);
2050 spin_unlock(&vcpu->kvm->mmu_lock);
2053 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2058 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2064 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2065 r = mmu_topup_memory_caches(vcpu);
2070 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2072 gfn = gva >> PAGE_SHIFT;
2074 return nonpaging_map(vcpu, gva & PAGE_MASK,
2075 error_code & PFERR_WRITE_MASK, gfn);
2078 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2084 gfn_t gfn = gpa >> PAGE_SHIFT;
2085 unsigned long mmu_seq;
2088 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2090 r = mmu_topup_memory_caches(vcpu);
2094 if (is_largepage_backed(vcpu, gfn &
2095 ~(KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL) - 1))) {
2096 gfn &= ~(KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL) - 1);
2099 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2101 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2102 if (is_error_pfn(pfn)) {
2103 kvm_release_pfn_clean(pfn);
2106 spin_lock(&vcpu->kvm->mmu_lock);
2107 if (mmu_notifier_retry(vcpu, mmu_seq))
2109 kvm_mmu_free_some_pages(vcpu);
2110 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2111 largepage, gfn, pfn);
2112 spin_unlock(&vcpu->kvm->mmu_lock);
2117 spin_unlock(&vcpu->kvm->mmu_lock);
2118 kvm_release_pfn_clean(pfn);
2122 static void nonpaging_free(struct kvm_vcpu *vcpu)
2124 mmu_free_roots(vcpu);
2127 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2129 struct kvm_mmu *context = &vcpu->arch.mmu;
2131 context->new_cr3 = nonpaging_new_cr3;
2132 context->page_fault = nonpaging_page_fault;
2133 context->gva_to_gpa = nonpaging_gva_to_gpa;
2134 context->free = nonpaging_free;
2135 context->prefetch_page = nonpaging_prefetch_page;
2136 context->sync_page = nonpaging_sync_page;
2137 context->invlpg = nonpaging_invlpg;
2138 context->root_level = 0;
2139 context->shadow_root_level = PT32E_ROOT_LEVEL;
2140 context->root_hpa = INVALID_PAGE;
2144 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2146 ++vcpu->stat.tlb_flush;
2147 kvm_x86_ops->tlb_flush(vcpu);
2150 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2152 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2153 mmu_free_roots(vcpu);
2156 static void inject_page_fault(struct kvm_vcpu *vcpu,
2160 kvm_inject_page_fault(vcpu, addr, err_code);
2163 static void paging_free(struct kvm_vcpu *vcpu)
2165 nonpaging_free(vcpu);
2168 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2172 bit7 = (gpte >> 7) & 1;
2173 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2177 #include "paging_tmpl.h"
2181 #include "paging_tmpl.h"
2184 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2186 struct kvm_mmu *context = &vcpu->arch.mmu;
2187 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2188 u64 exb_bit_rsvd = 0;
2191 exb_bit_rsvd = rsvd_bits(63, 63);
2193 case PT32_ROOT_LEVEL:
2194 /* no rsvd bits for 2 level 4K page table entries */
2195 context->rsvd_bits_mask[0][1] = 0;
2196 context->rsvd_bits_mask[0][0] = 0;
2197 if (is_cpuid_PSE36())
2198 /* 36bits PSE 4MB page */
2199 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2201 /* 32 bits PSE 4MB page */
2202 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2203 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2205 case PT32E_ROOT_LEVEL:
2206 context->rsvd_bits_mask[0][2] =
2207 rsvd_bits(maxphyaddr, 63) |
2208 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2209 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2210 rsvd_bits(maxphyaddr, 62); /* PDE */
2211 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2212 rsvd_bits(maxphyaddr, 62); /* PTE */
2213 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2214 rsvd_bits(maxphyaddr, 62) |
2215 rsvd_bits(13, 20); /* large page */
2216 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2218 case PT64_ROOT_LEVEL:
2219 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2220 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2221 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2222 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2223 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2224 rsvd_bits(maxphyaddr, 51);
2225 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2226 rsvd_bits(maxphyaddr, 51);
2227 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2228 context->rsvd_bits_mask[1][2] = context->rsvd_bits_mask[0][2];
2229 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2230 rsvd_bits(maxphyaddr, 51) |
2231 rsvd_bits(13, 20); /* large page */
2232 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2237 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2239 struct kvm_mmu *context = &vcpu->arch.mmu;
2241 ASSERT(is_pae(vcpu));
2242 context->new_cr3 = paging_new_cr3;
2243 context->page_fault = paging64_page_fault;
2244 context->gva_to_gpa = paging64_gva_to_gpa;
2245 context->prefetch_page = paging64_prefetch_page;
2246 context->sync_page = paging64_sync_page;
2247 context->invlpg = paging64_invlpg;
2248 context->free = paging_free;
2249 context->root_level = level;
2250 context->shadow_root_level = level;
2251 context->root_hpa = INVALID_PAGE;
2255 static int paging64_init_context(struct kvm_vcpu *vcpu)
2257 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2258 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2261 static int paging32_init_context(struct kvm_vcpu *vcpu)
2263 struct kvm_mmu *context = &vcpu->arch.mmu;
2265 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2266 context->new_cr3 = paging_new_cr3;
2267 context->page_fault = paging32_page_fault;
2268 context->gva_to_gpa = paging32_gva_to_gpa;
2269 context->free = paging_free;
2270 context->prefetch_page = paging32_prefetch_page;
2271 context->sync_page = paging32_sync_page;
2272 context->invlpg = paging32_invlpg;
2273 context->root_level = PT32_ROOT_LEVEL;
2274 context->shadow_root_level = PT32E_ROOT_LEVEL;
2275 context->root_hpa = INVALID_PAGE;
2279 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2281 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2282 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2285 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2287 struct kvm_mmu *context = &vcpu->arch.mmu;
2289 context->new_cr3 = nonpaging_new_cr3;
2290 context->page_fault = tdp_page_fault;
2291 context->free = nonpaging_free;
2292 context->prefetch_page = nonpaging_prefetch_page;
2293 context->sync_page = nonpaging_sync_page;
2294 context->invlpg = nonpaging_invlpg;
2295 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2296 context->root_hpa = INVALID_PAGE;
2298 if (!is_paging(vcpu)) {
2299 context->gva_to_gpa = nonpaging_gva_to_gpa;
2300 context->root_level = 0;
2301 } else if (is_long_mode(vcpu)) {
2302 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2303 context->gva_to_gpa = paging64_gva_to_gpa;
2304 context->root_level = PT64_ROOT_LEVEL;
2305 } else if (is_pae(vcpu)) {
2306 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2307 context->gva_to_gpa = paging64_gva_to_gpa;
2308 context->root_level = PT32E_ROOT_LEVEL;
2310 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2311 context->gva_to_gpa = paging32_gva_to_gpa;
2312 context->root_level = PT32_ROOT_LEVEL;
2318 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2323 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2325 if (!is_paging(vcpu))
2326 r = nonpaging_init_context(vcpu);
2327 else if (is_long_mode(vcpu))
2328 r = paging64_init_context(vcpu);
2329 else if (is_pae(vcpu))
2330 r = paging32E_init_context(vcpu);
2332 r = paging32_init_context(vcpu);
2334 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2339 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2341 vcpu->arch.update_pte.pfn = bad_pfn;
2344 return init_kvm_tdp_mmu(vcpu);
2346 return init_kvm_softmmu(vcpu);
2349 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2352 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2353 vcpu->arch.mmu.free(vcpu);
2354 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2358 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2360 destroy_kvm_mmu(vcpu);
2361 return init_kvm_mmu(vcpu);
2363 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2365 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2369 r = mmu_topup_memory_caches(vcpu);
2372 spin_lock(&vcpu->kvm->mmu_lock);
2373 kvm_mmu_free_some_pages(vcpu);
2374 r = mmu_alloc_roots(vcpu);
2375 mmu_sync_roots(vcpu);
2376 spin_unlock(&vcpu->kvm->mmu_lock);
2379 /* set_cr3() should ensure TLB has been flushed */
2380 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2384 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2386 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2388 mmu_free_roots(vcpu);
2391 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2392 struct kvm_mmu_page *sp,
2396 struct kvm_mmu_page *child;
2399 if (is_shadow_present_pte(pte)) {
2400 if (is_last_spte(pte, sp->role.level))
2401 rmap_remove(vcpu->kvm, spte);
2403 child = page_header(pte & PT64_BASE_ADDR_MASK);
2404 mmu_page_remove_parent_pte(child, spte);
2407 __set_spte(spte, shadow_trap_nonpresent_pte);
2408 if (is_large_pte(pte))
2409 --vcpu->kvm->stat.lpages;
2412 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2413 struct kvm_mmu_page *sp,
2417 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2418 if (!vcpu->arch.update_pte.largepage ||
2419 sp->role.glevels == PT32_ROOT_LEVEL) {
2420 ++vcpu->kvm->stat.mmu_pde_zapped;
2425 ++vcpu->kvm->stat.mmu_pte_updated;
2426 if (sp->role.glevels == PT32_ROOT_LEVEL)
2427 paging32_update_pte(vcpu, sp, spte, new);
2429 paging64_update_pte(vcpu, sp, spte, new);
2432 static bool need_remote_flush(u64 old, u64 new)
2434 if (!is_shadow_present_pte(old))
2436 if (!is_shadow_present_pte(new))
2438 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2440 old ^= PT64_NX_MASK;
2441 new ^= PT64_NX_MASK;
2442 return (old & ~new & PT64_PERM_MASK) != 0;
2445 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2447 if (need_remote_flush(old, new))
2448 kvm_flush_remote_tlbs(vcpu->kvm);
2450 kvm_mmu_flush_tlb(vcpu);
2453 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2455 u64 *spte = vcpu->arch.last_pte_updated;
2457 return !!(spte && (*spte & shadow_accessed_mask));
2460 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2461 const u8 *new, int bytes)
2468 vcpu->arch.update_pte.largepage = 0;
2470 if (bytes != 4 && bytes != 8)
2474 * Assume that the pte write on a page table of the same type
2475 * as the current vcpu paging mode. This is nearly always true
2476 * (might be false while changing modes). Note it is verified later
2480 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2481 if ((bytes == 4) && (gpa % 4 == 0)) {
2482 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2485 memcpy((void *)&gpte + (gpa % 8), new, 4);
2486 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2487 memcpy((void *)&gpte, new, 8);
2490 if ((bytes == 4) && (gpa % 4 == 0))
2491 memcpy((void *)&gpte, new, 4);
2493 if (!is_present_gpte(gpte))
2495 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2497 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
2498 gfn &= ~(KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL) - 1);
2499 vcpu->arch.update_pte.largepage = 1;
2501 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2503 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2505 if (is_error_pfn(pfn)) {
2506 kvm_release_pfn_clean(pfn);
2509 vcpu->arch.update_pte.gfn = gfn;
2510 vcpu->arch.update_pte.pfn = pfn;
2513 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2515 u64 *spte = vcpu->arch.last_pte_updated;
2518 && vcpu->arch.last_pte_gfn == gfn
2519 && shadow_accessed_mask
2520 && !(*spte & shadow_accessed_mask)
2521 && is_shadow_present_pte(*spte))
2522 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2525 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2526 const u8 *new, int bytes,
2527 bool guest_initiated)
2529 gfn_t gfn = gpa >> PAGE_SHIFT;
2530 struct kvm_mmu_page *sp;
2531 struct hlist_node *node, *n;
2532 struct hlist_head *bucket;
2536 unsigned offset = offset_in_page(gpa);
2538 unsigned page_offset;
2539 unsigned misaligned;
2546 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2547 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
2548 spin_lock(&vcpu->kvm->mmu_lock);
2549 kvm_mmu_access_page(vcpu, gfn);
2550 kvm_mmu_free_some_pages(vcpu);
2551 ++vcpu->kvm->stat.mmu_pte_write;
2552 kvm_mmu_audit(vcpu, "pre pte write");
2553 if (guest_initiated) {
2554 if (gfn == vcpu->arch.last_pt_write_gfn
2555 && !last_updated_pte_accessed(vcpu)) {
2556 ++vcpu->arch.last_pt_write_count;
2557 if (vcpu->arch.last_pt_write_count >= 3)
2560 vcpu->arch.last_pt_write_gfn = gfn;
2561 vcpu->arch.last_pt_write_count = 1;
2562 vcpu->arch.last_pte_updated = NULL;
2565 index = kvm_page_table_hashfn(gfn);
2566 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2567 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2568 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2570 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
2571 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2572 misaligned |= bytes < 4;
2573 if (misaligned || flooded) {
2575 * Misaligned accesses are too much trouble to fix
2576 * up; also, they usually indicate a page is not used
2579 * If we're seeing too many writes to a page,
2580 * it may no longer be a page table, or we may be
2581 * forking, in which case it is better to unmap the
2584 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2585 gpa, bytes, sp->role.word);
2586 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2588 ++vcpu->kvm->stat.mmu_flooded;
2591 page_offset = offset;
2592 level = sp->role.level;
2594 if (sp->role.glevels == PT32_ROOT_LEVEL) {
2595 page_offset <<= 1; /* 32->64 */
2597 * A 32-bit pde maps 4MB while the shadow pdes map
2598 * only 2MB. So we need to double the offset again
2599 * and zap two pdes instead of one.
2601 if (level == PT32_ROOT_LEVEL) {
2602 page_offset &= ~7; /* kill rounding error */
2606 quadrant = page_offset >> PAGE_SHIFT;
2607 page_offset &= ~PAGE_MASK;
2608 if (quadrant != sp->role.quadrant)
2611 spte = &sp->spt[page_offset / sizeof(*spte)];
2612 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2614 r = kvm_read_guest_atomic(vcpu->kvm,
2615 gpa & ~(u64)(pte_size - 1),
2617 new = (const void *)&gentry;
2623 mmu_pte_write_zap_pte(vcpu, sp, spte);
2625 mmu_pte_write_new_pte(vcpu, sp, spte, new);
2626 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2630 kvm_mmu_audit(vcpu, "post pte write");
2631 spin_unlock(&vcpu->kvm->mmu_lock);
2632 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2633 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2634 vcpu->arch.update_pte.pfn = bad_pfn;
2638 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2643 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
2645 spin_lock(&vcpu->kvm->mmu_lock);
2646 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2647 spin_unlock(&vcpu->kvm->mmu_lock);
2650 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2652 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2654 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
2655 struct kvm_mmu_page *sp;
2657 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2658 struct kvm_mmu_page, link);
2659 kvm_mmu_zap_page(vcpu->kvm, sp);
2660 ++vcpu->kvm->stat.mmu_recycled;
2664 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2667 enum emulation_result er;
2669 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2678 r = mmu_topup_memory_caches(vcpu);
2682 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
2687 case EMULATE_DO_MMIO:
2688 ++vcpu->stat.mmio_exits;
2691 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2692 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
2700 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2702 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2704 vcpu->arch.mmu.invlpg(vcpu, gva);
2705 kvm_mmu_flush_tlb(vcpu);
2706 ++vcpu->stat.invlpg;
2708 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2710 void kvm_enable_tdp(void)
2714 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2716 void kvm_disable_tdp(void)
2718 tdp_enabled = false;
2720 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2722 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2724 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2727 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2734 spin_lock(&vcpu->kvm->mmu_lock);
2735 if (vcpu->kvm->arch.n_requested_mmu_pages)
2736 vcpu->kvm->arch.n_free_mmu_pages =
2737 vcpu->kvm->arch.n_requested_mmu_pages;
2739 vcpu->kvm->arch.n_free_mmu_pages =
2740 vcpu->kvm->arch.n_alloc_mmu_pages;
2741 spin_unlock(&vcpu->kvm->mmu_lock);
2743 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2744 * Therefore we need to allocate shadow page tables in the first
2745 * 4GB of memory, which happens to fit the DMA32 zone.
2747 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2750 vcpu->arch.mmu.pae_root = page_address(page);
2751 for (i = 0; i < 4; ++i)
2752 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2757 free_mmu_pages(vcpu);
2761 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2764 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2766 return alloc_mmu_pages(vcpu);
2769 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2772 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2774 return init_kvm_mmu(vcpu);
2777 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2781 destroy_kvm_mmu(vcpu);
2782 free_mmu_pages(vcpu);
2783 mmu_free_memory_caches(vcpu);
2786 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2788 struct kvm_mmu_page *sp;
2790 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2794 if (!test_bit(slot, sp->slot_bitmap))
2798 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2800 if (pt[i] & PT_WRITABLE_MASK)
2801 pt[i] &= ~PT_WRITABLE_MASK;
2803 kvm_flush_remote_tlbs(kvm);
2806 void kvm_mmu_zap_all(struct kvm *kvm)
2808 struct kvm_mmu_page *sp, *node;
2810 spin_lock(&kvm->mmu_lock);
2811 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2812 if (kvm_mmu_zap_page(kvm, sp))
2813 node = container_of(kvm->arch.active_mmu_pages.next,
2814 struct kvm_mmu_page, link);
2815 spin_unlock(&kvm->mmu_lock);
2817 kvm_flush_remote_tlbs(kvm);
2820 static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
2822 struct kvm_mmu_page *page;
2824 page = container_of(kvm->arch.active_mmu_pages.prev,
2825 struct kvm_mmu_page, link);
2826 kvm_mmu_zap_page(kvm, page);
2829 static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2832 struct kvm *kvm_freed = NULL;
2833 int cache_count = 0;
2835 spin_lock(&kvm_lock);
2837 list_for_each_entry(kvm, &vm_list, vm_list) {
2840 if (!down_read_trylock(&kvm->slots_lock))
2842 spin_lock(&kvm->mmu_lock);
2843 npages = kvm->arch.n_alloc_mmu_pages -
2844 kvm->arch.n_free_mmu_pages;
2845 cache_count += npages;
2846 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2847 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2853 spin_unlock(&kvm->mmu_lock);
2854 up_read(&kvm->slots_lock);
2857 list_move_tail(&kvm_freed->vm_list, &vm_list);
2859 spin_unlock(&kvm_lock);
2864 static struct shrinker mmu_shrinker = {
2865 .shrink = mmu_shrink,
2866 .seeks = DEFAULT_SEEKS * 10,
2869 static void mmu_destroy_caches(void)
2871 if (pte_chain_cache)
2872 kmem_cache_destroy(pte_chain_cache);
2873 if (rmap_desc_cache)
2874 kmem_cache_destroy(rmap_desc_cache);
2875 if (mmu_page_header_cache)
2876 kmem_cache_destroy(mmu_page_header_cache);
2879 void kvm_mmu_module_exit(void)
2881 mmu_destroy_caches();
2882 unregister_shrinker(&mmu_shrinker);
2885 int kvm_mmu_module_init(void)
2887 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2888 sizeof(struct kvm_pte_chain),
2890 if (!pte_chain_cache)
2892 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2893 sizeof(struct kvm_rmap_desc),
2895 if (!rmap_desc_cache)
2898 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2899 sizeof(struct kvm_mmu_page),
2901 if (!mmu_page_header_cache)
2904 register_shrinker(&mmu_shrinker);
2909 mmu_destroy_caches();
2914 * Caculate mmu pages needed for kvm.
2916 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2919 unsigned int nr_mmu_pages;
2920 unsigned int nr_pages = 0;
2922 for (i = 0; i < kvm->nmemslots; i++)
2923 nr_pages += kvm->memslots[i].npages;
2925 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2926 nr_mmu_pages = max(nr_mmu_pages,
2927 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2929 return nr_mmu_pages;
2932 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2935 if (len > buffer->len)
2940 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2945 ret = pv_mmu_peek_buffer(buffer, len);
2950 buffer->processed += len;
2954 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2955 gpa_t addr, gpa_t value)
2960 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2963 r = mmu_topup_memory_caches(vcpu);
2967 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2973 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2975 kvm_set_cr3(vcpu, vcpu->arch.cr3);
2979 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
2981 spin_lock(&vcpu->kvm->mmu_lock);
2982 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
2983 spin_unlock(&vcpu->kvm->mmu_lock);
2987 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
2988 struct kvm_pv_mmu_op_buffer *buffer)
2990 struct kvm_mmu_op_header *header;
2992 header = pv_mmu_peek_buffer(buffer, sizeof *header);
2995 switch (header->op) {
2996 case KVM_MMU_OP_WRITE_PTE: {
2997 struct kvm_mmu_op_write_pte *wpte;
2999 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3002 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3005 case KVM_MMU_OP_FLUSH_TLB: {
3006 struct kvm_mmu_op_flush_tlb *ftlb;
3008 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3011 return kvm_pv_mmu_flush_tlb(vcpu);
3013 case KVM_MMU_OP_RELEASE_PT: {
3014 struct kvm_mmu_op_release_pt *rpt;
3016 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3019 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3025 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3026 gpa_t addr, unsigned long *ret)
3029 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3031 buffer->ptr = buffer->buf;
3032 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3033 buffer->processed = 0;
3035 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3039 while (buffer->len) {
3040 r = kvm_pv_mmu_op_one(vcpu, buffer);
3049 *ret = buffer->processed;
3053 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3055 struct kvm_shadow_walk_iterator iterator;
3058 spin_lock(&vcpu->kvm->mmu_lock);
3059 for_each_shadow_entry(vcpu, addr, iterator) {
3060 sptes[iterator.level-1] = *iterator.sptep;
3062 if (!is_shadow_present_pte(*iterator.sptep))
3065 spin_unlock(&vcpu->kvm->mmu_lock);
3069 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3073 static const char *audit_msg;
3075 static gva_t canonicalize(gva_t gva)
3077 #ifdef CONFIG_X86_64
3078 gva = (long long)(gva << 16) >> 16;
3084 typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp,
3087 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3092 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3093 u64 ent = sp->spt[i];
3095 if (is_shadow_present_pte(ent)) {
3096 if (!is_last_spte(ent, sp->role.level)) {
3097 struct kvm_mmu_page *child;
3098 child = page_header(ent & PT64_BASE_ADDR_MASK);
3099 __mmu_spte_walk(kvm, child, fn);
3101 fn(kvm, sp, &sp->spt[i]);
3106 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3109 struct kvm_mmu_page *sp;
3111 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3113 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3114 hpa_t root = vcpu->arch.mmu.root_hpa;
3115 sp = page_header(root);
3116 __mmu_spte_walk(vcpu->kvm, sp, fn);
3119 for (i = 0; i < 4; ++i) {
3120 hpa_t root = vcpu->arch.mmu.pae_root[i];
3122 if (root && VALID_PAGE(root)) {
3123 root &= PT64_BASE_ADDR_MASK;
3124 sp = page_header(root);
3125 __mmu_spte_walk(vcpu->kvm, sp, fn);
3131 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3132 gva_t va, int level)
3134 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3136 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3138 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3141 if (ent == shadow_trap_nonpresent_pte)
3144 va = canonicalize(va);
3145 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3146 audit_mappings_page(vcpu, ent, va, level - 1);
3148 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
3149 gfn_t gfn = gpa >> PAGE_SHIFT;
3150 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3151 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3153 if (is_error_pfn(pfn)) {
3154 kvm_release_pfn_clean(pfn);
3158 if (is_shadow_present_pte(ent)
3159 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3160 printk(KERN_ERR "xx audit error: (%s) levels %d"
3161 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3162 audit_msg, vcpu->arch.mmu.root_level,
3164 is_shadow_present_pte(ent));
3165 else if (ent == shadow_notrap_nonpresent_pte
3166 && !is_error_hpa(hpa))
3167 printk(KERN_ERR "audit: (%s) notrap shadow,"
3168 " valid guest gva %lx\n", audit_msg, va);
3169 kvm_release_pfn_clean(pfn);
3175 static void audit_mappings(struct kvm_vcpu *vcpu)
3179 if (vcpu->arch.mmu.root_level == 4)
3180 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3182 for (i = 0; i < 4; ++i)
3183 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3184 audit_mappings_page(vcpu,
3185 vcpu->arch.mmu.pae_root[i],
3190 static int count_rmaps(struct kvm_vcpu *vcpu)
3195 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3196 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
3197 struct kvm_rmap_desc *d;
3199 for (j = 0; j < m->npages; ++j) {
3200 unsigned long *rmapp = &m->rmap[j];
3204 if (!(*rmapp & 1)) {
3208 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3210 for (k = 0; k < RMAP_EXT; ++k)
3222 void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep)
3224 unsigned long *rmapp;
3225 struct kvm_mmu_page *rev_sp;
3228 if (*sptep & PT_WRITABLE_MASK) {
3229 rev_sp = page_header(__pa(sptep));
3230 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3232 if (!gfn_to_memslot(kvm, gfn)) {
3233 if (!printk_ratelimit())
3235 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3237 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3238 audit_msg, sptep - rev_sp->spt,
3244 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3245 is_large_pte(*sptep));
3247 if (!printk_ratelimit())
3249 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3257 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3259 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3262 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3264 struct kvm_mmu_page *sp;
3267 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3270 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3273 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3276 if (!(ent & PT_PRESENT_MASK))
3278 if (!(ent & PT_WRITABLE_MASK))
3280 inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]);
3286 static void audit_rmap(struct kvm_vcpu *vcpu)
3288 check_writable_mappings_rmap(vcpu);
3292 static void audit_write_protection(struct kvm_vcpu *vcpu)
3294 struct kvm_mmu_page *sp;
3295 struct kvm_memory_slot *slot;
3296 unsigned long *rmapp;
3300 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3301 if (sp->role.direct)
3306 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3307 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3308 rmapp = &slot->rmap[gfn - slot->base_gfn];
3310 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3312 if (*spte & PT_WRITABLE_MASK)
3313 printk(KERN_ERR "%s: (%s) shadow page has "
3314 "writable mappings: gfn %lx role %x\n",
3315 __func__, audit_msg, sp->gfn,
3317 spte = rmap_next(vcpu->kvm, rmapp, spte);
3322 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3329 audit_write_protection(vcpu);
3330 if (strcmp("pre pte write", audit_msg) != 0)
3331 audit_mappings(vcpu);
3332 audit_writable_sptes_have_rmaps(vcpu);