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   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * MMU support
   8  *
   9  * Copyright (C) 2006 Qumranet, Inc.
  10  *
  11  * Authors:
  12  *   Yaniv Kamay  <yaniv@qumranet.com>
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *
  15  * This work is licensed under the terms of the GNU GPL, version 2.  See
  16  * the COPYING file in the top-level directory.
  17  *
  18  */
  19
  20 #include "mmu.h"
  21 #include "x86.h"
  22 #include "kvm_cache_regs.h"
  23
  24 #include <linux/kvm_host.h>
  25 #include <linux/types.h>
  26 #include <linux/string.h>
  27 #include <linux/mm.h>
  28 #include <linux/highmem.h>
  29 #include <linux/module.h>
  30 #include <linux/swap.h>
  31 #include <linux/hugetlb.h>
  32 #include <linux/compiler.h>
  33 #include <linux/srcu.h>
  34 #include <linux/slab.h>
  35
  36 #include <asm/page.h>
  37 #include <asm/cmpxchg.h>
  38 #include <asm/io.h>
  39 #include <asm/vmx.h>
  40
  41 /*
  42  * When setting this variable to true it enables Two-Dimensional-Paging
  43  * where the hardware walks 2 page tables:
  44  * 1. the guest-virtual to guest-physical
  45  * 2. while doing 1. it walks guest-physical to host-physical
  46  * If the hardware supports that we don't need to do shadow paging.
  47  */
  48 bool tdp_enabled = false;
  49
  50 #undef MMU_DEBUG
  51
  52 #undef AUDIT
  53
  54 #ifdef AUDIT
  55 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  56 #else
  57 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  58 #endif
  59
  60 #ifdef MMU_DEBUG
  61
  62 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  63 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  64
  65 #else
  66
  67 #define pgprintk(x...) do { } while (0)
  68 #define rmap_printk(x...) do { } while (0)
  69
  70 #endif
  71
  72 #if defined(MMU_DEBUG) || defined(AUDIT)
  73 static int dbg = 0;
  74 module_param(dbg, bool, 0644);
  75 #endif
  76
  77 static int oos_shadow = 1;
  78 module_param(oos_shadow, bool, 0644);
  79
  80 #ifndef MMU_DEBUG
  81 #define ASSERT(x) do { } while (0)
  82 #else
  83 #define ASSERT(x)                                                       \
  84         if (!(x)) {                                                     \
  85                 printk(KERN_WARNING "assertion failed %s:%d: %s\n",     \
  86                        __FILE__, __LINE__, #x);                         \
  87         }
  88 #endif
  89
  90 #define PT_FIRST_AVAIL_BITS_SHIFT 9
  91 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  92
  93 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  94
  95 #define PT64_LEVEL_BITS 9
  96
  97 #define PT64_LEVEL_SHIFT(level) \
  98                 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
  99
 100 #define PT64_LEVEL_MASK(level) \
 101                 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
 102
 103 #define PT64_INDEX(address, level)\
 104         (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
 105
 106
 107 #define PT32_LEVEL_BITS 10
 108
 109 #define PT32_LEVEL_SHIFT(level) \
 110                 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
 111
 112 #define PT32_LEVEL_MASK(level) \
 113                 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
 114 #define PT32_LVL_OFFSET_MASK(level) \
 115         (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
 116                                                 * PT32_LEVEL_BITS))) - 1))
 117
 118 #define PT32_INDEX(address, level)\
 119         (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
 120
 121
 122 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
 123 #define PT64_DIR_BASE_ADDR_MASK \
 124         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
 125 #define PT64_LVL_ADDR_MASK(level) \
 126         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
 127                                                 * PT64_LEVEL_BITS))) - 1))
 128 #define PT64_LVL_OFFSET_MASK(level) \
 129         (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
 130                                                 * PT64_LEVEL_BITS))) - 1))
 131
 132 #define PT32_BASE_ADDR_MASK PAGE_MASK
 133 #define PT32_DIR_BASE_ADDR_MASK \
 134         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
 135 #define PT32_LVL_ADDR_MASK(level) \
 136         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
 137                                             * PT32_LEVEL_BITS))) - 1))
 138
 139 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
 140                         | PT64_NX_MASK)
 141
 142 #define RMAP_EXT 4
 143
 144 #define ACC_EXEC_MASK    1
 145 #define ACC_WRITE_MASK   PT_WRITABLE_MASK
 146 #define ACC_USER_MASK    PT_USER_MASK
 147 #define ACC_ALL          (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
 148
 149 #include <trace/events/kvm.h>
 150
 151 #define CREATE_TRACE_POINTS
 152 #include "mmutrace.h"
 153
 154 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
 155
 156 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
 157
 158 struct kvm_rmap_desc {
 159         u64 *sptes[RMAP_EXT];
 160         struct kvm_rmap_desc *more;
 161 };
 162
 163 struct kvm_shadow_walk_iterator {
 164         u64 addr;
 165         hpa_t shadow_addr;
 166         int level;
 167         u64 *sptep;
 168         unsigned index;
 169 };
 170
 171 #define for_each_shadow_entry(_vcpu, _addr, _walker)    \
 172         for (shadow_walk_init(&(_walker), _vcpu, _addr);        \
 173              shadow_walk_okay(&(_walker));                      \
 174              shadow_walk_next(&(_walker)))
 175
 176
 177 struct kvm_unsync_walk {
 178         int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
 179 };
 180
 181 typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
 182
 183 static struct kmem_cache *pte_chain_cache;
 184 static struct kmem_cache *rmap_desc_cache;
 185 static struct kmem_cache *mmu_page_header_cache;
 186
 187 static u64 __read_mostly shadow_trap_nonpresent_pte;
 188 static u64 __read_mostly shadow_notrap_nonpresent_pte;
 189 static u64 __read_mostly shadow_base_present_pte;
 190 static u64 __read_mostly shadow_nx_mask;
 191 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
 192 static u64 __read_mostly shadow_user_mask;
 193 static u64 __read_mostly shadow_accessed_mask;
 194 static u64 __read_mostly shadow_dirty_mask;
 195
 196 static inline u64 rsvd_bits(int s, int e)
 197 {
 198         return ((1ULL << (e - s + 1)) - 1) << s;
 199 }
 200
 201 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
 202 {
 203         shadow_trap_nonpresent_pte = trap_pte;
 204         shadow_notrap_nonpresent_pte = notrap_pte;
 205 }
 206 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
 207
 208 void kvm_mmu_set_base_ptes(u64 base_pte)
 209 {
 210         shadow_base_present_pte = base_pte;
 211 }
 212 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
 213
 214 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
 215                 u64 dirty_mask, u64 nx_mask, u64 x_mask)
 216 {
 217         shadow_user_mask = user_mask;
 218         shadow_accessed_mask = accessed_mask;
 219         shadow_dirty_mask = dirty_mask;
 220         shadow_nx_mask = nx_mask;
 221         shadow_x_mask = x_mask;
 222 }
 223 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
 224
 225 static int is_write_protection(struct kvm_vcpu *vcpu)
 226 {
 227         return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
 228 }
 229
 230 static int is_cpuid_PSE36(void)
 231 {
 232         return 1;
 233 }
 234
 235 static int is_nx(struct kvm_vcpu *vcpu)
 236 {
 237         return vcpu->arch.efer & EFER_NX;
 238 }
 239
 240 static int is_shadow_present_pte(u64 pte)
 241 {
 242         return pte != shadow_trap_nonpresent_pte
 243                 && pte != shadow_notrap_nonpresent_pte;
 244 }
 245
 246 static int is_large_pte(u64 pte)
 247 {
 248         return pte & PT_PAGE_SIZE_MASK;
 249 }
 250
 251 static int is_writable_pte(unsigned long pte)
 252 {
 253         return pte & PT_WRITABLE_MASK;
 254 }
 255
 256 static int is_dirty_gpte(unsigned long pte)
 257 {
 258         return pte & PT_DIRTY_MASK;
 259 }
 260
 261 static int is_rmap_spte(u64 pte)
 262 {
 263         return is_shadow_present_pte(pte);
 264 }
 265
 266 static int is_last_spte(u64 pte, int level)
 267 {
 268         if (level == PT_PAGE_TABLE_LEVEL)
 269                 return 1;
 270         if (is_large_pte(pte))
 271                 return 1;
 272         return 0;
 273 }
 274
 275 static pfn_t spte_to_pfn(u64 pte)
 276 {
 277         return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
 278 }
 279
 280 static gfn_t pse36_gfn_delta(u32 gpte)
 281 {
 282         int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
 283
 284         return (gpte & PT32_DIR_PSE36_MASK) << shift;
 285 }
 286
 287 static void __set_spte(u64 *sptep, u64 spte)
 288 {
 289 #ifdef CONFIG_X86_64
 290         set_64bit((unsigned long *)sptep, spte);
 291 #else
 292         set_64bit((unsigned long long *)sptep, spte);
 293 #endif
 294 }
 295
 296 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
 297                                   struct kmem_cache *base_cache, int min)
 298 {
 299         void *obj;
 300
 301         if (cache->nobjs >= min)
 302                 return 0;
 303         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
 304                 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
 305                 if (!obj)
 306                         return -ENOMEM;
 307                 cache->objects[cache->nobjs++] = obj;
 308         }
 309         return 0;
 310 }
 311
 312 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
 313 {
 314         while (mc->nobjs)
 315                 kfree(mc->objects[--mc->nobjs]);
 316 }
 317
 318 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
 319                                        int min)
 320 {
 321         struct page *page;
 322
 323         if (cache->nobjs >= min)
 324                 return 0;
 325         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
 326                 page = alloc_page(GFP_KERNEL);
 327                 if (!page)
 328                         return -ENOMEM;
 329                 set_page_private(page, 0);
 330                 cache->objects[cache->nobjs++] = page_address(page);
 331         }
 332         return 0;
 333 }
 334
 335 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
 336 {
 337         while (mc->nobjs)
 338                 free_page((unsigned long)mc->objects[--mc->nobjs]);
 339 }
 340
 341 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
 342 {
 343         int r;
 344
 345         r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
 346                                    pte_chain_cache, 4);
 347         if (r)
 348                 goto out;
 349         r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
 350                                    rmap_desc_cache, 4);
 351         if (r)
 352                 goto out;
 353         r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
 354         if (r)
 355                 goto out;
 356         r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
 357                                    mmu_page_header_cache, 4);
 358 out:
 359         return r;
 360 }
 361
 362 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
 363 {
 364         mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
 365         mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
 366         mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
 367         mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
 368 }
 369
 370 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
 371                                     size_t size)
 372 {
 373         void *p;
 374
 375         BUG_ON(!mc->nobjs);
 376         p = mc->objects[--mc->nobjs];
 377         return p;
 378 }
 379
 380 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
 381 {
 382         return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
 383                                       sizeof(struct kvm_pte_chain));
 384 }
 385
 386 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
 387 {
 388         kfree(pc);
 389 }
 390
 391 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
 392 {
 393         return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
 394                                       sizeof(struct kvm_rmap_desc));
 395 }
 396
 397 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
 398 {
 399         kfree(rd);
 400 }
 401
 402 /*
 403  * Return the pointer to the largepage write count for a given
 404  * gfn, handling slots that are not large page aligned.
 405  */
 406 static int *slot_largepage_idx(gfn_t gfn,
 407                                struct kvm_memory_slot *slot,
 408                                int level)
 409 {
 410         unsigned long idx;
 411
 412         idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
 413               (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
 414         return &slot->lpage_info[level - 2][idx].write_count;
 415 }
 416
 417 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
 418 {
 419         struct kvm_memory_slot *slot;
 420         int *write_count;
 421         int i;
 422
 423         gfn = unalias_gfn(kvm, gfn);
 424
 425         slot = gfn_to_memslot_unaliased(kvm, gfn);
 426         for (i = PT_DIRECTORY_LEVEL;
 427              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
 428                 write_count   = slot_largepage_idx(gfn, slot, i);
 429                 *write_count += 1;
 430         }
 431 }
 432
 433 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
 434 {
 435         struct kvm_memory_slot *slot;
 436         int *write_count;
 437         int i;
 438
 439         gfn = unalias_gfn(kvm, gfn);
 440         for (i = PT_DIRECTORY_LEVEL;
 441              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
 442                 slot          = gfn_to_memslot_unaliased(kvm, gfn);
 443                 write_count   = slot_largepage_idx(gfn, slot, i);
 444                 *write_count -= 1;
 445                 WARN_ON(*write_count < 0);
 446         }
 447 }
 448
 449 static int has_wrprotected_page(struct kvm *kvm,
 450                                 gfn_t gfn,
 451                                 int level)
 452 {
 453         struct kvm_memory_slot *slot;
 454         int *largepage_idx;
 455
 456         gfn = unalias_gfn(kvm, gfn);
 457         slot = gfn_to_memslot_unaliased(kvm, gfn);
 458         if (slot) {
 459                 largepage_idx = slot_largepage_idx(gfn, slot, level);
 460                 return *largepage_idx;
 461         }
 462
 463         return 1;
 464 }
 465
 466 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
 467 {
 468         unsigned long page_size;
 469         int i, ret = 0;
 470
 471         page_size = kvm_host_page_size(kvm, gfn);
 472
 473         for (i = PT_PAGE_TABLE_LEVEL;
 474              i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
 475                 if (page_size >= KVM_HPAGE_SIZE(i))
 476                         ret = i;
 477                 else
 478                         break;
 479         }
 480
 481         return ret;
 482 }
 483
 484 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
 485 {
 486         struct kvm_memory_slot *slot;
 487         int host_level, level, max_level;
 488
 489         slot = gfn_to_memslot(vcpu->kvm, large_gfn);
 490         if (slot && slot->dirty_bitmap)
 491                 return PT_PAGE_TABLE_LEVEL;
 492
 493         host_level = host_mapping_level(vcpu->kvm, large_gfn);
 494
 495         if (host_level == PT_PAGE_TABLE_LEVEL)
 496                 return host_level;
 497
 498         max_level = kvm_x86_ops->get_lpage_level() < host_level ?
 499                 kvm_x86_ops->get_lpage_level() : host_level;
 500
 501         for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
 502                 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
 503                         break;
 504
 505         return level - 1;
 506 }
 507
 508 /*
 509  * Take gfn and return the reverse mapping to it.
 510  * Note: gfn must be unaliased before this function get called
 511  */
 512
 513 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
 514 {
 515         struct kvm_memory_slot *slot;
 516         unsigned long idx;
 517
 518         slot = gfn_to_memslot(kvm, gfn);
 519         if (likely(level == PT_PAGE_TABLE_LEVEL))
 520                 return &slot->rmap[gfn - slot->base_gfn];
 521
 522         idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
 523                 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
 524
 525         return &slot->lpage_info[level - 2][idx].rmap_pde;
 526 }
 527
 528 /*
 529  * Reverse mapping data structures:
 530  *
 531  * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
 532  * that points to page_address(page).
 533  *
 534  * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
 535  * containing more mappings.
 536  *
 537  * Returns the number of rmap entries before the spte was added or zero if
 538  * the spte was not added.
 539  *
 540  */
 541 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
 542 {
 543         struct kvm_mmu_page *sp;
 544         struct kvm_rmap_desc *desc;
 545         unsigned long *rmapp;
 546         int i, count = 0;
 547
 548         if (!is_rmap_spte(*spte))
 549                 return count;
 550         gfn = unalias_gfn(vcpu->kvm, gfn);
 551         sp = page_header(__pa(spte));
 552         sp->gfns[spte - sp->spt] = gfn;
 553         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
 554         if (!*rmapp) {
 555                 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
 556                 *rmapp = (unsigned long)spte;
 557         } else if (!(*rmapp & 1)) {
 558                 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
 559                 desc = mmu_alloc_rmap_desc(vcpu);
 560                 desc->sptes[0] = (u64 *)*rmapp;
 561                 desc->sptes[1] = spte;
 562                 *rmapp = (unsigned long)desc | 1;
 563         } else {
 564                 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
 565                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
 566                 while (desc->sptes[RMAP_EXT-1] && desc->more) {
 567                         desc = desc->more;
 568                         count += RMAP_EXT;
 569                 }
 570                 if (desc->sptes[RMAP_EXT-1]) {
 571                         desc->more = mmu_alloc_rmap_desc(vcpu);
 572                         desc = desc->more;
 573                 }
 574                 for (i = 0; desc->sptes[i]; ++i)
 575                         ;
 576                 desc->sptes[i] = spte;
 577         }
 578         return count;
 579 }
 580
 581 static void rmap_desc_remove_entry(unsigned long *rmapp,
 582                                    struct kvm_rmap_desc *desc,
 583                                    int i,
 584                                    struct kvm_rmap_desc *prev_desc)
 585 {
 586         int j;
 587
 588         for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
 589                 ;
 590         desc->sptes[i] = desc->sptes[j];
 591         desc->sptes[j] = NULL;
 592         if (j != 0)
 593                 return;
 594         if (!prev_desc && !desc->more)
 595                 *rmapp = (unsigned long)desc->sptes[0];
 596         else
 597                 if (prev_desc)
 598                         prev_desc->more = desc->more;
 599                 else
 600                         *rmapp = (unsigned long)desc->more | 1;
 601         mmu_free_rmap_desc(desc);
 602 }
 603
 604 static void rmap_remove(struct kvm *kvm, u64 *spte)
 605 {
 606         struct kvm_rmap_desc *desc;
 607         struct kvm_rmap_desc *prev_desc;
 608         struct kvm_mmu_page *sp;
 609         pfn_t pfn;
 610         unsigned long *rmapp;
 611         int i;
 612
 613         if (!is_rmap_spte(*spte))
 614                 return;
 615         sp = page_header(__pa(spte));
 616         pfn = spte_to_pfn(*spte);
 617         if (*spte & shadow_accessed_mask)
 618                 kvm_set_pfn_accessed(pfn);
 619         if (is_writable_pte(*spte))
 620                 kvm_set_pfn_dirty(pfn);
 621         rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
 622         if (!*rmapp) {
 623                 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
 624                 BUG();
 625         } else if (!(*rmapp & 1)) {
 626                 rmap_printk("rmap_remove:  %p %llx 1->0\n", spte, *spte);
 627                 if ((u64 *)*rmapp != spte) {
 628                         printk(KERN_ERR "rmap_remove:  %p %llx 1->BUG\n",
 629                                spte, *spte);
 630                         BUG();
 631                 }
 632                 *rmapp = 0;
 633         } else {
 634                 rmap_printk("rmap_remove:  %p %llx many->many\n", spte, *spte);
 635                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
 636                 prev_desc = NULL;
 637                 while (desc) {
 638                         for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
 639                                 if (desc->sptes[i] == spte) {
 640                                         rmap_desc_remove_entry(rmapp,
 641                                                                desc, i,
 642                                                                prev_desc);
 643                                         return;
 644                                 }
 645                         prev_desc = desc;
 646                         desc = desc->more;
 647                 }
 648                 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
 649                 BUG();
 650         }
 651 }
 652
 653 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
 654 {
 655         struct kvm_rmap_desc *desc;
 656         struct kvm_rmap_desc *prev_desc;
 657         u64 *prev_spte;
 658         int i;
 659
 660         if (!*rmapp)
 661                 return NULL;
 662         else if (!(*rmapp & 1)) {
 663                 if (!spte)
 664                         return (u64 *)*rmapp;
 665                 return NULL;
 666         }
 667         desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
 668         prev_desc = NULL;
 669         prev_spte = NULL;
 670         while (desc) {
 671                 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
 672                         if (prev_spte == spte)
 673                                 return desc->sptes[i];
 674                         prev_spte = desc->sptes[i];
 675                 }
 676                 desc = desc->more;
 677         }
 678         return NULL;
 679 }
 680
 681 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
 682 {
 683         unsigned long *rmapp;
 684         u64 *spte;
 685         int i, write_protected = 0;
 686
 687         gfn = unalias_gfn(kvm, gfn);
 688         rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
 689
 690         spte = rmap_next(kvm, rmapp, NULL);
 691         while (spte) {
 692                 BUG_ON(!spte);
 693                 BUG_ON(!(*spte & PT_PRESENT_MASK));
 694                 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
 695                 if (is_writable_pte(*spte)) {
 696                         __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
 697                         write_protected = 1;
 698                 }
 699                 spte = rmap_next(kvm, rmapp, spte);
 700         }
 701         if (write_protected) {
 702                 pfn_t pfn;
 703
 704                 spte = rmap_next(kvm, rmapp, NULL);
 705                 pfn = spte_to_pfn(*spte);
 706                 kvm_set_pfn_dirty(pfn);
 707         }
 708
 709         /* check for huge page mappings */
 710         for (i = PT_DIRECTORY_LEVEL;
 711              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
 712                 rmapp = gfn_to_rmap(kvm, gfn, i);
 713                 spte = rmap_next(kvm, rmapp, NULL);
 714                 while (spte) {
 715                         BUG_ON(!spte);
 716                         BUG_ON(!(*spte & PT_PRESENT_MASK));
 717                         BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
 718                         pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
 719                         if (is_writable_pte(*spte)) {
 720                                 rmap_remove(kvm, spte);
 721                                 --kvm->stat.lpages;
 722                                 __set_spte(spte, shadow_trap_nonpresent_pte);
 723                                 spte = NULL;
 724                                 write_protected = 1;
 725                         }
 726                         spte = rmap_next(kvm, rmapp, spte);
 727                 }
 728         }
 729
 730         return write_protected;
 731 }
 732
 733 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
 734                            unsigned long data)
 735 {
 736         u64 *spte;
 737         int need_tlb_flush = 0;
 738
 739         while ((spte = rmap_next(kvm, rmapp, NULL))) {
 740                 BUG_ON(!(*spte & PT_PRESENT_MASK));
 741                 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
 742                 rmap_remove(kvm, spte);
 743                 __set_spte(spte, shadow_trap_nonpresent_pte);
 744                 need_tlb_flush = 1;
 745         }
 746         return need_tlb_flush;
 747 }
 748
 749 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
 750                              unsigned long data)
 751 {
 752         int need_flush = 0;
 753         u64 *spte, new_spte;
 754         pte_t *ptep = (pte_t *)data;
 755         pfn_t new_pfn;
 756
 757         WARN_ON(pte_huge(*ptep));
 758         new_pfn = pte_pfn(*ptep);
 759         spte = rmap_next(kvm, rmapp, NULL);
 760         while (spte) {
 761                 BUG_ON(!is_shadow_present_pte(*spte));
 762                 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
 763                 need_flush = 1;
 764                 if (pte_write(*ptep)) {
 765                         rmap_remove(kvm, spte);
 766                         __set_spte(spte, shadow_trap_nonpresent_pte);
 767                         spte = rmap_next(kvm, rmapp, NULL);
 768                 } else {
 769                         new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
 770                         new_spte |= (u64)new_pfn << PAGE_SHIFT;
 771
 772                         new_spte &= ~PT_WRITABLE_MASK;
 773                         new_spte &= ~SPTE_HOST_WRITEABLE;
 774                         if (is_writable_pte(*spte))
 775                                 kvm_set_pfn_dirty(spte_to_pfn(*spte));
 776                         __set_spte(spte, new_spte);
 777                         spte = rmap_next(kvm, rmapp, spte);
 778                 }
 779         }
 780         if (need_flush)
 781                 kvm_flush_remote_tlbs(kvm);
 782
 783         return 0;
 784 }
 785
 786 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
 787                           unsigned long data,
 788                           int (*handler)(struct kvm *kvm, unsigned long *rmapp,
 789                                          unsigned long data))
 790 {
 791         int i, j;
 792         int ret;
 793         int retval = 0;
 794         struct kvm_memslots *slots;
 795
 796         slots = rcu_dereference(kvm->memslots);
 797
 798         for (i = 0; i < slots->nmemslots; i++) {
 799                 struct kvm_memory_slot *memslot = &slots->memslots[i];
 800                 unsigned long start = memslot->userspace_addr;
 801                 unsigned long end;
 802
 803                 end = start + (memslot->npages << PAGE_SHIFT);
 804                 if (hva >= start && hva < end) {
 805                         gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
 806
 807                         ret = handler(kvm, &memslot->rmap[gfn_offset], data);
 808
 809                         for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
 810                                 int idx = gfn_offset;
 811                                 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
 812                                 ret |= handler(kvm,
 813                                         &memslot->lpage_info[j][idx].rmap_pde,
 814                                         data);
 815                         }
 816                         trace_kvm_age_page(hva, memslot, ret);
 817                         retval |= ret;
 818                 }
 819         }
 820
 821         return retval;
 822 }
 823
 824 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
 825 {
 826         return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
 827 }
 828
 829 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
 830 {
 831         kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
 832 }
 833
 834 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
 835                          unsigned long data)
 836 {
 837         u64 *spte;
 838         int young = 0;
 839
 840         /*
 841          * Emulate the accessed bit for EPT, by checking if this page has
 842          * an EPT mapping, and clearing it if it does. On the next access,
 843          * a new EPT mapping will be established.
 844          * This has some overhead, but not as much as the cost of swapping
 845          * out actively used pages or breaking up actively used hugepages.
 846          */
 847         if (!shadow_accessed_mask)
 848                 return kvm_unmap_rmapp(kvm, rmapp, data);
 849
 850         spte = rmap_next(kvm, rmapp, NULL);
 851         while (spte) {
 852                 int _young;
 853                 u64 _spte = *spte;
 854                 BUG_ON(!(_spte & PT_PRESENT_MASK));
 855                 _young = _spte & PT_ACCESSED_MASK;
 856                 if (_young) {
 857                         young = 1;
 858                         clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
 859                 }
 860                 spte = rmap_next(kvm, rmapp, spte);
 861         }
 862         return young;
 863 }
 864
 865 #define RMAP_RECYCLE_THRESHOLD 1000
 866
 867 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
 868 {
 869         unsigned long *rmapp;
 870         struct kvm_mmu_page *sp;
 871
 872         sp = page_header(__pa(spte));
 873
 874         gfn = unalias_gfn(vcpu->kvm, gfn);
 875         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
 876
 877         kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
 878         kvm_flush_remote_tlbs(vcpu->kvm);
 879 }
 880
 881 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
 882 {
 883         return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
 884 }
 885
 886 #ifdef MMU_DEBUG
 887 static int is_empty_shadow_page(u64 *spt)
 888 {
 889         u64 *pos;
 890         u64 *end;
 891
 892         for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
 893                 if (is_shadow_present_pte(*pos)) {
 894                         printk(KERN_ERR "%s: %p %llx\n", __func__,
 895                                pos, *pos);
 896                         return 0;
 897                 }
 898         return 1;
 899 }
 900 #endif
 901
 902 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
 903 {
 904         ASSERT(is_empty_shadow_page(sp->spt));
 905         list_del(&sp->link);
 906         __free_page(virt_to_page(sp->spt));
 907         __free_page(virt_to_page(sp->gfns));
 908         kfree(sp);
 909         ++kvm->arch.n_free_mmu_pages;
 910 }
 911
 912 static unsigned kvm_page_table_hashfn(gfn_t gfn)
 913 {
 914         return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
 915 }
 916
 917 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
 918                                                u64 *parent_pte)
 919 {
 920         struct kvm_mmu_page *sp;
 921
 922         sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
 923         sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
 924         sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
 925         set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
 926         list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
 927         INIT_LIST_HEAD(&sp->oos_link);
 928         bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
 929         sp->multimapped = 0;
 930         sp->parent_pte = parent_pte;
 931         --vcpu->kvm->arch.n_free_mmu_pages;
 932         return sp;
 933 }
 934
 935 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
 936                                     struct kvm_mmu_page *sp, u64 *parent_pte)
 937 {
 938         struct kvm_pte_chain *pte_chain;
 939         struct hlist_node *node;
 940         int i;
 941
 942         if (!parent_pte)
 943                 return;
 944         if (!sp->multimapped) {
 945                 u64 *old = sp->parent_pte;
 946
 947                 if (!old) {
 948                         sp->parent_pte = parent_pte;
 949                         return;
 950                 }
 951                 sp->multimapped = 1;
 952                 pte_chain = mmu_alloc_pte_chain(vcpu);
 953                 INIT_HLIST_HEAD(&sp->parent_ptes);
 954                 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
 955                 pte_chain->parent_ptes[0] = old;
 956         }
 957         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
 958                 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
 959                         continue;
 960                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
 961                         if (!pte_chain->parent_ptes[i]) {
 962                                 pte_chain->parent_ptes[i] = parent_pte;
 963                                 return;
 964                         }
 965         }
 966         pte_chain = mmu_alloc_pte_chain(vcpu);
 967         BUG_ON(!pte_chain);
 968         hlist_add_head(&pte_chain->link, &sp->parent_ptes);
 969         pte_chain->parent_ptes[0] = parent_pte;
 970 }
 971
 972 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
 973                                        u64 *parent_pte)
 974 {
 975         struct kvm_pte_chain *pte_chain;
 976         struct hlist_node *node;
 977         int i;
 978
 979         if (!sp->multimapped) {
 980                 BUG_ON(sp->parent_pte != parent_pte);
 981                 sp->parent_pte = NULL;
 982                 return;
 983         }
 984         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
 985                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
 986                         if (!pte_chain->parent_ptes[i])
 987                                 break;
 988                         if (pte_chain->parent_ptes[i] != parent_pte)
 989                                 continue;
 990                         while (i + 1 < NR_PTE_CHAIN_ENTRIES
 991                                 && pte_chain->parent_ptes[i + 1]) {
 992                                 pte_chain->parent_ptes[i]
 993                                         = pte_chain->parent_ptes[i + 1];
 994                                 ++i;
 995                         }
 996                         pte_chain->parent_ptes[i] = NULL;
 997                         if (i == 0) {
 998                                 hlist_del(&pte_chain->link);
 999                                 mmu_free_pte_chain(pte_chain);
1000                                 if (hlist_empty(&sp->parent_ptes)) {
1001                                         sp->multimapped = 0;
1002                                         sp->parent_pte = NULL;
1003                                 }
1004                         }
1005                         return;
1006                 }
1007         BUG();
1008 }
1009
1010
1011 static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1012                             mmu_parent_walk_fn fn)
1013 {
1014         struct kvm_pte_chain *pte_chain;
1015         struct hlist_node *node;
1016         struct kvm_mmu_page *parent_sp;
1017         int i;
1018
1019         if (!sp->multimapped && sp->parent_pte) {
1020                 parent_sp = page_header(__pa(sp->parent_pte));
1021                 fn(vcpu, parent_sp);
1022                 mmu_parent_walk(vcpu, parent_sp, fn);
1023                 return;
1024         }
1025         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1026                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1027                         if (!pte_chain->parent_ptes[i])
1028                                 break;
1029                         parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1030                         fn(vcpu, parent_sp);
1031                         mmu_parent_walk(vcpu, parent_sp, fn);
1032                 }
1033 }
1034
1035 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1036 {
1037         unsigned int index;
1038         struct kvm_mmu_page *sp = page_header(__pa(spte));
1039
1040         index = spte - sp->spt;
1041         if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1042                 sp->unsync_children++;
1043         WARN_ON(!sp->unsync_children);
1044 }
1045
1046 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1047 {
1048         struct kvm_pte_chain *pte_chain;
1049         struct hlist_node *node;
1050         int i;
1051
1052         if (!sp->parent_pte)
1053                 return;
1054
1055         if (!sp->multimapped) {
1056                 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1057                 return;
1058         }
1059
1060         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1061                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1062                         if (!pte_chain->parent_ptes[i])
1063                                 break;
1064                         kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1065                 }
1066 }
1067
1068 static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1069 {
1070         kvm_mmu_update_parents_unsync(sp);
1071         return 1;
1072 }
1073
1074 static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
1075                                         struct kvm_mmu_page *sp)
1076 {
1077         mmu_parent_walk(vcpu, sp, unsync_walk_fn);
1078         kvm_mmu_update_parents_unsync(sp);
1079 }
1080
1081 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1082                                     struct kvm_mmu_page *sp)
1083 {
1084         int i;
1085
1086         for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1087                 sp->spt[i] = shadow_trap_nonpresent_pte;
1088 }
1089
1090 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1091                                struct kvm_mmu_page *sp)
1092 {
1093         return 1;
1094 }
1095
1096 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1097 {
1098 }
1099
1100 #define KVM_PAGE_ARRAY_NR 16
1101
1102 struct kvm_mmu_pages {
1103         struct mmu_page_and_offset {
1104                 struct kvm_mmu_page *sp;
1105                 unsigned int idx;
1106         } page[KVM_PAGE_ARRAY_NR];
1107         unsigned int nr;
1108 };
1109
1110 #define for_each_unsync_children(bitmap, idx)           \
1111         for (idx = find_first_bit(bitmap, 512);         \
1112              idx < 512;                                 \
1113              idx = find_next_bit(bitmap, 512, idx+1))
1114
1115 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1116                          int idx)
1117 {
1118         int i;
1119
1120         if (sp->unsync)
1121                 for (i=0; i < pvec->nr; i++)
1122                         if (pvec->page[i].sp == sp)
1123                                 return 0;
1124
1125         pvec->page[pvec->nr].sp = sp;
1126         pvec->page[pvec->nr].idx = idx;
1127         pvec->nr++;
1128         return (pvec->nr == KVM_PAGE_ARRAY_NR);
1129 }
1130
1131 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1132                            struct kvm_mmu_pages *pvec)
1133 {
1134         int i, ret, nr_unsync_leaf = 0;
1135
1136         for_each_unsync_children(sp->unsync_child_bitmap, i) {
1137                 u64 ent = sp->spt[i];
1138
1139                 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1140                         struct kvm_mmu_page *child;
1141                         child = page_header(ent & PT64_BASE_ADDR_MASK);
1142
1143                         if (child->unsync_children) {
1144                                 if (mmu_pages_add(pvec, child, i))
1145                                         return -ENOSPC;
1146
1147                                 ret = __mmu_unsync_walk(child, pvec);
1148                                 if (!ret)
1149                                         __clear_bit(i, sp->unsync_child_bitmap);
1150                                 else if (ret > 0)
1151                                         nr_unsync_leaf += ret;
1152                                 else
1153                                         return ret;
1154                         }
1155
1156                         if (child->unsync) {
1157                                 nr_unsync_leaf++;
1158                                 if (mmu_pages_add(pvec, child, i))
1159                                         return -ENOSPC;
1160                         }
1161                 }
1162         }
1163
1164         if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1165                 sp->unsync_children = 0;
1166
1167         return nr_unsync_leaf;
1168 }
1169
1170 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1171                            struct kvm_mmu_pages *pvec)
1172 {
1173         if (!sp->unsync_children)
1174                 return 0;
1175
1176         mmu_pages_add(pvec, sp, 0);
1177         return __mmu_unsync_walk(sp, pvec);
1178 }
1179
1180 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1181 {
1182         unsigned index;
1183         struct hlist_head *bucket;
1184         struct kvm_mmu_page *sp;
1185         struct hlist_node *node;
1186
1187         pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1188         index = kvm_page_table_hashfn(gfn);
1189         bucket = &kvm->arch.mmu_page_hash[index];
1190         hlist_for_each_entry(sp, node, bucket, hash_link)
1191                 if (sp->gfn == gfn && !sp->role.direct
1192                     && !sp->role.invalid) {
1193                         pgprintk("%s: found role %x\n",
1194                                  __func__, sp->role.word);
1195                         return sp;
1196                 }
1197         return NULL;
1198 }
1199
1200 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1201 {
1202         WARN_ON(!sp->unsync);
1203         sp->unsync = 0;
1204         --kvm->stat.mmu_unsync;
1205 }
1206
1207 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1208
1209 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1210 {
1211         if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1212                 kvm_mmu_zap_page(vcpu->kvm, sp);
1213                 return 1;
1214         }
1215
1216         trace_kvm_mmu_sync_page(sp);
1217         if (rmap_write_protect(vcpu->kvm, sp->gfn))
1218                 kvm_flush_remote_tlbs(vcpu->kvm);
1219         kvm_unlink_unsync_page(vcpu->kvm, sp);
1220         if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1221                 kvm_mmu_zap_page(vcpu->kvm, sp);
1222                 return 1;
1223         }
1224
1225         kvm_mmu_flush_tlb(vcpu);
1226         return 0;
1227 }
1228
1229 struct mmu_page_path {
1230         struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1231         unsigned int idx[PT64_ROOT_LEVEL-1];
1232 };
1233
1234 #define for_each_sp(pvec, sp, parents, i)                       \
1235                 for (i = mmu_pages_next(&pvec, &parents, -1),   \
1236                         sp = pvec.page[i].sp;                   \
1237                         i < pvec.nr && ({ sp = pvec.page[i].sp; 1;});   \
1238                         i = mmu_pages_next(&pvec, &parents, i))
1239
1240 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1241                           struct mmu_page_path *parents,
1242                           int i)
1243 {
1244         int n;
1245
1246         for (n = i+1; n < pvec->nr; n++) {
1247                 struct kvm_mmu_page *sp = pvec->page[n].sp;
1248
1249                 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1250                         parents->idx[0] = pvec->page[n].idx;
1251                         return n;
1252                 }
1253
1254                 parents->parent[sp->role.level-2] = sp;
1255                 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1256         }
1257
1258         return n;
1259 }
1260
1261 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1262 {
1263         struct kvm_mmu_page *sp;
1264         unsigned int level = 0;
1265
1266         do {
1267                 unsigned int idx = parents->idx[level];
1268
1269                 sp = parents->parent[level];
1270                 if (!sp)
1271                         return;
1272
1273                 --sp->unsync_children;
1274                 WARN_ON((int)sp->unsync_children < 0);
1275                 __clear_bit(idx, sp->unsync_child_bitmap);
1276                 level++;
1277         } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1278 }
1279
1280 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1281                                struct mmu_page_path *parents,
1282                                struct kvm_mmu_pages *pvec)
1283 {
1284         parents->parent[parent->role.level-1] = NULL;
1285         pvec->nr = 0;
1286 }
1287
1288 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1289                               struct kvm_mmu_page *parent)
1290 {
1291         int i;
1292         struct kvm_mmu_page *sp;
1293         struct mmu_page_path parents;
1294         struct kvm_mmu_pages pages;
1295
1296         kvm_mmu_pages_init(parent, &parents, &pages);
1297         while (mmu_unsync_walk(parent, &pages)) {
1298                 int protected = 0;
1299
1300                 for_each_sp(pages, sp, parents, i)
1301                         protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1302
1303                 if (protected)
1304                         kvm_flush_remote_tlbs(vcpu->kvm);
1305
1306                 for_each_sp(pages, sp, parents, i) {
1307                         kvm_sync_page(vcpu, sp);
1308                         mmu_pages_clear_parents(&parents);
1309                 }
1310                 cond_resched_lock(&vcpu->kvm->mmu_lock);
1311                 kvm_mmu_pages_init(parent, &parents, &pages);
1312         }
1313 }
1314
1315 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1316                                              gfn_t gfn,
1317                                              gva_t gaddr,
1318                                              unsigned level,
1319                                              int direct,
1320                                              unsigned access,
1321                                              u64 *parent_pte)
1322 {
1323         union kvm_mmu_page_role role;
1324         unsigned index;
1325         unsigned quadrant;
1326         struct hlist_head *bucket;
1327         struct kvm_mmu_page *sp;
1328         struct hlist_node *node, *tmp;
1329
1330         role = vcpu->arch.mmu.base_role;
1331         role.level = level;
1332         role.direct = direct;
1333         role.access = access;
1334         if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1335                 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1336                 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1337                 role.quadrant = quadrant;
1338         }
1339         index = kvm_page_table_hashfn(gfn);
1340         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1341         hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1342                 if (sp->gfn == gfn) {
1343                         if (sp->unsync)
1344                                 if (kvm_sync_page(vcpu, sp))
1345                                         continue;
1346
1347                         if (sp->role.word != role.word)
1348                                 continue;
1349
1350                         mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1351                         if (sp->unsync_children) {
1352                                 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1353                                 kvm_mmu_mark_parents_unsync(vcpu, sp);
1354                         }
1355                         trace_kvm_mmu_get_page(sp, false);
1356                         return sp;
1357                 }
1358         ++vcpu->kvm->stat.mmu_cache_miss;
1359         sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1360         if (!sp)
1361                 return sp;
1362         sp->gfn = gfn;
1363         sp->role = role;
1364         hlist_add_head(&sp->hash_link, bucket);
1365         if (!direct) {
1366                 if (rmap_write_protect(vcpu->kvm, gfn))
1367                         kvm_flush_remote_tlbs(vcpu->kvm);
1368                 account_shadowed(vcpu->kvm, gfn);
1369         }
1370         if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1371                 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1372         else
1373                 nonpaging_prefetch_page(vcpu, sp);
1374         trace_kvm_mmu_get_page(sp, true);
1375         return sp;
1376 }
1377
1378 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1379                              struct kvm_vcpu *vcpu, u64 addr)
1380 {
1381         iterator->addr = addr;
1382         iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1383         iterator->level = vcpu->arch.mmu.shadow_root_level;
1384         if (iterator->level == PT32E_ROOT_LEVEL) {
1385                 iterator->shadow_addr
1386                         = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1387                 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1388                 --iterator->level;
1389                 if (!iterator->shadow_addr)
1390                         iterator->level = 0;
1391         }
1392 }
1393
1394 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1395 {
1396         if (iterator->level < PT_PAGE_TABLE_LEVEL)
1397                 return false;
1398
1399         if (iterator->level == PT_PAGE_TABLE_LEVEL)
1400                 if (is_large_pte(*iterator->sptep))
1401                         return false;
1402
1403         iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1404         iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1405         return true;
1406 }
1407
1408 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1409 {
1410         iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1411         --iterator->level;
1412 }
1413
1414 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1415                                          struct kvm_mmu_page *sp)
1416 {
1417         unsigned i;
1418         u64 *pt;
1419         u64 ent;
1420
1421         pt = sp->spt;
1422
1423         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1424                 ent = pt[i];
1425
1426                 if (is_shadow_present_pte(ent)) {
1427                         if (!is_last_spte(ent, sp->role.level)) {
1428                                 ent &= PT64_BASE_ADDR_MASK;
1429                                 mmu_page_remove_parent_pte(page_header(ent),
1430                                                            &pt[i]);
1431                         } else {
1432                                 if (is_large_pte(ent))
1433                                         --kvm->stat.lpages;
1434                                 rmap_remove(kvm, &pt[i]);
1435                         }
1436                 }
1437                 pt[i] = shadow_trap_nonpresent_pte;
1438         }
1439 }
1440
1441 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1442 {
1443         mmu_page_remove_parent_pte(sp, parent_pte);
1444 }
1445
1446 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1447 {
1448         int i;
1449         struct kvm_vcpu *vcpu;
1450
1451         kvm_for_each_vcpu(i, vcpu, kvm)
1452                 vcpu->arch.last_pte_updated = NULL;
1453 }
1454
1455 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1456 {
1457         u64 *parent_pte;
1458
1459         while (sp->multimapped || sp->parent_pte) {
1460                 if (!sp->multimapped)
1461                         parent_pte = sp->parent_pte;
1462                 else {
1463                         struct kvm_pte_chain *chain;
1464
1465                         chain = container_of(sp->parent_ptes.first,
1466                                              struct kvm_pte_chain, link);
1467                         parent_pte = chain->parent_ptes[0];
1468                 }
1469                 BUG_ON(!parent_pte);
1470                 kvm_mmu_put_page(sp, parent_pte);
1471                 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1472         }
1473 }
1474
1475 static int mmu_zap_unsync_children(struct kvm *kvm,
1476                                    struct kvm_mmu_page *parent)
1477 {
1478         int i, zapped = 0;
1479         struct mmu_page_path parents;
1480         struct kvm_mmu_pages pages;
1481
1482         if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1483                 return 0;
1484
1485         kvm_mmu_pages_init(parent, &parents, &pages);
1486         while (mmu_unsync_walk(parent, &pages)) {
1487                 struct kvm_mmu_page *sp;
1488
1489                 for_each_sp(pages, sp, parents, i) {
1490                         kvm_mmu_zap_page(kvm, sp);
1491                         mmu_pages_clear_parents(&parents);
1492                         zapped++;
1493                 }
1494                 kvm_mmu_pages_init(parent, &parents, &pages);
1495         }
1496
1497         return zapped;
1498 }
1499
1500 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1501 {
1502         int ret;
1503
1504         trace_kvm_mmu_zap_page(sp);
1505         ++kvm->stat.mmu_shadow_zapped;
1506         ret = mmu_zap_unsync_children(kvm, sp);
1507         kvm_mmu_page_unlink_children(kvm, sp);
1508         kvm_mmu_unlink_parents(kvm, sp);
1509         kvm_flush_remote_tlbs(kvm);
1510         if (!sp->role.invalid && !sp->role.direct)
1511                 unaccount_shadowed(kvm, sp->gfn);
1512         if (sp->unsync)
1513                 kvm_unlink_unsync_page(kvm, sp);
1514         if (!sp->root_count) {
1515                 hlist_del(&sp->hash_link);
1516                 kvm_mmu_free_page(kvm, sp);
1517         } else {
1518                 sp->role.invalid = 1;
1519                 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1520                 kvm_reload_remote_mmus(kvm);
1521         }
1522         kvm_mmu_reset_last_pte_updated(kvm);
1523         return ret;
1524 }
1525
1526 /*
1527  * Changing the number of mmu pages allocated to the vm
1528  * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1529  */
1530 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1531 {
1532         int used_pages;
1533
1534         used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1535         used_pages = max(0, used_pages);
1536
1537         /*
1538          * If we set the number of mmu pages to be smaller be than the
1539          * number of actived pages , we must to free some mmu pages before we
1540          * change the value
1541          */
1542
1543         if (used_pages > kvm_nr_mmu_pages) {
1544                 while (used_pages > kvm_nr_mmu_pages &&
1545                         !list_empty(&kvm->arch.active_mmu_pages)) {
1546                         struct kvm_mmu_page *page;
1547
1548                         page = container_of(kvm->arch.active_mmu_pages.prev,
1549                                             struct kvm_mmu_page, link);
1550                         used_pages -= kvm_mmu_zap_page(kvm, page);
1551                         used_pages--;
1552                 }
1553                 kvm_nr_mmu_pages = used_pages;
1554                 kvm->arch.n_free_mmu_pages = 0;
1555         }
1556         else
1557                 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1558                                          - kvm->arch.n_alloc_mmu_pages;
1559
1560         kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1561 }
1562
1563 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1564 {
1565         unsigned index;
1566         struct hlist_head *bucket;
1567         struct kvm_mmu_page *sp;
1568         struct hlist_node *node, *n;
1569         int r;
1570
1571         pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1572         r = 0;
1573         index = kvm_page_table_hashfn(gfn);
1574         bucket = &kvm->arch.mmu_page_hash[index];
1575         hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1576                 if (sp->gfn == gfn && !sp->role.direct) {
1577                         pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1578                                  sp->role.word);
1579                         r = 1;
1580                         if (kvm_mmu_zap_page(kvm, sp))
1581                                 n = bucket->first;
1582                 }
1583         return r;
1584 }
1585
1586 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1587 {
1588         unsigned index;
1589         struct hlist_head *bucket;
1590         struct kvm_mmu_page *sp;
1591         struct hlist_node *node, *nn;
1592
1593         index = kvm_page_table_hashfn(gfn);
1594         bucket = &kvm->arch.mmu_page_hash[index];
1595         hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1596                 if (sp->gfn == gfn && !sp->role.direct
1597                     && !sp->role.invalid) {
1598                         pgprintk("%s: zap %lx %x\n",
1599                                  __func__, gfn, sp->role.word);
1600                         if (kvm_mmu_zap_page(kvm, sp))
1601                                 nn = bucket->first;
1602                 }
1603         }
1604 }
1605
1606 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1607 {
1608         int slot = memslot_id(kvm, gfn);
1609         struct kvm_mmu_page *sp = page_header(__pa(pte));
1610
1611         __set_bit(slot, sp->slot_bitmap);
1612 }
1613
1614 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1615 {
1616         int i;
1617         u64 *pt = sp->spt;
1618
1619         if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1620                 return;
1621
1622         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1623                 if (pt[i] == shadow_notrap_nonpresent_pte)
1624                         __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1625         }
1626 }
1627
1628 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1629 {
1630         struct page *page;
1631
1632         gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
1633
1634         if (gpa == UNMAPPED_GVA)
1635                 return NULL;
1636
1637         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1638
1639         return page;
1640 }
1641
1642 /*
1643  * The function is based on mtrr_type_lookup() in
1644  * arch/x86/kernel/cpu/mtrr/generic.c
1645  */
1646 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1647                          u64 start, u64 end)
1648 {
1649         int i;
1650         u64 base, mask;
1651         u8 prev_match, curr_match;
1652         int num_var_ranges = KVM_NR_VAR_MTRR;
1653
1654         if (!mtrr_state->enabled)
1655                 return 0xFF;
1656
1657         /* Make end inclusive end, instead of exclusive */
1658         end--;
1659
1660         /* Look in fixed ranges. Just return the type as per start */
1661         if (mtrr_state->have_fixed && (start < 0x100000)) {
1662                 int idx;
1663
1664                 if (start < 0x80000) {
1665                         idx = 0;
1666                         idx += (start >> 16);
1667                         return mtrr_state->fixed_ranges[idx];
1668                 } else if (start < 0xC0000) {
1669                         idx = 1 * 8;
1670                         idx += ((start - 0x80000) >> 14);
1671                         return mtrr_state->fixed_ranges[idx];
1672                 } else if (start < 0x1000000) {
1673                         idx = 3 * 8;
1674                         idx += ((start - 0xC0000) >> 12);
1675                         return mtrr_state->fixed_ranges[idx];
1676                 }
1677         }
1678
1679         /*
1680          * Look in variable ranges
1681          * Look of multiple ranges matching this address and pick type
1682          * as per MTRR precedence
1683          */
1684         if (!(mtrr_state->enabled & 2))
1685                 return mtrr_state->def_type;
1686
1687         prev_match = 0xFF;
1688         for (i = 0; i < num_var_ranges; ++i) {
1689                 unsigned short start_state, end_state;
1690
1691                 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1692                         continue;
1693
1694                 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1695                        (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1696                 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1697                        (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1698
1699                 start_state = ((start & mask) == (base & mask));
1700                 end_state = ((end & mask) == (base & mask));
1701                 if (start_state != end_state)
1702                         return 0xFE;
1703
1704                 if ((start & mask) != (base & mask))
1705                         continue;
1706
1707                 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1708                 if (prev_match == 0xFF) {
1709                         prev_match = curr_match;
1710                         continue;
1711                 }
1712
1713                 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1714                     curr_match == MTRR_TYPE_UNCACHABLE)
1715                         return MTRR_TYPE_UNCACHABLE;
1716
1717                 if ((prev_match == MTRR_TYPE_WRBACK &&
1718                      curr_match == MTRR_TYPE_WRTHROUGH) ||
1719                     (prev_match == MTRR_TYPE_WRTHROUGH &&
1720                      curr_match == MTRR_TYPE_WRBACK)) {
1721                         prev_match = MTRR_TYPE_WRTHROUGH;
1722                         curr_match = MTRR_TYPE_WRTHROUGH;
1723                 }
1724
1725                 if (prev_match != curr_match)
1726                         return MTRR_TYPE_UNCACHABLE;
1727         }
1728
1729         if (prev_match != 0xFF)
1730                 return prev_match;
1731
1732         return mtrr_state->def_type;
1733 }
1734
1735 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1736 {
1737         u8 mtrr;
1738
1739         mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1740                              (gfn << PAGE_SHIFT) + PAGE_SIZE);
1741         if (mtrr == 0xfe || mtrr == 0xff)
1742                 mtrr = MTRR_TYPE_WRBACK;
1743         return mtrr;
1744 }
1745 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1746
1747 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1748 {
1749         unsigned index;
1750         struct hlist_head *bucket;
1751         struct kvm_mmu_page *s;
1752         struct hlist_node *node, *n;
1753
1754         trace_kvm_mmu_unsync_page(sp);
1755         index = kvm_page_table_hashfn(sp->gfn);
1756         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1757         /* don't unsync if pagetable is shadowed with multiple roles */
1758         hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1759                 if (s->gfn != sp->gfn || s->role.direct)
1760                         continue;
1761                 if (s->role.word != sp->role.word)
1762                         return 1;
1763         }
1764         ++vcpu->kvm->stat.mmu_unsync;
1765         sp->unsync = 1;
1766
1767         kvm_mmu_mark_parents_unsync(vcpu, sp);
1768
1769         mmu_convert_notrap(sp);
1770         return 0;
1771 }
1772
1773 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1774                                   bool can_unsync)
1775 {
1776         struct kvm_mmu_page *shadow;
1777
1778         shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1779         if (shadow) {
1780                 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1781                         return 1;
1782                 if (shadow->unsync)
1783                         return 0;
1784                 if (can_unsync && oos_shadow)
1785                         return kvm_unsync_page(vcpu, shadow);
1786                 return 1;
1787         }
1788         return 0;
1789 }
1790
1791 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1792                     unsigned pte_access, int user_fault,
1793                     int write_fault, int dirty, int level,
1794                     gfn_t gfn, pfn_t pfn, bool speculative,
1795                     bool can_unsync, bool reset_host_protection)
1796 {
1797         u64 spte;
1798         int ret = 0;
1799
1800         /*
1801          * We don't set the accessed bit, since we sometimes want to see
1802          * whether the guest actually used the pte (in order to detect
1803          * demand paging).
1804          */
1805         spte = shadow_base_present_pte | shadow_dirty_mask;
1806         if (!speculative)
1807                 spte |= shadow_accessed_mask;
1808         if (!dirty)
1809                 pte_access &= ~ACC_WRITE_MASK;
1810         if (pte_access & ACC_EXEC_MASK)
1811                 spte |= shadow_x_mask;
1812         else
1813                 spte |= shadow_nx_mask;
1814         if (pte_access & ACC_USER_MASK)
1815                 spte |= shadow_user_mask;
1816         if (level > PT_PAGE_TABLE_LEVEL)
1817                 spte |= PT_PAGE_SIZE_MASK;
1818         if (tdp_enabled)
1819                 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1820                         kvm_is_mmio_pfn(pfn));
1821
1822         if (reset_host_protection)
1823                 spte |= SPTE_HOST_WRITEABLE;
1824
1825         spte |= (u64)pfn << PAGE_SHIFT;
1826
1827         if ((pte_access & ACC_WRITE_MASK)
1828             || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1829
1830                 if (level > PT_PAGE_TABLE_LEVEL &&
1831                     has_wrprotected_page(vcpu->kvm, gfn, level)) {
1832                         ret = 1;
1833                         spte = shadow_trap_nonpresent_pte;
1834                         goto set_pte;
1835                 }
1836
1837                 spte |= PT_WRITABLE_MASK;
1838
1839                 /*
1840                  * Optimization: for pte sync, if spte was writable the hash
1841                  * lookup is unnecessary (and expensive). Write protection
1842                  * is responsibility of mmu_get_page / kvm_sync_page.
1843                  * Same reasoning can be applied to dirty page accounting.
1844                  */
1845                 if (!can_unsync && is_writable_pte(*sptep))
1846                         goto set_pte;
1847
1848                 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1849                         pgprintk("%s: found shadow page for %lx, marking ro\n",
1850                                  __func__, gfn);
1851                         ret = 1;
1852                         pte_access &= ~ACC_WRITE_MASK;
1853                         if (is_writable_pte(spte))
1854                                 spte &= ~PT_WRITABLE_MASK;
1855                 }
1856         }
1857
1858         if (pte_access & ACC_WRITE_MASK)
1859                 mark_page_dirty(vcpu->kvm, gfn);
1860
1861 set_pte:
1862         __set_spte(sptep, spte);
1863         return ret;
1864 }
1865
1866 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1867                          unsigned pt_access, unsigned pte_access,
1868                          int user_fault, int write_fault, int dirty,
1869                          int *ptwrite, int level, gfn_t gfn,
1870                          pfn_t pfn, bool speculative,
1871                          bool reset_host_protection)
1872 {
1873         int was_rmapped = 0;
1874         int was_writable = is_writable_pte(*sptep);
1875         int rmap_count;
1876
1877         pgprintk("%s: spte %llx access %x write_fault %d"
1878                  " user_fault %d gfn %lx\n",
1879                  __func__, *sptep, pt_access,
1880                  write_fault, user_fault, gfn);
1881
1882         if (is_rmap_spte(*sptep)) {
1883                 /*
1884                  * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1885                  * the parent of the now unreachable PTE.
1886                  */
1887                 if (level > PT_PAGE_TABLE_LEVEL &&
1888                     !is_large_pte(*sptep)) {
1889                         struct kvm_mmu_page *child;
1890                         u64 pte = *sptep;
1891
1892                         child = page_header(pte & PT64_BASE_ADDR_MASK);
1893                         mmu_page_remove_parent_pte(child, sptep);
1894                 } else if (pfn != spte_to_pfn(*sptep)) {
1895                         pgprintk("hfn old %lx new %lx\n",
1896                                  spte_to_pfn(*sptep), pfn);
1897                         rmap_remove(vcpu->kvm, sptep);
1898                 } else
1899                         was_rmapped = 1;
1900         }
1901
1902         if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1903                       dirty, level, gfn, pfn, speculative, true,
1904                       reset_host_protection)) {
1905                 if (write_fault)
1906                         *ptwrite = 1;
1907                 kvm_x86_ops->tlb_flush(vcpu);
1908         }
1909
1910         pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1911         pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1912                  is_large_pte(*sptep)? "2MB" : "4kB",
1913                  *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1914                  *sptep, sptep);
1915         if (!was_rmapped && is_large_pte(*sptep))
1916                 ++vcpu->kvm->stat.lpages;
1917
1918         page_header_update_slot(vcpu->kvm, sptep, gfn);
1919         if (!was_rmapped) {
1920                 rmap_count = rmap_add(vcpu, sptep, gfn);
1921                 kvm_release_pfn_clean(pfn);
1922                 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1923                         rmap_recycle(vcpu, sptep, gfn);
1924         } else {
1925                 if (was_writable)
1926                         kvm_release_pfn_dirty(pfn);
1927                 else
1928                         kvm_release_pfn_clean(pfn);
1929         }
1930         if (speculative) {
1931                 vcpu->arch.last_pte_updated = sptep;
1932                 vcpu->arch.last_pte_gfn = gfn;
1933         }
1934 }
1935
1936 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1937 {
1938 }
1939
1940 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1941                         int level, gfn_t gfn, pfn_t pfn)
1942 {
1943         struct kvm_shadow_walk_iterator iterator;
1944         struct kvm_mmu_page *sp;
1945         int pt_write = 0;
1946         gfn_t pseudo_gfn;
1947
1948         for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1949                 if (iterator.level == level) {
1950                         mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1951                                      0, write, 1, &pt_write,
1952                                      level, gfn, pfn, false, true);
1953                         ++vcpu->stat.pf_fixed;
1954                         break;
1955                 }
1956
1957                 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1958                         pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1959                         sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1960                                               iterator.level - 1,
1961                                               1, ACC_ALL, iterator.sptep);
1962                         if (!sp) {
1963                                 pgprintk("nonpaging_map: ENOMEM\n");
1964                                 kvm_release_pfn_clean(pfn);
1965                                 return -ENOMEM;
1966                         }
1967
1968                         __set_spte(iterator.sptep,
1969                                    __pa(sp->spt)
1970                                    | PT_PRESENT_MASK | PT_WRITABLE_MASK
1971                                    | shadow_user_mask | shadow_x_mask);
1972                 }
1973         }
1974         return pt_write;
1975 }
1976
1977 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1978 {
1979         int r;
1980         int level;
1981         pfn_t pfn;
1982         unsigned long mmu_seq;
1983
1984         level = mapping_level(vcpu, gfn);
1985
1986         /*
1987          * This path builds a PAE pagetable - so we can map 2mb pages at
1988          * maximum. Therefore check if the level is larger than that.
1989          */
1990         if (level > PT_DIRECTORY_LEVEL)
1991                 level = PT_DIRECTORY_LEVEL;
1992
1993         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
1994
1995         mmu_seq = vcpu->kvm->mmu_notifier_seq;
1996         smp_rmb();
1997         pfn = gfn_to_pfn(vcpu->kvm, gfn);
1998
1999         /* mmio */
2000         if (is_error_pfn(pfn)) {
2001                 kvm_release_pfn_clean(pfn);
2002                 return 1;
2003         }
2004
2005         spin_lock(&vcpu->kvm->mmu_lock);
2006         if (mmu_notifier_retry(vcpu, mmu_seq))
2007                 goto out_unlock;
2008         kvm_mmu_free_some_pages(vcpu);
2009         r = __direct_map(vcpu, v, write, level, gfn, pfn);
2010         spin_unlock(&vcpu->kvm->mmu_lock);
2011
2012
2013         return r;
2014
2015 out_unlock:
2016         spin_unlock(&vcpu->kvm->mmu_lock);
2017         kvm_release_pfn_clean(pfn);
2018         return 0;
2019 }
2020
2021
2022 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2023 {
2024         int i;
2025         struct kvm_mmu_page *sp;
2026
2027         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2028                 return;
2029         spin_lock(&vcpu->kvm->mmu_lock);
2030         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2031                 hpa_t root = vcpu->arch.mmu.root_hpa;
2032
2033                 sp = page_header(root);
2034                 --sp->root_count;
2035                 if (!sp->root_count && sp->role.invalid)
2036                         kvm_mmu_zap_page(vcpu->kvm, sp);
2037                 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2038                 spin_unlock(&vcpu->kvm->mmu_lock);
2039                 return;
2040         }
2041         for (i = 0; i < 4; ++i) {
2042                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2043
2044                 if (root) {
2045                         root &= PT64_BASE_ADDR_MASK;
2046                         sp = page_header(root);
2047                         --sp->root_count;
2048                         if (!sp->root_count && sp->role.invalid)
2049                                 kvm_mmu_zap_page(vcpu->kvm, sp);
2050                 }
2051                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2052         }
2053         spin_unlock(&vcpu->kvm->mmu_lock);
2054         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2055 }
2056
2057 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2058 {
2059         int ret = 0;
2060
2061         if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2062                 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2063                 ret = 1;
2064         }
2065
2066         return ret;
2067 }
2068
2069 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2070 {
2071         int i;
2072         gfn_t root_gfn;
2073         struct kvm_mmu_page *sp;
2074         int direct = 0;
2075         u64 pdptr;
2076
2077         root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2078
2079         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2080                 hpa_t root = vcpu->arch.mmu.root_hpa;
2081
2082                 ASSERT(!VALID_PAGE(root));
2083                 if (tdp_enabled)
2084                         direct = 1;
2085                 if (mmu_check_root(vcpu, root_gfn))
2086                         return 1;
2087                 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2088                                       PT64_ROOT_LEVEL, direct,
2089                                       ACC_ALL, NULL);
2090                 root = __pa(sp->spt);
2091                 ++sp->root_count;
2092                 vcpu->arch.mmu.root_hpa = root;
2093                 return 0;
2094         }
2095         direct = !is_paging(vcpu);
2096         if (tdp_enabled)
2097                 direct = 1;
2098         for (i = 0; i < 4; ++i) {
2099                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2100
2101                 ASSERT(!VALID_PAGE(root));
2102                 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2103                         pdptr = kvm_pdptr_read(vcpu, i);
2104                         if (!is_present_gpte(pdptr)) {
2105                                 vcpu->arch.mmu.pae_root[i] = 0;
2106                                 continue;
2107                         }
2108                         root_gfn = pdptr >> PAGE_SHIFT;
2109                 } else if (vcpu->arch.mmu.root_level == 0)
2110                         root_gfn = 0;
2111                 if (mmu_check_root(vcpu, root_gfn))
2112                         return 1;
2113                 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2114                                       PT32_ROOT_LEVEL, direct,
2115                                       ACC_ALL, NULL);
2116                 root = __pa(sp->spt);
2117                 ++sp->root_count;
2118                 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2119         }
2120         vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2121         return 0;
2122 }
2123
2124 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2125 {
2126         int i;
2127         struct kvm_mmu_page *sp;
2128
2129         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2130                 return;
2131         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2132                 hpa_t root = vcpu->arch.mmu.root_hpa;
2133                 sp = page_header(root);
2134                 mmu_sync_children(vcpu, sp);
2135                 return;
2136         }
2137         for (i = 0; i < 4; ++i) {
2138                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2139
2140                 if (root && VALID_PAGE(root)) {
2141                         root &= PT64_BASE_ADDR_MASK;
2142                         sp = page_header(root);
2143                         mmu_sync_children(vcpu, sp);
2144                 }
2145         }
2146 }
2147
2148 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2149 {
2150         spin_lock(&vcpu->kvm->mmu_lock);
2151         mmu_sync_roots(vcpu);
2152         spin_unlock(&vcpu->kvm->mmu_lock);
2153 }
2154
2155 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2156                                   u32 access, u32 *error)
2157 {
2158         if (error)
2159                 *error = 0;
2160         return vaddr;
2161 }
2162
2163 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2164                                 u32 error_code)
2165 {
2166         gfn_t gfn;
2167         int r;
2168
2169         pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2170         r = mmu_topup_memory_caches(vcpu);
2171         if (r)
2172                 return r;
2173
2174         ASSERT(vcpu);
2175         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2176
2177         gfn = gva >> PAGE_SHIFT;
2178
2179         return nonpaging_map(vcpu, gva & PAGE_MASK,
2180                              error_code & PFERR_WRITE_MASK, gfn);
2181 }
2182
2183 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2184                                 u32 error_code)
2185 {
2186         pfn_t pfn;
2187         int r;
2188         int level;
2189         gfn_t gfn = gpa >> PAGE_SHIFT;
2190         unsigned long mmu_seq;
2191
2192         ASSERT(vcpu);
2193         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2194
2195         r = mmu_topup_memory_caches(vcpu);
2196         if (r)
2197                 return r;
2198
2199         level = mapping_level(vcpu, gfn);
2200
2201         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2202
2203         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2204         smp_rmb();
2205         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2206         if (is_error_pfn(pfn)) {
2207                 kvm_release_pfn_clean(pfn);
2208                 return 1;
2209         }
2210         spin_lock(&vcpu->kvm->mmu_lock);
2211         if (mmu_notifier_retry(vcpu, mmu_seq))
2212                 goto out_unlock;
2213         kvm_mmu_free_some_pages(vcpu);
2214         r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2215                          level, gfn, pfn);
2216         spin_unlock(&vcpu->kvm->mmu_lock);
2217
2218         return r;
2219
2220 out_unlock:
2221         spin_unlock(&vcpu->kvm->mmu_lock);
2222         kvm_release_pfn_clean(pfn);
2223         return 0;
2224 }
2225
2226 static void nonpaging_free(struct kvm_vcpu *vcpu)
2227 {
2228         mmu_free_roots(vcpu);
2229 }
2230
2231 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2232 {
2233         struct kvm_mmu *context = &vcpu->arch.mmu;
2234
2235         context->new_cr3 = nonpaging_new_cr3;
2236         context->page_fault = nonpaging_page_fault;
2237         context->gva_to_gpa = nonpaging_gva_to_gpa;
2238         context->free = nonpaging_free;
2239         context->prefetch_page = nonpaging_prefetch_page;
2240         context->sync_page = nonpaging_sync_page;
2241         context->invlpg = nonpaging_invlpg;
2242         context->root_level = 0;
2243         context->shadow_root_level = PT32E_ROOT_LEVEL;
2244         context->root_hpa = INVALID_PAGE;
2245         return 0;
2246 }
2247
2248 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2249 {
2250         ++vcpu->stat.tlb_flush;
2251         kvm_x86_ops->tlb_flush(vcpu);
2252 }
2253
2254 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2255 {
2256         pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2257         mmu_free_roots(vcpu);
2258 }
2259
2260 static void inject_page_fault(struct kvm_vcpu *vcpu,
2261                               u64 addr,
2262                               u32 err_code)
2263 {
2264         kvm_inject_page_fault(vcpu, addr, err_code);
2265 }
2266
2267 static void paging_free(struct kvm_vcpu *vcpu)
2268 {
2269         nonpaging_free(vcpu);
2270 }
2271
2272 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2273 {
2274         int bit7;
2275
2276         bit7 = (gpte >> 7) & 1;
2277         return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2278 }
2279
2280 #define PTTYPE 64
2281 #include "paging_tmpl.h"
2282 #undef PTTYPE
2283
2284 #define PTTYPE 32
2285 #include "paging_tmpl.h"
2286 #undef PTTYPE
2287
2288 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2289 {
2290         struct kvm_mmu *context = &vcpu->arch.mmu;
2291         int maxphyaddr = cpuid_maxphyaddr(vcpu);
2292         u64 exb_bit_rsvd = 0;
2293
2294         if (!is_nx(vcpu))
2295                 exb_bit_rsvd = rsvd_bits(63, 63);
2296         switch (level) {
2297         case PT32_ROOT_LEVEL:
2298                 /* no rsvd bits for 2 level 4K page table entries */
2299                 context->rsvd_bits_mask[0][1] = 0;
2300                 context->rsvd_bits_mask[0][0] = 0;
2301                 if (is_cpuid_PSE36())
2302                         /* 36bits PSE 4MB page */
2303                         context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2304                 else
2305                         /* 32 bits PSE 4MB page */
2306                         context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2307                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2308                 break;
2309         case PT32E_ROOT_LEVEL:
2310                 context->rsvd_bits_mask[0][2] =
2311                         rsvd_bits(maxphyaddr, 63) |
2312                         rsvd_bits(7, 8) | rsvd_bits(1, 2);      /* PDPTE */
2313                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2314                         rsvd_bits(maxphyaddr, 62);      /* PDE */
2315                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2316                         rsvd_bits(maxphyaddr, 62);      /* PTE */
2317                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2318                         rsvd_bits(maxphyaddr, 62) |
2319                         rsvd_bits(13, 20);              /* large page */
2320                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2321                 break;
2322         case PT64_ROOT_LEVEL:
2323                 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2324                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2325                 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2326                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2327                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2328                         rsvd_bits(maxphyaddr, 51);
2329                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2330                         rsvd_bits(maxphyaddr, 51);
2331                 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2332                 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2333                         rsvd_bits(maxphyaddr, 51) |
2334                         rsvd_bits(13, 29);
2335                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2336                         rsvd_bits(maxphyaddr, 51) |
2337                         rsvd_bits(13, 20);              /* large page */
2338                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2339                 break;
2340         }
2341 }
2342
2343 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2344 {
2345         struct kvm_mmu *context = &vcpu->arch.mmu;
2346
2347         ASSERT(is_pae(vcpu));
2348         context->new_cr3 = paging_new_cr3;
2349         context->page_fault = paging64_page_fault;
2350         context->gva_to_gpa = paging64_gva_to_gpa;
2351         context->prefetch_page = paging64_prefetch_page;
2352         context->sync_page = paging64_sync_page;
2353         context->invlpg = paging64_invlpg;
2354         context->free = paging_free;
2355         context->root_level = level;
2356         context->shadow_root_level = level;
2357         context->root_hpa = INVALID_PAGE;
2358         return 0;
2359 }
2360
2361 static int paging64_init_context(struct kvm_vcpu *vcpu)
2362 {
2363         reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2364         return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2365 }
2366
2367 static int paging32_init_context(struct kvm_vcpu *vcpu)
2368 {
2369         struct kvm_mmu *context = &vcpu->arch.mmu;
2370
2371         reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2372         context->new_cr3 = paging_new_cr3;
2373         context->page_fault = paging32_page_fault;
2374         context->gva_to_gpa = paging32_gva_to_gpa;
2375         context->free = paging_free;
2376         context->prefetch_page = paging32_prefetch_page;
2377         context->sync_page = paging32_sync_page;
2378         context->invlpg = paging32_invlpg;
2379         context->root_level = PT32_ROOT_LEVEL;
2380         context->shadow_root_level = PT32E_ROOT_LEVEL;
2381         context->root_hpa = INVALID_PAGE;
2382         return 0;
2383 }
2384
2385 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2386 {
2387         reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2388         return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2389 }
2390
2391 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2392 {
2393         struct kvm_mmu *context = &vcpu->arch.mmu;
2394
2395         context->new_cr3 = nonpaging_new_cr3;
2396         context->page_fault = tdp_page_fault;
2397         context->free = nonpaging_free;
2398         context->prefetch_page = nonpaging_prefetch_page;
2399         context->sync_page = nonpaging_sync_page;
2400         context->invlpg = nonpaging_invlpg;
2401         context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2402         context->root_hpa = INVALID_PAGE;
2403
2404         if (!is_paging(vcpu)) {
2405                 context->gva_to_gpa = nonpaging_gva_to_gpa;
2406                 context->root_level = 0;
2407         } else if (is_long_mode(vcpu)) {
2408                 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2409                 context->gva_to_gpa = paging64_gva_to_gpa;
2410                 context->root_level = PT64_ROOT_LEVEL;
2411         } else if (is_pae(vcpu)) {
2412                 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2413                 context->gva_to_gpa = paging64_gva_to_gpa;
2414                 context->root_level = PT32E_ROOT_LEVEL;
2415         } else {
2416                 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2417                 context->gva_to_gpa = paging32_gva_to_gpa;
2418                 context->root_level = PT32_ROOT_LEVEL;
2419         }
2420
2421         return 0;
2422 }
2423
2424 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2425 {
2426         int r;
2427
2428         ASSERT(vcpu);
2429         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2430
2431         if (!is_paging(vcpu))
2432                 r = nonpaging_init_context(vcpu);
2433         else if (is_long_mode(vcpu))
2434                 r = paging64_init_context(vcpu);
2435         else if (is_pae(vcpu))
2436                 r = paging32E_init_context(vcpu);
2437         else
2438                 r = paging32_init_context(vcpu);
2439
2440         vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2441
2442         return r;
2443 }
2444
2445 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2446 {
2447         vcpu->arch.update_pte.pfn = bad_pfn;
2448
2449         if (tdp_enabled)
2450                 return init_kvm_tdp_mmu(vcpu);
2451         else
2452                 return init_kvm_softmmu(vcpu);
2453 }
2454
2455 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2456 {
2457         ASSERT(vcpu);
2458         if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2459                 vcpu->arch.mmu.free(vcpu);
2460                 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2461         }
2462 }
2463
2464 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2465 {
2466         destroy_kvm_mmu(vcpu);
2467         return init_kvm_mmu(vcpu);
2468 }
2469 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2470
2471 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2472 {
2473         int r;
2474
2475         r = mmu_topup_memory_caches(vcpu);
2476         if (r)
2477                 goto out;
2478         spin_lock(&vcpu->kvm->mmu_lock);
2479         kvm_mmu_free_some_pages(vcpu);
2480         r = mmu_alloc_roots(vcpu);
2481         mmu_sync_roots(vcpu);
2482         spin_unlock(&vcpu->kvm->mmu_lock);
2483         if (r)
2484                 goto out;
2485         /* set_cr3() should ensure TLB has been flushed */
2486         kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2487 out:
2488         return r;
2489 }
2490 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2491
2492 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2493 {
2494         mmu_free_roots(vcpu);
2495 }
2496
2497 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2498                                   struct kvm_mmu_page *sp,
2499                                   u64 *spte)
2500 {
2501         u64 pte;
2502         struct kvm_mmu_page *child;
2503
2504         pte = *spte;
2505         if (is_shadow_present_pte(pte)) {
2506                 if (is_last_spte(pte, sp->role.level))
2507                         rmap_remove(vcpu->kvm, spte);
2508                 else {
2509                         child = page_header(pte & PT64_BASE_ADDR_MASK);
2510                         mmu_page_remove_parent_pte(child, spte);
2511                 }
2512         }
2513         __set_spte(spte, shadow_trap_nonpresent_pte);
2514         if (is_large_pte(pte))
2515                 --vcpu->kvm->stat.lpages;
2516 }
2517
2518 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2519                                   struct kvm_mmu_page *sp,
2520                                   u64 *spte,
2521                                   const void *new)
2522 {
2523         if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2524                 ++vcpu->kvm->stat.mmu_pde_zapped;
2525                 return;
2526         }
2527
2528         ++vcpu->kvm->stat.mmu_pte_updated;
2529         if (sp->role.glevels == PT32_ROOT_LEVEL)
2530                 paging32_update_pte(vcpu, sp, spte, new);
2531         else
2532                 paging64_update_pte(vcpu, sp, spte, new);
2533 }
2534
2535 static bool need_remote_flush(u64 old, u64 new)
2536 {
2537         if (!is_shadow_present_pte(old))
2538                 return false;
2539         if (!is_shadow_present_pte(new))
2540                 return true;
2541         if ((old ^ new) & PT64_BASE_ADDR_MASK)
2542                 return true;
2543         old ^= PT64_NX_MASK;
2544         new ^= PT64_NX_MASK;
2545         return (old & ~new & PT64_PERM_MASK) != 0;
2546 }
2547
2548 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2549 {
2550         if (need_remote_flush(old, new))
2551                 kvm_flush_remote_tlbs(vcpu->kvm);
2552         else
2553                 kvm_mmu_flush_tlb(vcpu);
2554 }
2555
2556 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2557 {
2558         u64 *spte = vcpu->arch.last_pte_updated;
2559
2560         return !!(spte && (*spte & shadow_accessed_mask));
2561 }
2562
2563 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2564                                           const u8 *new, int bytes)
2565 {
2566         gfn_t gfn;
2567         int r;
2568         u64 gpte = 0;
2569         pfn_t pfn;
2570
2571         if (bytes != 4 && bytes != 8)
2572                 return;
2573
2574         /*
2575          * Assume that the pte write on a page table of the same type
2576          * as the current vcpu paging mode.  This is nearly always true
2577          * (might be false while changing modes).  Note it is verified later
2578          * by update_pte().
2579          */
2580         if (is_pae(vcpu)) {
2581                 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2582                 if ((bytes == 4) && (gpa % 4 == 0)) {
2583                         r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2584                         if (r)
2585                                 return;
2586                         memcpy((void *)&gpte + (gpa % 8), new, 4);
2587                 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2588                         memcpy((void *)&gpte, new, 8);
2589                 }
2590         } else {
2591                 if ((bytes == 4) && (gpa % 4 == 0))
2592                         memcpy((void *)&gpte, new, 4);
2593         }
2594         if (!is_present_gpte(gpte))
2595                 return;
2596         gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2597
2598         vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2599         smp_rmb();
2600         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2601
2602         if (is_error_pfn(pfn)) {
2603                 kvm_release_pfn_clean(pfn);
2604                 return;
2605         }
2606         vcpu->arch.update_pte.gfn = gfn;
2607         vcpu->arch.update_pte.pfn = pfn;
2608 }
2609
2610 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2611 {
2612         u64 *spte = vcpu->arch.last_pte_updated;
2613
2614         if (spte
2615             && vcpu->arch.last_pte_gfn == gfn
2616             && shadow_accessed_mask
2617             && !(*spte & shadow_accessed_mask)
2618             && is_shadow_present_pte(*spte))
2619                 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2620 }
2621
2622 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2623                        const u8 *new, int bytes,
2624                        bool guest_initiated)
2625 {
2626         gfn_t gfn = gpa >> PAGE_SHIFT;
2627         struct kvm_mmu_page *sp;
2628         struct hlist_node *node, *n;
2629         struct hlist_head *bucket;
2630         unsigned index;
2631         u64 entry, gentry;
2632         u64 *spte;
2633         unsigned offset = offset_in_page(gpa);
2634         unsigned pte_size;
2635         unsigned page_offset;
2636         unsigned misaligned;
2637         unsigned quadrant;
2638         int level;
2639         int flooded = 0;
2640         int npte;
2641         int r;
2642
2643         pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2644         mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
2645         spin_lock(&vcpu->kvm->mmu_lock);
2646         kvm_mmu_access_page(vcpu, gfn);
2647         kvm_mmu_free_some_pages(vcpu);
2648         ++vcpu->kvm->stat.mmu_pte_write;
2649         kvm_mmu_audit(vcpu, "pre pte write");
2650         if (guest_initiated) {
2651                 if (gfn == vcpu->arch.last_pt_write_gfn
2652                     && !last_updated_pte_accessed(vcpu)) {
2653                         ++vcpu->arch.last_pt_write_count;
2654                         if (vcpu->arch.last_pt_write_count >= 3)
2655                                 flooded = 1;
2656                 } else {
2657                         vcpu->arch.last_pt_write_gfn = gfn;
2658                         vcpu->arch.last_pt_write_count = 1;
2659                         vcpu->arch.last_pte_updated = NULL;
2660                 }
2661         }
2662         index = kvm_page_table_hashfn(gfn);
2663         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2664         hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2665                 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2666                         continue;
2667                 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
2668                 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2669                 misaligned |= bytes < 4;
2670                 if (misaligned || flooded) {
2671                         /*
2672                          * Misaligned accesses are too much trouble to fix
2673                          * up; also, they usually indicate a page is not used
2674                          * as a page table.
2675                          *
2676                          * If we're seeing too many writes to a page,
2677                          * it may no longer be a page table, or we may be
2678                          * forking, in which case it is better to unmap the
2679                          * page.
2680                          */
2681                         pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2682                                  gpa, bytes, sp->role.word);
2683                         if (kvm_mmu_zap_page(vcpu->kvm, sp))
2684                                 n = bucket->first;
2685                         ++vcpu->kvm->stat.mmu_flooded;
2686                         continue;
2687                 }
2688                 page_offset = offset;
2689                 level = sp->role.level;
2690                 npte = 1;
2691                 if (sp->role.glevels == PT32_ROOT_LEVEL) {
2692                         page_offset <<= 1;      /* 32->64 */
2693                         /*
2694                          * A 32-bit pde maps 4MB while the shadow pdes map
2695                          * only 2MB.  So we need to double the offset again
2696                          * and zap two pdes instead of one.
2697                          */
2698                         if (level == PT32_ROOT_LEVEL) {
2699                                 page_offset &= ~7; /* kill rounding error */
2700                                 page_offset <<= 1;
2701                                 npte = 2;
2702                         }
2703                         quadrant = page_offset >> PAGE_SHIFT;
2704                         page_offset &= ~PAGE_MASK;
2705                         if (quadrant != sp->role.quadrant)
2706                                 continue;
2707                 }
2708                 spte = &sp->spt[page_offset / sizeof(*spte)];
2709                 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2710                         gentry = 0;
2711                         r = kvm_read_guest_atomic(vcpu->kvm,
2712                                                   gpa & ~(u64)(pte_size - 1),
2713                                                   &gentry, pte_size);
2714                         new = (const void *)&gentry;
2715                         if (r < 0)
2716                                 new = NULL;
2717                 }
2718                 while (npte--) {
2719                         entry = *spte;
2720                         mmu_pte_write_zap_pte(vcpu, sp, spte);
2721                         if (new)
2722                                 mmu_pte_write_new_pte(vcpu, sp, spte, new);
2723                         mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2724                         ++spte;
2725                 }
2726         }
2727         kvm_mmu_audit(vcpu, "post pte write");
2728         spin_unlock(&vcpu->kvm->mmu_lock);
2729         if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2730                 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2731                 vcpu->arch.update_pte.pfn = bad_pfn;
2732         }
2733 }
2734
2735 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2736 {
2737         gpa_t gpa;
2738         int r;
2739
2740         if (tdp_enabled)
2741                 return 0;
2742
2743         gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2744
2745         spin_lock(&vcpu->kvm->mmu_lock);
2746         r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2747         spin_unlock(&vcpu->kvm->mmu_lock);
2748         return r;
2749 }
2750 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2751
2752 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2753 {
2754         while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2755                !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2756                 struct kvm_mmu_page *sp;
2757
2758                 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2759                                   struct kvm_mmu_page, link);
2760                 kvm_mmu_zap_page(vcpu->kvm, sp);
2761                 ++vcpu->kvm->stat.mmu_recycled;
2762         }
2763 }
2764
2765 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2766 {
2767         int r;
2768         enum emulation_result er;
2769
2770         r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2771         if (r < 0)
2772                 goto out;
2773
2774         if (!r) {
2775                 r = 1;
2776                 goto out;
2777         }
2778
2779         r = mmu_topup_memory_caches(vcpu);
2780         if (r)
2781                 goto out;
2782
2783         er = emulate_instruction(vcpu, cr2, error_code, 0);
2784
2785         switch (er) {
2786         case EMULATE_DONE:
2787                 return 1;
2788         case EMULATE_DO_MMIO:
2789                 ++vcpu->stat.mmio_exits;
2790                 return 0;
2791         case EMULATE_FAIL:
2792                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2793                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
2794                 vcpu->run->internal.ndata = 0;
2795                 return 0;
2796         default:
2797                 BUG();
2798         }
2799 out:
2800         return r;
2801 }
2802 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2803
2804 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2805 {
2806         vcpu->arch.mmu.invlpg(vcpu, gva);
2807         kvm_mmu_flush_tlb(vcpu);
2808         ++vcpu->stat.invlpg;
2809 }
2810 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2811
2812 void kvm_enable_tdp(void)
2813 {
2814         tdp_enabled = true;
2815 }
2816 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2817
2818 void kvm_disable_tdp(void)
2819 {
2820         tdp_enabled = false;
2821 }
2822 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2823
2824 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2825 {
2826         free_page((unsigned long)vcpu->arch.mmu.pae_root);
2827 }
2828
2829 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2830 {
2831         struct page *page;
2832         int i;
2833
2834         ASSERT(vcpu);
2835
2836         /*
2837          * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2838          * Therefore we need to allocate shadow page tables in the first
2839          * 4GB of memory, which happens to fit the DMA32 zone.
2840          */
2841         page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2842         if (!page)
2843                 return -ENOMEM;
2844
2845         vcpu->arch.mmu.pae_root = page_address(page);
2846         for (i = 0; i < 4; ++i)
2847                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2848
2849         return 0;
2850 }
2851
2852 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2853 {
2854         ASSERT(vcpu);
2855         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2856
2857         return alloc_mmu_pages(vcpu);
2858 }
2859
2860 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2861 {
2862         ASSERT(vcpu);
2863         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2864
2865         return init_kvm_mmu(vcpu);
2866 }
2867
2868 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2869 {
2870         ASSERT(vcpu);
2871
2872         destroy_kvm_mmu(vcpu);
2873         free_mmu_pages(vcpu);
2874         mmu_free_memory_caches(vcpu);
2875 }
2876
2877 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2878 {
2879         struct kvm_mmu_page *sp;
2880
2881         list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2882                 int i;
2883                 u64 *pt;
2884
2885                 if (!test_bit(slot, sp->slot_bitmap))
2886                         continue;
2887
2888                 pt = sp->spt;
2889                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2890                         /* avoid RMW */
2891                         if (pt[i] & PT_WRITABLE_MASK)
2892                                 pt[i] &= ~PT_WRITABLE_MASK;
2893         }
2894         kvm_flush_remote_tlbs(kvm);
2895 }
2896
2897 void kvm_mmu_zap_all(struct kvm *kvm)
2898 {
2899         struct kvm_mmu_page *sp, *node;
2900
2901         spin_lock(&kvm->mmu_lock);
2902         list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2903                 if (kvm_mmu_zap_page(kvm, sp))
2904                         node = container_of(kvm->arch.active_mmu_pages.next,
2905                                             struct kvm_mmu_page, link);
2906         spin_unlock(&kvm->mmu_lock);
2907
2908         kvm_flush_remote_tlbs(kvm);
2909 }
2910
2911 static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
2912 {
2913         struct kvm_mmu_page *page;
2914
2915         page = container_of(kvm->arch.active_mmu_pages.prev,
2916                             struct kvm_mmu_page, link);
2917         kvm_mmu_zap_page(kvm, page);
2918 }
2919
2920 static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2921 {
2922         struct kvm *kvm;
2923         struct kvm *kvm_freed = NULL;
2924         int cache_count = 0;
2925
2926         spin_lock(&kvm_lock);
2927
2928         list_for_each_entry(kvm, &vm_list, vm_list) {
2929                 int npages, idx;
2930
2931                 idx = srcu_read_lock(&kvm->srcu);
2932                 spin_lock(&kvm->mmu_lock);
2933                 npages = kvm->arch.n_alloc_mmu_pages -
2934                          kvm->arch.n_free_mmu_pages;
2935                 cache_count += npages;
2936                 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2937                         kvm_mmu_remove_one_alloc_mmu_page(kvm);
2938                         cache_count--;
2939                         kvm_freed = kvm;
2940                 }
2941                 nr_to_scan--;
2942
2943                 spin_unlock(&kvm->mmu_lock);
2944                 srcu_read_unlock(&kvm->srcu, idx);
2945         }
2946         if (kvm_freed)
2947                 list_move_tail(&kvm_freed->vm_list, &vm_list);
2948
2949         spin_unlock(&kvm_lock);
2950
2951         return cache_count;
2952 }
2953
2954 static struct shrinker mmu_shrinker = {
2955         .shrink = mmu_shrink,
2956         .seeks = DEFAULT_SEEKS * 10,
2957 };
2958
2959 static void mmu_destroy_caches(void)
2960 {
2961         if (pte_chain_cache)
2962                 kmem_cache_destroy(pte_chain_cache);
2963         if (rmap_desc_cache)
2964                 kmem_cache_destroy(rmap_desc_cache);
2965         if (mmu_page_header_cache)
2966                 kmem_cache_destroy(mmu_page_header_cache);
2967 }
2968
2969 void kvm_mmu_module_exit(void)
2970 {
2971         mmu_destroy_caches();
2972         unregister_shrinker(&mmu_shrinker);
2973 }
2974
2975 int kvm_mmu_module_init(void)
2976 {
2977         pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2978                                             sizeof(struct kvm_pte_chain),
2979                                             0, 0, NULL);
2980         if (!pte_chain_cache)
2981                 goto nomem;
2982         rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2983                                             sizeof(struct kvm_rmap_desc),
2984                                             0, 0, NULL);
2985         if (!rmap_desc_cache)
2986                 goto nomem;
2987
2988         mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2989                                                   sizeof(struct kvm_mmu_page),
2990                                                   0, 0, NULL);
2991         if (!mmu_page_header_cache)
2992                 goto nomem;
2993
2994         register_shrinker(&mmu_shrinker);
2995
2996         return 0;
2997
2998 nomem:
2999         mmu_destroy_caches();
3000         return -ENOMEM;
3001 }
3002
3003 /*
3004  * Caculate mmu pages needed for kvm.
3005  */
3006 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3007 {
3008         int i;
3009         unsigned int nr_mmu_pages;
3010         unsigned int  nr_pages = 0;
3011         struct kvm_memslots *slots;
3012
3013         slots = rcu_dereference(kvm->memslots);
3014         for (i = 0; i < slots->nmemslots; i++)
3015                 nr_pages += slots->memslots[i].npages;
3016
3017         nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3018         nr_mmu_pages = max(nr_mmu_pages,
3019                         (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3020
3021         return nr_mmu_pages;
3022 }
3023
3024 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3025                                 unsigned len)
3026 {
3027         if (len > buffer->len)
3028                 return NULL;
3029         return buffer->ptr;
3030 }
3031
3032 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3033                                 unsigned len)
3034 {
3035         void *ret;
3036
3037         ret = pv_mmu_peek_buffer(buffer, len);
3038         if (!ret)
3039                 return ret;
3040         buffer->ptr += len;
3041         buffer->len -= len;
3042         buffer->processed += len;
3043         return ret;
3044 }
3045
3046 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3047                              gpa_t addr, gpa_t value)
3048 {
3049         int bytes = 8;
3050         int r;
3051
3052         if (!is_long_mode(vcpu) && !is_pae(vcpu))
3053                 bytes = 4;
3054
3055         r = mmu_topup_memory_caches(vcpu);
3056         if (r)
3057                 return r;
3058
3059         if (!emulator_write_phys(vcpu, addr, &value, bytes))
3060                 return -EFAULT;
3061
3062         return 1;
3063 }
3064
3065 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3066 {
3067         kvm_set_cr3(vcpu, vcpu->arch.cr3);
3068         return 1;
3069 }
3070
3071 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3072 {
3073         spin_lock(&vcpu->kvm->mmu_lock);
3074         mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3075         spin_unlock(&vcpu->kvm->mmu_lock);
3076         return 1;
3077 }
3078
3079 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3080                              struct kvm_pv_mmu_op_buffer *buffer)
3081 {
3082         struct kvm_mmu_op_header *header;
3083
3084         header = pv_mmu_peek_buffer(buffer, sizeof *header);
3085         if (!header)
3086                 return 0;
3087         switch (header->op) {
3088         case KVM_MMU_OP_WRITE_PTE: {
3089                 struct kvm_mmu_op_write_pte *wpte;
3090
3091                 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3092                 if (!wpte)
3093                         return 0;
3094                 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3095                                         wpte->pte_val);
3096         }
3097         case KVM_MMU_OP_FLUSH_TLB: {
3098                 struct kvm_mmu_op_flush_tlb *ftlb;
3099
3100                 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3101                 if (!ftlb)
3102                         return 0;
3103                 return kvm_pv_mmu_flush_tlb(vcpu);
3104         }
3105         case KVM_MMU_OP_RELEASE_PT: {
3106                 struct kvm_mmu_op_release_pt *rpt;
3107
3108                 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3109                 if (!rpt)
3110                         return 0;
3111                 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3112         }
3113         default: return 0;
3114         }
3115 }
3116
3117 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3118                   gpa_t addr, unsigned long *ret)
3119 {
3120         int r;
3121         struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3122
3123         buffer->ptr = buffer->buf;
3124         buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3125         buffer->processed = 0;
3126
3127         r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3128         if (r)
3129                 goto out;
3130
3131         while (buffer->len) {
3132                 r = kvm_pv_mmu_op_one(vcpu, buffer);
3133                 if (r < 0)
3134                         goto out;
3135                 if (r == 0)
3136                         break;
3137         }
3138
3139         r = 1;
3140 out:
3141         *ret = buffer->processed;
3142         return r;
3143 }
3144
3145 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3146 {
3147         struct kvm_shadow_walk_iterator iterator;
3148         int nr_sptes = 0;
3149
3150         spin_lock(&vcpu->kvm->mmu_lock);
3151         for_each_shadow_entry(vcpu, addr, iterator) {
3152                 sptes[iterator.level-1] = *iterator.sptep;
3153                 nr_sptes++;
3154                 if (!is_shadow_present_pte(*iterator.sptep))
3155                         break;
3156         }
3157         spin_unlock(&vcpu->kvm->mmu_lock);
3158
3159         return nr_sptes;
3160 }
3161 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3162
3163 #ifdef AUDIT
3164
3165 static const char *audit_msg;
3166
3167 static gva_t canonicalize(gva_t gva)
3168 {
3169 #ifdef CONFIG_X86_64
3170         gva = (long long)(gva << 16) >> 16;
3171 #endif
3172         return gva;
3173 }
3174
3175
3176 typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp,
3177                                  u64 *sptep);
3178
3179 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3180                             inspect_spte_fn fn)
3181 {
3182         int i;
3183
3184         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3185                 u64 ent = sp->spt[i];
3186
3187                 if (is_shadow_present_pte(ent)) {
3188                         if (!is_last_spte(ent, sp->role.level)) {
3189                                 struct kvm_mmu_page *child;
3190                                 child = page_header(ent & PT64_BASE_ADDR_MASK);
3191                                 __mmu_spte_walk(kvm, child, fn);
3192                         } else
3193                                 fn(kvm, sp, &sp->spt[i]);
3194                 }
3195         }
3196 }
3197
3198 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3199 {
3200         int i;
3201         struct kvm_mmu_page *sp;
3202
3203         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3204                 return;
3205         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3206                 hpa_t root = vcpu->arch.mmu.root_hpa;
3207                 sp = page_header(root);
3208                 __mmu_spte_walk(vcpu->kvm, sp, fn);
3209                 return;
3210         }
3211         for (i = 0; i < 4; ++i) {
3212                 hpa_t root = vcpu->arch.mmu.pae_root[i];
3213
3214                 if (root && VALID_PAGE(root)) {
3215                         root &= PT64_BASE_ADDR_MASK;
3216                         sp = page_header(root);
3217                         __mmu_spte_walk(vcpu->kvm, sp, fn);
3218                 }
3219         }
3220         return;
3221 }
3222
3223 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3224                                 gva_t va, int level)
3225 {
3226         u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3227         int i;
3228         gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3229
3230         for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3231                 u64 ent = pt[i];
3232
3233                 if (ent == shadow_trap_nonpresent_pte)
3234                         continue;
3235
3236                 va = canonicalize(va);
3237                 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3238                         audit_mappings_page(vcpu, ent, va, level - 1);
3239                 else {
3240                         gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3241                         gfn_t gfn = gpa >> PAGE_SHIFT;
3242                         pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3243                         hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3244
3245                         if (is_error_pfn(pfn)) {
3246                                 kvm_release_pfn_clean(pfn);
3247                                 continue;
3248                         }
3249
3250                         if (is_shadow_present_pte(ent)
3251                             && (ent & PT64_BASE_ADDR_MASK) != hpa)
3252                                 printk(KERN_ERR "xx audit error: (%s) levels %d"
3253                                        " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3254                                        audit_msg, vcpu->arch.mmu.root_level,
3255                                        va, gpa, hpa, ent,
3256                                        is_shadow_present_pte(ent));
3257                         else if (ent == shadow_notrap_nonpresent_pte
3258                                  && !is_error_hpa(hpa))
3259                                 printk(KERN_ERR "audit: (%s) notrap shadow,"
3260                                        " valid guest gva %lx\n", audit_msg, va);
3261                         kvm_release_pfn_clean(pfn);
3262
3263                 }
3264         }
3265 }
3266
3267 static void audit_mappings(struct kvm_vcpu *vcpu)
3268 {
3269         unsigned i;
3270
3271         if (vcpu->arch.mmu.root_level == 4)
3272                 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3273         else
3274                 for (i = 0; i < 4; ++i)
3275                         if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3276                                 audit_mappings_page(vcpu,
3277                                                     vcpu->arch.mmu.pae_root[i],
3278                                                     i << 30,
3279                                                     2);
3280 }
3281
3282 static int count_rmaps(struct kvm_vcpu *vcpu)
3283 {
3284         int nmaps = 0;
3285         int i, j, k, idx;
3286
3287         idx = srcu_read_lock(&kvm->srcu);
3288         slots = rcu_dereference(kvm->memslots);
3289         for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3290                 struct kvm_memory_slot *m = &slots->memslots[i];
3291                 struct kvm_rmap_desc *d;
3292
3293                 for (j = 0; j < m->npages; ++j) {
3294                         unsigned long *rmapp = &m->rmap[j];
3295
3296                         if (!*rmapp)
3297                                 continue;
3298                         if (!(*rmapp & 1)) {
3299                                 ++nmaps;
3300                                 continue;
3301                         }
3302                         d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3303                         while (d) {
3304                                 for (k = 0; k < RMAP_EXT; ++k)
3305                                         if (d->sptes[k])
3306                                                 ++nmaps;
3307                                         else
3308                                                 break;
3309                                 d = d->more;
3310                         }
3311                 }
3312         }
3313         srcu_read_unlock(&kvm->srcu, idx);
3314         return nmaps;
3315 }
3316
3317 void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep)
3318 {
3319         unsigned long *rmapp;
3320         struct kvm_mmu_page *rev_sp;
3321         gfn_t gfn;
3322
3323         if (*sptep & PT_WRITABLE_MASK) {
3324                 rev_sp = page_header(__pa(sptep));
3325                 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3326
3327                 if (!gfn_to_memslot(kvm, gfn)) {
3328                         if (!printk_ratelimit())
3329                                 return;
3330                         printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3331                                          audit_msg, gfn);
3332                         printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3333                                         audit_msg, sptep - rev_sp->spt,
3334                                         rev_sp->gfn);
3335                         dump_stack();
3336                         return;
3337                 }
3338
3339                 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3340                                     is_large_pte(*sptep));
3341                 if (!*rmapp) {
3342                         if (!printk_ratelimit())
3343                                 return;
3344                         printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3345                                          audit_msg, *sptep);
3346                         dump_stack();
3347                 }
3348         }
3349
3350 }
3351
3352 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3353 {
3354         mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3355 }
3356
3357 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3358 {
3359         struct kvm_mmu_page *sp;
3360         int i;
3361
3362         list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3363                 u64 *pt = sp->spt;
3364
3365                 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3366                         continue;
3367
3368                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3369                         u64 ent = pt[i];
3370
3371                         if (!(ent & PT_PRESENT_MASK))
3372                                 continue;
3373                         if (!(ent & PT_WRITABLE_MASK))
3374                                 continue;
3375                         inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]);
3376                 }
3377         }
3378         return;
3379 }
3380
3381 static void audit_rmap(struct kvm_vcpu *vcpu)
3382 {
3383         check_writable_mappings_rmap(vcpu);
3384         count_rmaps(vcpu);
3385 }
3386
3387 static void audit_write_protection(struct kvm_vcpu *vcpu)
3388 {
3389         struct kvm_mmu_page *sp;
3390         struct kvm_memory_slot *slot;
3391         unsigned long *rmapp;
3392         u64 *spte;
3393         gfn_t gfn;
3394
3395         list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3396                 if (sp->role.direct)
3397                         continue;
3398                 if (sp->unsync)
3399                         continue;
3400
3401                 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3402                 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3403                 rmapp = &slot->rmap[gfn - slot->base_gfn];
3404
3405                 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3406                 while (spte) {
3407                         if (*spte & PT_WRITABLE_MASK)
3408                                 printk(KERN_ERR "%s: (%s) shadow page has "
3409                                 "writable mappings: gfn %lx role %x\n",
3410                                __func__, audit_msg, sp->gfn,
3411                                sp->role.word);
3412                         spte = rmap_next(vcpu->kvm, rmapp, spte);
3413                 }
3414         }
3415 }
3416
3417 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3418 {
3419         int olddbg = dbg;
3420
3421         dbg = 0;
3422         audit_msg = msg;
3423         audit_rmap(vcpu);
3424         audit_write_protection(vcpu);
3425         if (strcmp("pre pte write", audit_msg) != 0)
3426                 audit_mappings(vcpu);
3427         audit_writable_sptes_have_rmaps(vcpu);
3428         dbg = olddbg;
3429 }
3430
3431 #endif