KVM: x86 emulator: fix memory access during x86 emulation
[safe/jmp/linux-2.6] / arch / x86 / kvm / mmu.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * This module enables machines with Intel VT-x extensions to run virtual
5  * machines without emulation or binary translation.
6  *
7  * MMU support
8  *
9  * Copyright (C) 2006 Qumranet, Inc.
10  *
11  * Authors:
12  *   Yaniv Kamay  <yaniv@qumranet.com>
13  *   Avi Kivity   <avi@qumranet.com>
14  *
15  * This work is licensed under the terms of the GNU GPL, version 2.  See
16  * the COPYING file in the top-level directory.
17  *
18  */
19
20 #include "mmu.h"
21 #include "x86.h"
22 #include "kvm_cache_regs.h"
23
24 #include <linux/kvm_host.h>
25 #include <linux/types.h>
26 #include <linux/string.h>
27 #include <linux/mm.h>
28 #include <linux/highmem.h>
29 #include <linux/module.h>
30 #include <linux/swap.h>
31 #include <linux/hugetlb.h>
32 #include <linux/compiler.h>
33 #include <linux/srcu.h>
34
35 #include <asm/page.h>
36 #include <asm/cmpxchg.h>
37 #include <asm/io.h>
38 #include <asm/vmx.h>
39
40 /*
41  * When setting this variable to true it enables Two-Dimensional-Paging
42  * where the hardware walks 2 page tables:
43  * 1. the guest-virtual to guest-physical
44  * 2. while doing 1. it walks guest-physical to host-physical
45  * If the hardware supports that we don't need to do shadow paging.
46  */
47 bool tdp_enabled = false;
48
49 #undef MMU_DEBUG
50
51 #undef AUDIT
52
53 #ifdef AUDIT
54 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
55 #else
56 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
57 #endif
58
59 #ifdef MMU_DEBUG
60
61 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
62 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
63
64 #else
65
66 #define pgprintk(x...) do { } while (0)
67 #define rmap_printk(x...) do { } while (0)
68
69 #endif
70
71 #if defined(MMU_DEBUG) || defined(AUDIT)
72 static int dbg = 0;
73 module_param(dbg, bool, 0644);
74 #endif
75
76 static int oos_shadow = 1;
77 module_param(oos_shadow, bool, 0644);
78
79 #ifndef MMU_DEBUG
80 #define ASSERT(x) do { } while (0)
81 #else
82 #define ASSERT(x)                                                       \
83         if (!(x)) {                                                     \
84                 printk(KERN_WARNING "assertion failed %s:%d: %s\n",     \
85                        __FILE__, __LINE__, #x);                         \
86         }
87 #endif
88
89 #define PT_FIRST_AVAIL_BITS_SHIFT 9
90 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
91
92 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
93
94 #define PT64_LEVEL_BITS 9
95
96 #define PT64_LEVEL_SHIFT(level) \
97                 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
98
99 #define PT64_LEVEL_MASK(level) \
100                 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
101
102 #define PT64_INDEX(address, level)\
103         (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
104
105
106 #define PT32_LEVEL_BITS 10
107
108 #define PT32_LEVEL_SHIFT(level) \
109                 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
110
111 #define PT32_LEVEL_MASK(level) \
112                 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
113 #define PT32_LVL_OFFSET_MASK(level) \
114         (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
115                                                 * PT32_LEVEL_BITS))) - 1))
116
117 #define PT32_INDEX(address, level)\
118         (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
119
120
121 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
122 #define PT64_DIR_BASE_ADDR_MASK \
123         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
124 #define PT64_LVL_ADDR_MASK(level) \
125         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
126                                                 * PT64_LEVEL_BITS))) - 1))
127 #define PT64_LVL_OFFSET_MASK(level) \
128         (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
129                                                 * PT64_LEVEL_BITS))) - 1))
130
131 #define PT32_BASE_ADDR_MASK PAGE_MASK
132 #define PT32_DIR_BASE_ADDR_MASK \
133         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
134 #define PT32_LVL_ADDR_MASK(level) \
135         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
136                                             * PT32_LEVEL_BITS))) - 1))
137
138 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
139                         | PT64_NX_MASK)
140
141 #define RMAP_EXT 4
142
143 #define ACC_EXEC_MASK    1
144 #define ACC_WRITE_MASK   PT_WRITABLE_MASK
145 #define ACC_USER_MASK    PT_USER_MASK
146 #define ACC_ALL          (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
147
148 #include <trace/events/kvm.h>
149
150 #undef TRACE_INCLUDE_FILE
151 #define CREATE_TRACE_POINTS
152 #include "mmutrace.h"
153
154 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
155
156 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
157
158 struct kvm_rmap_desc {
159         u64 *sptes[RMAP_EXT];
160         struct kvm_rmap_desc *more;
161 };
162
163 struct kvm_shadow_walk_iterator {
164         u64 addr;
165         hpa_t shadow_addr;
166         int level;
167         u64 *sptep;
168         unsigned index;
169 };
170
171 #define for_each_shadow_entry(_vcpu, _addr, _walker)    \
172         for (shadow_walk_init(&(_walker), _vcpu, _addr);        \
173              shadow_walk_okay(&(_walker));                      \
174              shadow_walk_next(&(_walker)))
175
176
177 struct kvm_unsync_walk {
178         int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
179 };
180
181 typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
182
183 static struct kmem_cache *pte_chain_cache;
184 static struct kmem_cache *rmap_desc_cache;
185 static struct kmem_cache *mmu_page_header_cache;
186
187 static u64 __read_mostly shadow_trap_nonpresent_pte;
188 static u64 __read_mostly shadow_notrap_nonpresent_pte;
189 static u64 __read_mostly shadow_base_present_pte;
190 static u64 __read_mostly shadow_nx_mask;
191 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
192 static u64 __read_mostly shadow_user_mask;
193 static u64 __read_mostly shadow_accessed_mask;
194 static u64 __read_mostly shadow_dirty_mask;
195
196 static inline u64 rsvd_bits(int s, int e)
197 {
198         return ((1ULL << (e - s + 1)) - 1) << s;
199 }
200
201 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
202 {
203         shadow_trap_nonpresent_pte = trap_pte;
204         shadow_notrap_nonpresent_pte = notrap_pte;
205 }
206 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
207
208 void kvm_mmu_set_base_ptes(u64 base_pte)
209 {
210         shadow_base_present_pte = base_pte;
211 }
212 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
213
214 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
215                 u64 dirty_mask, u64 nx_mask, u64 x_mask)
216 {
217         shadow_user_mask = user_mask;
218         shadow_accessed_mask = accessed_mask;
219         shadow_dirty_mask = dirty_mask;
220         shadow_nx_mask = nx_mask;
221         shadow_x_mask = x_mask;
222 }
223 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
224
225 static int is_write_protection(struct kvm_vcpu *vcpu)
226 {
227         return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
228 }
229
230 static int is_cpuid_PSE36(void)
231 {
232         return 1;
233 }
234
235 static int is_nx(struct kvm_vcpu *vcpu)
236 {
237         return vcpu->arch.efer & EFER_NX;
238 }
239
240 static int is_shadow_present_pte(u64 pte)
241 {
242         return pte != shadow_trap_nonpresent_pte
243                 && pte != shadow_notrap_nonpresent_pte;
244 }
245
246 static int is_large_pte(u64 pte)
247 {
248         return pte & PT_PAGE_SIZE_MASK;
249 }
250
251 static int is_writable_pte(unsigned long pte)
252 {
253         return pte & PT_WRITABLE_MASK;
254 }
255
256 static int is_dirty_gpte(unsigned long pte)
257 {
258         return pte & PT_DIRTY_MASK;
259 }
260
261 static int is_rmap_spte(u64 pte)
262 {
263         return is_shadow_present_pte(pte);
264 }
265
266 static int is_last_spte(u64 pte, int level)
267 {
268         if (level == PT_PAGE_TABLE_LEVEL)
269                 return 1;
270         if (is_large_pte(pte))
271                 return 1;
272         return 0;
273 }
274
275 static pfn_t spte_to_pfn(u64 pte)
276 {
277         return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
278 }
279
280 static gfn_t pse36_gfn_delta(u32 gpte)
281 {
282         int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
283
284         return (gpte & PT32_DIR_PSE36_MASK) << shift;
285 }
286
287 static void __set_spte(u64 *sptep, u64 spte)
288 {
289 #ifdef CONFIG_X86_64
290         set_64bit((unsigned long *)sptep, spte);
291 #else
292         set_64bit((unsigned long long *)sptep, spte);
293 #endif
294 }
295
296 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
297                                   struct kmem_cache *base_cache, int min)
298 {
299         void *obj;
300
301         if (cache->nobjs >= min)
302                 return 0;
303         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
304                 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
305                 if (!obj)
306                         return -ENOMEM;
307                 cache->objects[cache->nobjs++] = obj;
308         }
309         return 0;
310 }
311
312 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
313 {
314         while (mc->nobjs)
315                 kfree(mc->objects[--mc->nobjs]);
316 }
317
318 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
319                                        int min)
320 {
321         struct page *page;
322
323         if (cache->nobjs >= min)
324                 return 0;
325         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
326                 page = alloc_page(GFP_KERNEL);
327                 if (!page)
328                         return -ENOMEM;
329                 set_page_private(page, 0);
330                 cache->objects[cache->nobjs++] = page_address(page);
331         }
332         return 0;
333 }
334
335 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
336 {
337         while (mc->nobjs)
338                 free_page((unsigned long)mc->objects[--mc->nobjs]);
339 }
340
341 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
342 {
343         int r;
344
345         r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
346                                    pte_chain_cache, 4);
347         if (r)
348                 goto out;
349         r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
350                                    rmap_desc_cache, 4);
351         if (r)
352                 goto out;
353         r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
354         if (r)
355                 goto out;
356         r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
357                                    mmu_page_header_cache, 4);
358 out:
359         return r;
360 }
361
362 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
363 {
364         mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
365         mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
366         mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
367         mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
368 }
369
370 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
371                                     size_t size)
372 {
373         void *p;
374
375         BUG_ON(!mc->nobjs);
376         p = mc->objects[--mc->nobjs];
377         return p;
378 }
379
380 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
381 {
382         return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
383                                       sizeof(struct kvm_pte_chain));
384 }
385
386 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
387 {
388         kfree(pc);
389 }
390
391 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
392 {
393         return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
394                                       sizeof(struct kvm_rmap_desc));
395 }
396
397 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
398 {
399         kfree(rd);
400 }
401
402 /*
403  * Return the pointer to the largepage write count for a given
404  * gfn, handling slots that are not large page aligned.
405  */
406 static int *slot_largepage_idx(gfn_t gfn,
407                                struct kvm_memory_slot *slot,
408                                int level)
409 {
410         unsigned long idx;
411
412         idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
413               (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
414         return &slot->lpage_info[level - 2][idx].write_count;
415 }
416
417 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
418 {
419         struct kvm_memory_slot *slot;
420         int *write_count;
421         int i;
422
423         gfn = unalias_gfn(kvm, gfn);
424
425         slot = gfn_to_memslot_unaliased(kvm, gfn);
426         for (i = PT_DIRECTORY_LEVEL;
427              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
428                 write_count   = slot_largepage_idx(gfn, slot, i);
429                 *write_count += 1;
430         }
431 }
432
433 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
434 {
435         struct kvm_memory_slot *slot;
436         int *write_count;
437         int i;
438
439         gfn = unalias_gfn(kvm, gfn);
440         for (i = PT_DIRECTORY_LEVEL;
441              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
442                 slot          = gfn_to_memslot_unaliased(kvm, gfn);
443                 write_count   = slot_largepage_idx(gfn, slot, i);
444                 *write_count -= 1;
445                 WARN_ON(*write_count < 0);
446         }
447 }
448
449 static int has_wrprotected_page(struct kvm *kvm,
450                                 gfn_t gfn,
451                                 int level)
452 {
453         struct kvm_memory_slot *slot;
454         int *largepage_idx;
455
456         gfn = unalias_gfn(kvm, gfn);
457         slot = gfn_to_memslot_unaliased(kvm, gfn);
458         if (slot) {
459                 largepage_idx = slot_largepage_idx(gfn, slot, level);
460                 return *largepage_idx;
461         }
462
463         return 1;
464 }
465
466 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
467 {
468         unsigned long page_size;
469         int i, ret = 0;
470
471         page_size = kvm_host_page_size(kvm, gfn);
472
473         for (i = PT_PAGE_TABLE_LEVEL;
474              i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
475                 if (page_size >= KVM_HPAGE_SIZE(i))
476                         ret = i;
477                 else
478                         break;
479         }
480
481         return ret;
482 }
483
484 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
485 {
486         struct kvm_memory_slot *slot;
487         int host_level, level, max_level;
488
489         slot = gfn_to_memslot(vcpu->kvm, large_gfn);
490         if (slot && slot->dirty_bitmap)
491                 return PT_PAGE_TABLE_LEVEL;
492
493         host_level = host_mapping_level(vcpu->kvm, large_gfn);
494
495         if (host_level == PT_PAGE_TABLE_LEVEL)
496                 return host_level;
497
498         max_level = kvm_x86_ops->get_lpage_level() < host_level ?
499                 kvm_x86_ops->get_lpage_level() : host_level;
500
501         for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
502                 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
503                         break;
504
505         return level - 1;
506 }
507
508 /*
509  * Take gfn and return the reverse mapping to it.
510  * Note: gfn must be unaliased before this function get called
511  */
512
513 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
514 {
515         struct kvm_memory_slot *slot;
516         unsigned long idx;
517
518         slot = gfn_to_memslot(kvm, gfn);
519         if (likely(level == PT_PAGE_TABLE_LEVEL))
520                 return &slot->rmap[gfn - slot->base_gfn];
521
522         idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
523                 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
524
525         return &slot->lpage_info[level - 2][idx].rmap_pde;
526 }
527
528 /*
529  * Reverse mapping data structures:
530  *
531  * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
532  * that points to page_address(page).
533  *
534  * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
535  * containing more mappings.
536  *
537  * Returns the number of rmap entries before the spte was added or zero if
538  * the spte was not added.
539  *
540  */
541 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
542 {
543         struct kvm_mmu_page *sp;
544         struct kvm_rmap_desc *desc;
545         unsigned long *rmapp;
546         int i, count = 0;
547
548         if (!is_rmap_spte(*spte))
549                 return count;
550         gfn = unalias_gfn(vcpu->kvm, gfn);
551         sp = page_header(__pa(spte));
552         sp->gfns[spte - sp->spt] = gfn;
553         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
554         if (!*rmapp) {
555                 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
556                 *rmapp = (unsigned long)spte;
557         } else if (!(*rmapp & 1)) {
558                 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
559                 desc = mmu_alloc_rmap_desc(vcpu);
560                 desc->sptes[0] = (u64 *)*rmapp;
561                 desc->sptes[1] = spte;
562                 *rmapp = (unsigned long)desc | 1;
563         } else {
564                 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
565                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
566                 while (desc->sptes[RMAP_EXT-1] && desc->more) {
567                         desc = desc->more;
568                         count += RMAP_EXT;
569                 }
570                 if (desc->sptes[RMAP_EXT-1]) {
571                         desc->more = mmu_alloc_rmap_desc(vcpu);
572                         desc = desc->more;
573                 }
574                 for (i = 0; desc->sptes[i]; ++i)
575                         ;
576                 desc->sptes[i] = spte;
577         }
578         return count;
579 }
580
581 static void rmap_desc_remove_entry(unsigned long *rmapp,
582                                    struct kvm_rmap_desc *desc,
583                                    int i,
584                                    struct kvm_rmap_desc *prev_desc)
585 {
586         int j;
587
588         for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
589                 ;
590         desc->sptes[i] = desc->sptes[j];
591         desc->sptes[j] = NULL;
592         if (j != 0)
593                 return;
594         if (!prev_desc && !desc->more)
595                 *rmapp = (unsigned long)desc->sptes[0];
596         else
597                 if (prev_desc)
598                         prev_desc->more = desc->more;
599                 else
600                         *rmapp = (unsigned long)desc->more | 1;
601         mmu_free_rmap_desc(desc);
602 }
603
604 static void rmap_remove(struct kvm *kvm, u64 *spte)
605 {
606         struct kvm_rmap_desc *desc;
607         struct kvm_rmap_desc *prev_desc;
608         struct kvm_mmu_page *sp;
609         pfn_t pfn;
610         unsigned long *rmapp;
611         int i;
612
613         if (!is_rmap_spte(*spte))
614                 return;
615         sp = page_header(__pa(spte));
616         pfn = spte_to_pfn(*spte);
617         if (*spte & shadow_accessed_mask)
618                 kvm_set_pfn_accessed(pfn);
619         if (is_writable_pte(*spte))
620                 kvm_set_pfn_dirty(pfn);
621         rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
622         if (!*rmapp) {
623                 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
624                 BUG();
625         } else if (!(*rmapp & 1)) {
626                 rmap_printk("rmap_remove:  %p %llx 1->0\n", spte, *spte);
627                 if ((u64 *)*rmapp != spte) {
628                         printk(KERN_ERR "rmap_remove:  %p %llx 1->BUG\n",
629                                spte, *spte);
630                         BUG();
631                 }
632                 *rmapp = 0;
633         } else {
634                 rmap_printk("rmap_remove:  %p %llx many->many\n", spte, *spte);
635                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
636                 prev_desc = NULL;
637                 while (desc) {
638                         for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
639                                 if (desc->sptes[i] == spte) {
640                                         rmap_desc_remove_entry(rmapp,
641                                                                desc, i,
642                                                                prev_desc);
643                                         return;
644                                 }
645                         prev_desc = desc;
646                         desc = desc->more;
647                 }
648                 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
649                 BUG();
650         }
651 }
652
653 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
654 {
655         struct kvm_rmap_desc *desc;
656         struct kvm_rmap_desc *prev_desc;
657         u64 *prev_spte;
658         int i;
659
660         if (!*rmapp)
661                 return NULL;
662         else if (!(*rmapp & 1)) {
663                 if (!spte)
664                         return (u64 *)*rmapp;
665                 return NULL;
666         }
667         desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
668         prev_desc = NULL;
669         prev_spte = NULL;
670         while (desc) {
671                 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
672                         if (prev_spte == spte)
673                                 return desc->sptes[i];
674                         prev_spte = desc->sptes[i];
675                 }
676                 desc = desc->more;
677         }
678         return NULL;
679 }
680
681 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
682 {
683         unsigned long *rmapp;
684         u64 *spte;
685         int i, write_protected = 0;
686
687         gfn = unalias_gfn(kvm, gfn);
688         rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
689
690         spte = rmap_next(kvm, rmapp, NULL);
691         while (spte) {
692                 BUG_ON(!spte);
693                 BUG_ON(!(*spte & PT_PRESENT_MASK));
694                 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
695                 if (is_writable_pte(*spte)) {
696                         __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
697                         write_protected = 1;
698                 }
699                 spte = rmap_next(kvm, rmapp, spte);
700         }
701         if (write_protected) {
702                 pfn_t pfn;
703
704                 spte = rmap_next(kvm, rmapp, NULL);
705                 pfn = spte_to_pfn(*spte);
706                 kvm_set_pfn_dirty(pfn);
707         }
708
709         /* check for huge page mappings */
710         for (i = PT_DIRECTORY_LEVEL;
711              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
712                 rmapp = gfn_to_rmap(kvm, gfn, i);
713                 spte = rmap_next(kvm, rmapp, NULL);
714                 while (spte) {
715                         BUG_ON(!spte);
716                         BUG_ON(!(*spte & PT_PRESENT_MASK));
717                         BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
718                         pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
719                         if (is_writable_pte(*spte)) {
720                                 rmap_remove(kvm, spte);
721                                 --kvm->stat.lpages;
722                                 __set_spte(spte, shadow_trap_nonpresent_pte);
723                                 spte = NULL;
724                                 write_protected = 1;
725                         }
726                         spte = rmap_next(kvm, rmapp, spte);
727                 }
728         }
729
730         return write_protected;
731 }
732
733 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
734                            unsigned long data)
735 {
736         u64 *spte;
737         int need_tlb_flush = 0;
738
739         while ((spte = rmap_next(kvm, rmapp, NULL))) {
740                 BUG_ON(!(*spte & PT_PRESENT_MASK));
741                 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
742                 rmap_remove(kvm, spte);
743                 __set_spte(spte, shadow_trap_nonpresent_pte);
744                 need_tlb_flush = 1;
745         }
746         return need_tlb_flush;
747 }
748
749 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
750                              unsigned long data)
751 {
752         int need_flush = 0;
753         u64 *spte, new_spte;
754         pte_t *ptep = (pte_t *)data;
755         pfn_t new_pfn;
756
757         WARN_ON(pte_huge(*ptep));
758         new_pfn = pte_pfn(*ptep);
759         spte = rmap_next(kvm, rmapp, NULL);
760         while (spte) {
761                 BUG_ON(!is_shadow_present_pte(*spte));
762                 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
763                 need_flush = 1;
764                 if (pte_write(*ptep)) {
765                         rmap_remove(kvm, spte);
766                         __set_spte(spte, shadow_trap_nonpresent_pte);
767                         spte = rmap_next(kvm, rmapp, NULL);
768                 } else {
769                         new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
770                         new_spte |= (u64)new_pfn << PAGE_SHIFT;
771
772                         new_spte &= ~PT_WRITABLE_MASK;
773                         new_spte &= ~SPTE_HOST_WRITEABLE;
774                         if (is_writable_pte(*spte))
775                                 kvm_set_pfn_dirty(spte_to_pfn(*spte));
776                         __set_spte(spte, new_spte);
777                         spte = rmap_next(kvm, rmapp, spte);
778                 }
779         }
780         if (need_flush)
781                 kvm_flush_remote_tlbs(kvm);
782
783         return 0;
784 }
785
786 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
787                           unsigned long data,
788                           int (*handler)(struct kvm *kvm, unsigned long *rmapp,
789                                          unsigned long data))
790 {
791         int i, j;
792         int ret;
793         int retval = 0;
794         struct kvm_memslots *slots;
795
796         slots = rcu_dereference(kvm->memslots);
797
798         for (i = 0; i < slots->nmemslots; i++) {
799                 struct kvm_memory_slot *memslot = &slots->memslots[i];
800                 unsigned long start = memslot->userspace_addr;
801                 unsigned long end;
802
803                 end = start + (memslot->npages << PAGE_SHIFT);
804                 if (hva >= start && hva < end) {
805                         gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
806
807                         ret = handler(kvm, &memslot->rmap[gfn_offset], data);
808
809                         for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
810                                 int idx = gfn_offset;
811                                 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
812                                 ret |= handler(kvm,
813                                         &memslot->lpage_info[j][idx].rmap_pde,
814                                         data);
815                         }
816                         trace_kvm_age_page(hva, memslot, ret);
817                         retval |= ret;
818                 }
819         }
820
821         return retval;
822 }
823
824 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
825 {
826         return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
827 }
828
829 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
830 {
831         kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
832 }
833
834 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
835                          unsigned long data)
836 {
837         u64 *spte;
838         int young = 0;
839
840         /*
841          * Emulate the accessed bit for EPT, by checking if this page has
842          * an EPT mapping, and clearing it if it does. On the next access,
843          * a new EPT mapping will be established.
844          * This has some overhead, but not as much as the cost of swapping
845          * out actively used pages or breaking up actively used hugepages.
846          */
847         if (!shadow_accessed_mask)
848                 return kvm_unmap_rmapp(kvm, rmapp, data);
849
850         spte = rmap_next(kvm, rmapp, NULL);
851         while (spte) {
852                 int _young;
853                 u64 _spte = *spte;
854                 BUG_ON(!(_spte & PT_PRESENT_MASK));
855                 _young = _spte & PT_ACCESSED_MASK;
856                 if (_young) {
857                         young = 1;
858                         clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
859                 }
860                 spte = rmap_next(kvm, rmapp, spte);
861         }
862         return young;
863 }
864
865 #define RMAP_RECYCLE_THRESHOLD 1000
866
867 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
868 {
869         unsigned long *rmapp;
870         struct kvm_mmu_page *sp;
871
872         sp = page_header(__pa(spte));
873
874         gfn = unalias_gfn(vcpu->kvm, gfn);
875         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
876
877         kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
878         kvm_flush_remote_tlbs(vcpu->kvm);
879 }
880
881 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
882 {
883         return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
884 }
885
886 #ifdef MMU_DEBUG
887 static int is_empty_shadow_page(u64 *spt)
888 {
889         u64 *pos;
890         u64 *end;
891
892         for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
893                 if (is_shadow_present_pte(*pos)) {
894                         printk(KERN_ERR "%s: %p %llx\n", __func__,
895                                pos, *pos);
896                         return 0;
897                 }
898         return 1;
899 }
900 #endif
901
902 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
903 {
904         ASSERT(is_empty_shadow_page(sp->spt));
905         list_del(&sp->link);
906         __free_page(virt_to_page(sp->spt));
907         __free_page(virt_to_page(sp->gfns));
908         kfree(sp);
909         ++kvm->arch.n_free_mmu_pages;
910 }
911
912 static unsigned kvm_page_table_hashfn(gfn_t gfn)
913 {
914         return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
915 }
916
917 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
918                                                u64 *parent_pte)
919 {
920         struct kvm_mmu_page *sp;
921
922         sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
923         sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
924         sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
925         set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
926         list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
927         INIT_LIST_HEAD(&sp->oos_link);
928         bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
929         sp->multimapped = 0;
930         sp->parent_pte = parent_pte;
931         --vcpu->kvm->arch.n_free_mmu_pages;
932         return sp;
933 }
934
935 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
936                                     struct kvm_mmu_page *sp, u64 *parent_pte)
937 {
938         struct kvm_pte_chain *pte_chain;
939         struct hlist_node *node;
940         int i;
941
942         if (!parent_pte)
943                 return;
944         if (!sp->multimapped) {
945                 u64 *old = sp->parent_pte;
946
947                 if (!old) {
948                         sp->parent_pte = parent_pte;
949                         return;
950                 }
951                 sp->multimapped = 1;
952                 pte_chain = mmu_alloc_pte_chain(vcpu);
953                 INIT_HLIST_HEAD(&sp->parent_ptes);
954                 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
955                 pte_chain->parent_ptes[0] = old;
956         }
957         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
958                 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
959                         continue;
960                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
961                         if (!pte_chain->parent_ptes[i]) {
962                                 pte_chain->parent_ptes[i] = parent_pte;
963                                 return;
964                         }
965         }
966         pte_chain = mmu_alloc_pte_chain(vcpu);
967         BUG_ON(!pte_chain);
968         hlist_add_head(&pte_chain->link, &sp->parent_ptes);
969         pte_chain->parent_ptes[0] = parent_pte;
970 }
971
972 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
973                                        u64 *parent_pte)
974 {
975         struct kvm_pte_chain *pte_chain;
976         struct hlist_node *node;
977         int i;
978
979         if (!sp->multimapped) {
980                 BUG_ON(sp->parent_pte != parent_pte);
981                 sp->parent_pte = NULL;
982                 return;
983         }
984         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
985                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
986                         if (!pte_chain->parent_ptes[i])
987                                 break;
988                         if (pte_chain->parent_ptes[i] != parent_pte)
989                                 continue;
990                         while (i + 1 < NR_PTE_CHAIN_ENTRIES
991                                 && pte_chain->parent_ptes[i + 1]) {
992                                 pte_chain->parent_ptes[i]
993                                         = pte_chain->parent_ptes[i + 1];
994                                 ++i;
995                         }
996                         pte_chain->parent_ptes[i] = NULL;
997                         if (i == 0) {
998                                 hlist_del(&pte_chain->link);
999                                 mmu_free_pte_chain(pte_chain);
1000                                 if (hlist_empty(&sp->parent_ptes)) {
1001                                         sp->multimapped = 0;
1002                                         sp->parent_pte = NULL;
1003                                 }
1004                         }
1005                         return;
1006                 }
1007         BUG();
1008 }
1009
1010
1011 static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1012                             mmu_parent_walk_fn fn)
1013 {
1014         struct kvm_pte_chain *pte_chain;
1015         struct hlist_node *node;
1016         struct kvm_mmu_page *parent_sp;
1017         int i;
1018
1019         if (!sp->multimapped && sp->parent_pte) {
1020                 parent_sp = page_header(__pa(sp->parent_pte));
1021                 fn(vcpu, parent_sp);
1022                 mmu_parent_walk(vcpu, parent_sp, fn);
1023                 return;
1024         }
1025         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1026                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1027                         if (!pte_chain->parent_ptes[i])
1028                                 break;
1029                         parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1030                         fn(vcpu, parent_sp);
1031                         mmu_parent_walk(vcpu, parent_sp, fn);
1032                 }
1033 }
1034
1035 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1036 {
1037         unsigned int index;
1038         struct kvm_mmu_page *sp = page_header(__pa(spte));
1039
1040         index = spte - sp->spt;
1041         if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1042                 sp->unsync_children++;
1043         WARN_ON(!sp->unsync_children);
1044 }
1045
1046 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1047 {
1048         struct kvm_pte_chain *pte_chain;
1049         struct hlist_node *node;
1050         int i;
1051
1052         if (!sp->parent_pte)
1053                 return;
1054
1055         if (!sp->multimapped) {
1056                 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1057                 return;
1058         }
1059
1060         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1061                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1062                         if (!pte_chain->parent_ptes[i])
1063                                 break;
1064                         kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1065                 }
1066 }
1067
1068 static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1069 {
1070         kvm_mmu_update_parents_unsync(sp);
1071         return 1;
1072 }
1073
1074 static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
1075                                         struct kvm_mmu_page *sp)
1076 {
1077         mmu_parent_walk(vcpu, sp, unsync_walk_fn);
1078         kvm_mmu_update_parents_unsync(sp);
1079 }
1080
1081 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1082                                     struct kvm_mmu_page *sp)
1083 {
1084         int i;
1085
1086         for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1087                 sp->spt[i] = shadow_trap_nonpresent_pte;
1088 }
1089
1090 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1091                                struct kvm_mmu_page *sp)
1092 {
1093         return 1;
1094 }
1095
1096 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1097 {
1098 }
1099
1100 #define KVM_PAGE_ARRAY_NR 16
1101
1102 struct kvm_mmu_pages {
1103         struct mmu_page_and_offset {
1104                 struct kvm_mmu_page *sp;
1105                 unsigned int idx;
1106         } page[KVM_PAGE_ARRAY_NR];
1107         unsigned int nr;
1108 };
1109
1110 #define for_each_unsync_children(bitmap, idx)           \
1111         for (idx = find_first_bit(bitmap, 512);         \
1112              idx < 512;                                 \
1113              idx = find_next_bit(bitmap, 512, idx+1))
1114
1115 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1116                          int idx)
1117 {
1118         int i;
1119
1120         if (sp->unsync)
1121                 for (i=0; i < pvec->nr; i++)
1122                         if (pvec->page[i].sp == sp)
1123                                 return 0;
1124
1125         pvec->page[pvec->nr].sp = sp;
1126         pvec->page[pvec->nr].idx = idx;
1127         pvec->nr++;
1128         return (pvec->nr == KVM_PAGE_ARRAY_NR);
1129 }
1130
1131 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1132                            struct kvm_mmu_pages *pvec)
1133 {
1134         int i, ret, nr_unsync_leaf = 0;
1135
1136         for_each_unsync_children(sp->unsync_child_bitmap, i) {
1137                 u64 ent = sp->spt[i];
1138
1139                 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1140                         struct kvm_mmu_page *child;
1141                         child = page_header(ent & PT64_BASE_ADDR_MASK);
1142
1143                         if (child->unsync_children) {
1144                                 if (mmu_pages_add(pvec, child, i))
1145                                         return -ENOSPC;
1146
1147                                 ret = __mmu_unsync_walk(child, pvec);
1148                                 if (!ret)
1149                                         __clear_bit(i, sp->unsync_child_bitmap);
1150                                 else if (ret > 0)
1151                                         nr_unsync_leaf += ret;
1152                                 else
1153                                         return ret;
1154                         }
1155
1156                         if (child->unsync) {
1157                                 nr_unsync_leaf++;
1158                                 if (mmu_pages_add(pvec, child, i))
1159                                         return -ENOSPC;
1160                         }
1161                 }
1162         }
1163
1164         if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1165                 sp->unsync_children = 0;
1166
1167         return nr_unsync_leaf;
1168 }
1169
1170 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1171                            struct kvm_mmu_pages *pvec)
1172 {
1173         if (!sp->unsync_children)
1174                 return 0;
1175
1176         mmu_pages_add(pvec, sp, 0);
1177         return __mmu_unsync_walk(sp, pvec);
1178 }
1179
1180 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1181 {
1182         unsigned index;
1183         struct hlist_head *bucket;
1184         struct kvm_mmu_page *sp;
1185         struct hlist_node *node;
1186
1187         pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1188         index = kvm_page_table_hashfn(gfn);
1189         bucket = &kvm->arch.mmu_page_hash[index];
1190         hlist_for_each_entry(sp, node, bucket, hash_link)
1191                 if (sp->gfn == gfn && !sp->role.direct
1192                     && !sp->role.invalid) {
1193                         pgprintk("%s: found role %x\n",
1194                                  __func__, sp->role.word);
1195                         return sp;
1196                 }
1197         return NULL;
1198 }
1199
1200 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1201 {
1202         WARN_ON(!sp->unsync);
1203         sp->unsync = 0;
1204         --kvm->stat.mmu_unsync;
1205 }
1206
1207 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1208
1209 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1210 {
1211         if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1212                 kvm_mmu_zap_page(vcpu->kvm, sp);
1213                 return 1;
1214         }
1215
1216         trace_kvm_mmu_sync_page(sp);
1217         if (rmap_write_protect(vcpu->kvm, sp->gfn))
1218                 kvm_flush_remote_tlbs(vcpu->kvm);
1219         kvm_unlink_unsync_page(vcpu->kvm, sp);
1220         if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1221                 kvm_mmu_zap_page(vcpu->kvm, sp);
1222                 return 1;
1223         }
1224
1225         kvm_mmu_flush_tlb(vcpu);
1226         return 0;
1227 }
1228
1229 struct mmu_page_path {
1230         struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1231         unsigned int idx[PT64_ROOT_LEVEL-1];
1232 };
1233
1234 #define for_each_sp(pvec, sp, parents, i)                       \
1235                 for (i = mmu_pages_next(&pvec, &parents, -1),   \
1236                         sp = pvec.page[i].sp;                   \
1237                         i < pvec.nr && ({ sp = pvec.page[i].sp; 1;});   \
1238                         i = mmu_pages_next(&pvec, &parents, i))
1239
1240 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1241                           struct mmu_page_path *parents,
1242                           int i)
1243 {
1244         int n;
1245
1246         for (n = i+1; n < pvec->nr; n++) {
1247                 struct kvm_mmu_page *sp = pvec->page[n].sp;
1248
1249                 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1250                         parents->idx[0] = pvec->page[n].idx;
1251                         return n;
1252                 }
1253
1254                 parents->parent[sp->role.level-2] = sp;
1255                 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1256         }
1257
1258         return n;
1259 }
1260
1261 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1262 {
1263         struct kvm_mmu_page *sp;
1264         unsigned int level = 0;
1265
1266         do {
1267                 unsigned int idx = parents->idx[level];
1268
1269                 sp = parents->parent[level];
1270                 if (!sp)
1271                         return;
1272
1273                 --sp->unsync_children;
1274                 WARN_ON((int)sp->unsync_children < 0);
1275                 __clear_bit(idx, sp->unsync_child_bitmap);
1276                 level++;
1277         } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1278 }
1279
1280 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1281                                struct mmu_page_path *parents,
1282                                struct kvm_mmu_pages *pvec)
1283 {
1284         parents->parent[parent->role.level-1] = NULL;
1285         pvec->nr = 0;
1286 }
1287
1288 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1289                               struct kvm_mmu_page *parent)
1290 {
1291         int i;
1292         struct kvm_mmu_page *sp;
1293         struct mmu_page_path parents;
1294         struct kvm_mmu_pages pages;
1295
1296         kvm_mmu_pages_init(parent, &parents, &pages);
1297         while (mmu_unsync_walk(parent, &pages)) {
1298                 int protected = 0;
1299
1300                 for_each_sp(pages, sp, parents, i)
1301                         protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1302
1303                 if (protected)
1304                         kvm_flush_remote_tlbs(vcpu->kvm);
1305
1306                 for_each_sp(pages, sp, parents, i) {
1307                         kvm_sync_page(vcpu, sp);
1308                         mmu_pages_clear_parents(&parents);
1309                 }
1310                 cond_resched_lock(&vcpu->kvm->mmu_lock);
1311                 kvm_mmu_pages_init(parent, &parents, &pages);
1312         }
1313 }
1314
1315 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1316                                              gfn_t gfn,
1317                                              gva_t gaddr,
1318                                              unsigned level,
1319                                              int direct,
1320                                              unsigned access,
1321                                              u64 *parent_pte)
1322 {
1323         union kvm_mmu_page_role role;
1324         unsigned index;
1325         unsigned quadrant;
1326         struct hlist_head *bucket;
1327         struct kvm_mmu_page *sp;
1328         struct hlist_node *node, *tmp;
1329
1330         role = vcpu->arch.mmu.base_role;
1331         role.level = level;
1332         role.direct = direct;
1333         role.access = access;
1334         if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1335                 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1336                 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1337                 role.quadrant = quadrant;
1338         }
1339         index = kvm_page_table_hashfn(gfn);
1340         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1341         hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1342                 if (sp->gfn == gfn) {
1343                         if (sp->unsync)
1344                                 if (kvm_sync_page(vcpu, sp))
1345                                         continue;
1346
1347                         if (sp->role.word != role.word)
1348                                 continue;
1349
1350                         mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1351                         if (sp->unsync_children) {
1352                                 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1353                                 kvm_mmu_mark_parents_unsync(vcpu, sp);
1354                         }
1355                         trace_kvm_mmu_get_page(sp, false);
1356                         return sp;
1357                 }
1358         ++vcpu->kvm->stat.mmu_cache_miss;
1359         sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1360         if (!sp)
1361                 return sp;
1362         sp->gfn = gfn;
1363         sp->role = role;
1364         hlist_add_head(&sp->hash_link, bucket);
1365         if (!direct) {
1366                 if (rmap_write_protect(vcpu->kvm, gfn))
1367                         kvm_flush_remote_tlbs(vcpu->kvm);
1368                 account_shadowed(vcpu->kvm, gfn);
1369         }
1370         if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1371                 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1372         else
1373                 nonpaging_prefetch_page(vcpu, sp);
1374         trace_kvm_mmu_get_page(sp, true);
1375         return sp;
1376 }
1377
1378 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1379                              struct kvm_vcpu *vcpu, u64 addr)
1380 {
1381         iterator->addr = addr;
1382         iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1383         iterator->level = vcpu->arch.mmu.shadow_root_level;
1384         if (iterator->level == PT32E_ROOT_LEVEL) {
1385                 iterator->shadow_addr
1386                         = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1387                 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1388                 --iterator->level;
1389                 if (!iterator->shadow_addr)
1390                         iterator->level = 0;
1391         }
1392 }
1393
1394 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1395 {
1396         if (iterator->level < PT_PAGE_TABLE_LEVEL)
1397                 return false;
1398
1399         if (iterator->level == PT_PAGE_TABLE_LEVEL)
1400                 if (is_large_pte(*iterator->sptep))
1401                         return false;
1402
1403         iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1404         iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1405         return true;
1406 }
1407
1408 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1409 {
1410         iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1411         --iterator->level;
1412 }
1413
1414 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1415                                          struct kvm_mmu_page *sp)
1416 {
1417         unsigned i;
1418         u64 *pt;
1419         u64 ent;
1420
1421         pt = sp->spt;
1422
1423         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1424                 ent = pt[i];
1425
1426                 if (is_shadow_present_pte(ent)) {
1427                         if (!is_last_spte(ent, sp->role.level)) {
1428                                 ent &= PT64_BASE_ADDR_MASK;
1429                                 mmu_page_remove_parent_pte(page_header(ent),
1430                                                            &pt[i]);
1431                         } else {
1432                                 if (is_large_pte(ent))
1433                                         --kvm->stat.lpages;
1434                                 rmap_remove(kvm, &pt[i]);
1435                         }
1436                 }
1437                 pt[i] = shadow_trap_nonpresent_pte;
1438         }
1439 }
1440
1441 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1442 {
1443         mmu_page_remove_parent_pte(sp, parent_pte);
1444 }
1445
1446 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1447 {
1448         int i;
1449         struct kvm_vcpu *vcpu;
1450
1451         kvm_for_each_vcpu(i, vcpu, kvm)
1452                 vcpu->arch.last_pte_updated = NULL;
1453 }
1454
1455 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1456 {
1457         u64 *parent_pte;
1458
1459         while (sp->multimapped || sp->parent_pte) {
1460                 if (!sp->multimapped)
1461                         parent_pte = sp->parent_pte;
1462                 else {
1463                         struct kvm_pte_chain *chain;
1464
1465                         chain = container_of(sp->parent_ptes.first,
1466                                              struct kvm_pte_chain, link);
1467                         parent_pte = chain->parent_ptes[0];
1468                 }
1469                 BUG_ON(!parent_pte);
1470                 kvm_mmu_put_page(sp, parent_pte);
1471                 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1472         }
1473 }
1474
1475 static int mmu_zap_unsync_children(struct kvm *kvm,
1476                                    struct kvm_mmu_page *parent)
1477 {
1478         int i, zapped = 0;
1479         struct mmu_page_path parents;
1480         struct kvm_mmu_pages pages;
1481
1482         if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1483                 return 0;
1484
1485         kvm_mmu_pages_init(parent, &parents, &pages);
1486         while (mmu_unsync_walk(parent, &pages)) {
1487                 struct kvm_mmu_page *sp;
1488
1489                 for_each_sp(pages, sp, parents, i) {
1490                         kvm_mmu_zap_page(kvm, sp);
1491                         mmu_pages_clear_parents(&parents);
1492                 }
1493                 zapped += pages.nr;
1494                 kvm_mmu_pages_init(parent, &parents, &pages);
1495         }
1496
1497         return zapped;
1498 }
1499
1500 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1501 {
1502         int ret;
1503
1504         trace_kvm_mmu_zap_page(sp);
1505         ++kvm->stat.mmu_shadow_zapped;
1506         ret = mmu_zap_unsync_children(kvm, sp);
1507         kvm_mmu_page_unlink_children(kvm, sp);
1508         kvm_mmu_unlink_parents(kvm, sp);
1509         kvm_flush_remote_tlbs(kvm);
1510         if (!sp->role.invalid && !sp->role.direct)
1511                 unaccount_shadowed(kvm, sp->gfn);
1512         if (sp->unsync)
1513                 kvm_unlink_unsync_page(kvm, sp);
1514         if (!sp->root_count) {
1515                 hlist_del(&sp->hash_link);
1516                 kvm_mmu_free_page(kvm, sp);
1517         } else {
1518                 sp->role.invalid = 1;
1519                 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1520                 kvm_reload_remote_mmus(kvm);
1521         }
1522         kvm_mmu_reset_last_pte_updated(kvm);
1523         return ret;
1524 }
1525
1526 /*
1527  * Changing the number of mmu pages allocated to the vm
1528  * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1529  */
1530 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1531 {
1532         int used_pages;
1533
1534         used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1535         used_pages = max(0, used_pages);
1536
1537         /*
1538          * If we set the number of mmu pages to be smaller be than the
1539          * number of actived pages , we must to free some mmu pages before we
1540          * change the value
1541          */
1542
1543         if (used_pages > kvm_nr_mmu_pages) {
1544                 while (used_pages > kvm_nr_mmu_pages) {
1545                         struct kvm_mmu_page *page;
1546
1547                         page = container_of(kvm->arch.active_mmu_pages.prev,
1548                                             struct kvm_mmu_page, link);
1549                         kvm_mmu_zap_page(kvm, page);
1550                         used_pages--;
1551                 }
1552                 kvm->arch.n_free_mmu_pages = 0;
1553         }
1554         else
1555                 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1556                                          - kvm->arch.n_alloc_mmu_pages;
1557
1558         kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1559 }
1560
1561 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1562 {
1563         unsigned index;
1564         struct hlist_head *bucket;
1565         struct kvm_mmu_page *sp;
1566         struct hlist_node *node, *n;
1567         int r;
1568
1569         pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1570         r = 0;
1571         index = kvm_page_table_hashfn(gfn);
1572         bucket = &kvm->arch.mmu_page_hash[index];
1573         hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1574                 if (sp->gfn == gfn && !sp->role.direct) {
1575                         pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1576                                  sp->role.word);
1577                         r = 1;
1578                         if (kvm_mmu_zap_page(kvm, sp))
1579                                 n = bucket->first;
1580                 }
1581         return r;
1582 }
1583
1584 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1585 {
1586         unsigned index;
1587         struct hlist_head *bucket;
1588         struct kvm_mmu_page *sp;
1589         struct hlist_node *node, *nn;
1590
1591         index = kvm_page_table_hashfn(gfn);
1592         bucket = &kvm->arch.mmu_page_hash[index];
1593         hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1594                 if (sp->gfn == gfn && !sp->role.direct
1595                     && !sp->role.invalid) {
1596                         pgprintk("%s: zap %lx %x\n",
1597                                  __func__, gfn, sp->role.word);
1598                         kvm_mmu_zap_page(kvm, sp);
1599                 }
1600         }
1601 }
1602
1603 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1604 {
1605         int slot = memslot_id(kvm, gfn);
1606         struct kvm_mmu_page *sp = page_header(__pa(pte));
1607
1608         __set_bit(slot, sp->slot_bitmap);
1609 }
1610
1611 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1612 {
1613         int i;
1614         u64 *pt = sp->spt;
1615
1616         if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1617                 return;
1618
1619         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1620                 if (pt[i] == shadow_notrap_nonpresent_pte)
1621                         __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1622         }
1623 }
1624
1625 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1626 {
1627         struct page *page;
1628
1629         gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
1630
1631         if (gpa == UNMAPPED_GVA)
1632                 return NULL;
1633
1634         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1635
1636         return page;
1637 }
1638
1639 /*
1640  * The function is based on mtrr_type_lookup() in
1641  * arch/x86/kernel/cpu/mtrr/generic.c
1642  */
1643 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1644                          u64 start, u64 end)
1645 {
1646         int i;
1647         u64 base, mask;
1648         u8 prev_match, curr_match;
1649         int num_var_ranges = KVM_NR_VAR_MTRR;
1650
1651         if (!mtrr_state->enabled)
1652                 return 0xFF;
1653
1654         /* Make end inclusive end, instead of exclusive */
1655         end--;
1656
1657         /* Look in fixed ranges. Just return the type as per start */
1658         if (mtrr_state->have_fixed && (start < 0x100000)) {
1659                 int idx;
1660
1661                 if (start < 0x80000) {
1662                         idx = 0;
1663                         idx += (start >> 16);
1664                         return mtrr_state->fixed_ranges[idx];
1665                 } else if (start < 0xC0000) {
1666                         idx = 1 * 8;
1667                         idx += ((start - 0x80000) >> 14);
1668                         return mtrr_state->fixed_ranges[idx];
1669                 } else if (start < 0x1000000) {
1670                         idx = 3 * 8;
1671                         idx += ((start - 0xC0000) >> 12);
1672                         return mtrr_state->fixed_ranges[idx];
1673                 }
1674         }
1675
1676         /*
1677          * Look in variable ranges
1678          * Look of multiple ranges matching this address and pick type
1679          * as per MTRR precedence
1680          */
1681         if (!(mtrr_state->enabled & 2))
1682                 return mtrr_state->def_type;
1683
1684         prev_match = 0xFF;
1685         for (i = 0; i < num_var_ranges; ++i) {
1686                 unsigned short start_state, end_state;
1687
1688                 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1689                         continue;
1690
1691                 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1692                        (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1693                 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1694                        (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1695
1696                 start_state = ((start & mask) == (base & mask));
1697                 end_state = ((end & mask) == (base & mask));
1698                 if (start_state != end_state)
1699                         return 0xFE;
1700
1701                 if ((start & mask) != (base & mask))
1702                         continue;
1703
1704                 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1705                 if (prev_match == 0xFF) {
1706                         prev_match = curr_match;
1707                         continue;
1708                 }
1709
1710                 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1711                     curr_match == MTRR_TYPE_UNCACHABLE)
1712                         return MTRR_TYPE_UNCACHABLE;
1713
1714                 if ((prev_match == MTRR_TYPE_WRBACK &&
1715                      curr_match == MTRR_TYPE_WRTHROUGH) ||
1716                     (prev_match == MTRR_TYPE_WRTHROUGH &&
1717                      curr_match == MTRR_TYPE_WRBACK)) {
1718                         prev_match = MTRR_TYPE_WRTHROUGH;
1719                         curr_match = MTRR_TYPE_WRTHROUGH;
1720                 }
1721
1722                 if (prev_match != curr_match)
1723                         return MTRR_TYPE_UNCACHABLE;
1724         }
1725
1726         if (prev_match != 0xFF)
1727                 return prev_match;
1728
1729         return mtrr_state->def_type;
1730 }
1731
1732 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1733 {
1734         u8 mtrr;
1735
1736         mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1737                              (gfn << PAGE_SHIFT) + PAGE_SIZE);
1738         if (mtrr == 0xfe || mtrr == 0xff)
1739                 mtrr = MTRR_TYPE_WRBACK;
1740         return mtrr;
1741 }
1742 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1743
1744 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1745 {
1746         unsigned index;
1747         struct hlist_head *bucket;
1748         struct kvm_mmu_page *s;
1749         struct hlist_node *node, *n;
1750
1751         trace_kvm_mmu_unsync_page(sp);
1752         index = kvm_page_table_hashfn(sp->gfn);
1753         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1754         /* don't unsync if pagetable is shadowed with multiple roles */
1755         hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1756                 if (s->gfn != sp->gfn || s->role.direct)
1757                         continue;
1758                 if (s->role.word != sp->role.word)
1759                         return 1;
1760         }
1761         ++vcpu->kvm->stat.mmu_unsync;
1762         sp->unsync = 1;
1763
1764         kvm_mmu_mark_parents_unsync(vcpu, sp);
1765
1766         mmu_convert_notrap(sp);
1767         return 0;
1768 }
1769
1770 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1771                                   bool can_unsync)
1772 {
1773         struct kvm_mmu_page *shadow;
1774
1775         shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1776         if (shadow) {
1777                 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1778                         return 1;
1779                 if (shadow->unsync)
1780                         return 0;
1781                 if (can_unsync && oos_shadow)
1782                         return kvm_unsync_page(vcpu, shadow);
1783                 return 1;
1784         }
1785         return 0;
1786 }
1787
1788 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1789                     unsigned pte_access, int user_fault,
1790                     int write_fault, int dirty, int level,
1791                     gfn_t gfn, pfn_t pfn, bool speculative,
1792                     bool can_unsync, bool reset_host_protection)
1793 {
1794         u64 spte;
1795         int ret = 0;
1796
1797         /*
1798          * We don't set the accessed bit, since we sometimes want to see
1799          * whether the guest actually used the pte (in order to detect
1800          * demand paging).
1801          */
1802         spte = shadow_base_present_pte | shadow_dirty_mask;
1803         if (!speculative)
1804                 spte |= shadow_accessed_mask;
1805         if (!dirty)
1806                 pte_access &= ~ACC_WRITE_MASK;
1807         if (pte_access & ACC_EXEC_MASK)
1808                 spte |= shadow_x_mask;
1809         else
1810                 spte |= shadow_nx_mask;
1811         if (pte_access & ACC_USER_MASK)
1812                 spte |= shadow_user_mask;
1813         if (level > PT_PAGE_TABLE_LEVEL)
1814                 spte |= PT_PAGE_SIZE_MASK;
1815         if (tdp_enabled)
1816                 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1817                         kvm_is_mmio_pfn(pfn));
1818
1819         if (reset_host_protection)
1820                 spte |= SPTE_HOST_WRITEABLE;
1821
1822         spte |= (u64)pfn << PAGE_SHIFT;
1823
1824         if ((pte_access & ACC_WRITE_MASK)
1825             || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1826
1827                 if (level > PT_PAGE_TABLE_LEVEL &&
1828                     has_wrprotected_page(vcpu->kvm, gfn, level)) {
1829                         ret = 1;
1830                         spte = shadow_trap_nonpresent_pte;
1831                         goto set_pte;
1832                 }
1833
1834                 spte |= PT_WRITABLE_MASK;
1835
1836                 /*
1837                  * Optimization: for pte sync, if spte was writable the hash
1838                  * lookup is unnecessary (and expensive). Write protection
1839                  * is responsibility of mmu_get_page / kvm_sync_page.
1840                  * Same reasoning can be applied to dirty page accounting.
1841                  */
1842                 if (!can_unsync && is_writable_pte(*sptep))
1843                         goto set_pte;
1844
1845                 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1846                         pgprintk("%s: found shadow page for %lx, marking ro\n",
1847                                  __func__, gfn);
1848                         ret = 1;
1849                         pte_access &= ~ACC_WRITE_MASK;
1850                         if (is_writable_pte(spte))
1851                                 spte &= ~PT_WRITABLE_MASK;
1852                 }
1853         }
1854
1855         if (pte_access & ACC_WRITE_MASK)
1856                 mark_page_dirty(vcpu->kvm, gfn);
1857
1858 set_pte:
1859         __set_spte(sptep, spte);
1860         return ret;
1861 }
1862
1863 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1864                          unsigned pt_access, unsigned pte_access,
1865                          int user_fault, int write_fault, int dirty,
1866                          int *ptwrite, int level, gfn_t gfn,
1867                          pfn_t pfn, bool speculative,
1868                          bool reset_host_protection)
1869 {
1870         int was_rmapped = 0;
1871         int was_writable = is_writable_pte(*sptep);
1872         int rmap_count;
1873
1874         pgprintk("%s: spte %llx access %x write_fault %d"
1875                  " user_fault %d gfn %lx\n",
1876                  __func__, *sptep, pt_access,
1877                  write_fault, user_fault, gfn);
1878
1879         if (is_rmap_spte(*sptep)) {
1880                 /*
1881                  * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1882                  * the parent of the now unreachable PTE.
1883                  */
1884                 if (level > PT_PAGE_TABLE_LEVEL &&
1885                     !is_large_pte(*sptep)) {
1886                         struct kvm_mmu_page *child;
1887                         u64 pte = *sptep;
1888
1889                         child = page_header(pte & PT64_BASE_ADDR_MASK);
1890                         mmu_page_remove_parent_pte(child, sptep);
1891                 } else if (pfn != spte_to_pfn(*sptep)) {
1892                         pgprintk("hfn old %lx new %lx\n",
1893                                  spte_to_pfn(*sptep), pfn);
1894                         rmap_remove(vcpu->kvm, sptep);
1895                 } else
1896                         was_rmapped = 1;
1897         }
1898
1899         if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1900                       dirty, level, gfn, pfn, speculative, true,
1901                       reset_host_protection)) {
1902                 if (write_fault)
1903                         *ptwrite = 1;
1904                 kvm_x86_ops->tlb_flush(vcpu);
1905         }
1906
1907         pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1908         pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1909                  is_large_pte(*sptep)? "2MB" : "4kB",
1910                  *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1911                  *sptep, sptep);
1912         if (!was_rmapped && is_large_pte(*sptep))
1913                 ++vcpu->kvm->stat.lpages;
1914
1915         page_header_update_slot(vcpu->kvm, sptep, gfn);
1916         if (!was_rmapped) {
1917                 rmap_count = rmap_add(vcpu, sptep, gfn);
1918                 kvm_release_pfn_clean(pfn);
1919                 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1920                         rmap_recycle(vcpu, sptep, gfn);
1921         } else {
1922                 if (was_writable)
1923                         kvm_release_pfn_dirty(pfn);
1924                 else
1925                         kvm_release_pfn_clean(pfn);
1926         }
1927         if (speculative) {
1928                 vcpu->arch.last_pte_updated = sptep;
1929                 vcpu->arch.last_pte_gfn = gfn;
1930         }
1931 }
1932
1933 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1934 {
1935 }
1936
1937 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1938                         int level, gfn_t gfn, pfn_t pfn)
1939 {
1940         struct kvm_shadow_walk_iterator iterator;
1941         struct kvm_mmu_page *sp;
1942         int pt_write = 0;
1943         gfn_t pseudo_gfn;
1944
1945         for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1946                 if (iterator.level == level) {
1947                         mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1948                                      0, write, 1, &pt_write,
1949                                      level, gfn, pfn, false, true);
1950                         ++vcpu->stat.pf_fixed;
1951                         break;
1952                 }
1953
1954                 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1955                         pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1956                         sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1957                                               iterator.level - 1,
1958                                               1, ACC_ALL, iterator.sptep);
1959                         if (!sp) {
1960                                 pgprintk("nonpaging_map: ENOMEM\n");
1961                                 kvm_release_pfn_clean(pfn);
1962                                 return -ENOMEM;
1963                         }
1964
1965                         __set_spte(iterator.sptep,
1966                                    __pa(sp->spt)
1967                                    | PT_PRESENT_MASK | PT_WRITABLE_MASK
1968                                    | shadow_user_mask | shadow_x_mask);
1969                 }
1970         }
1971         return pt_write;
1972 }
1973
1974 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1975 {
1976         int r;
1977         int level;
1978         pfn_t pfn;
1979         unsigned long mmu_seq;
1980
1981         level = mapping_level(vcpu, gfn);
1982
1983         /*
1984          * This path builds a PAE pagetable - so we can map 2mb pages at
1985          * maximum. Therefore check if the level is larger than that.
1986          */
1987         if (level > PT_DIRECTORY_LEVEL)
1988                 level = PT_DIRECTORY_LEVEL;
1989
1990         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
1991
1992         mmu_seq = vcpu->kvm->mmu_notifier_seq;
1993         smp_rmb();
1994         pfn = gfn_to_pfn(vcpu->kvm, gfn);
1995
1996         /* mmio */
1997         if (is_error_pfn(pfn)) {
1998                 kvm_release_pfn_clean(pfn);
1999                 return 1;
2000         }
2001
2002         spin_lock(&vcpu->kvm->mmu_lock);
2003         if (mmu_notifier_retry(vcpu, mmu_seq))
2004                 goto out_unlock;
2005         kvm_mmu_free_some_pages(vcpu);
2006         r = __direct_map(vcpu, v, write, level, gfn, pfn);
2007         spin_unlock(&vcpu->kvm->mmu_lock);
2008
2009
2010         return r;
2011
2012 out_unlock:
2013         spin_unlock(&vcpu->kvm->mmu_lock);
2014         kvm_release_pfn_clean(pfn);
2015         return 0;
2016 }
2017
2018
2019 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2020 {
2021         int i;
2022         struct kvm_mmu_page *sp;
2023
2024         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2025                 return;
2026         spin_lock(&vcpu->kvm->mmu_lock);
2027         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2028                 hpa_t root = vcpu->arch.mmu.root_hpa;
2029
2030                 sp = page_header(root);
2031                 --sp->root_count;
2032                 if (!sp->root_count && sp->role.invalid)
2033                         kvm_mmu_zap_page(vcpu->kvm, sp);
2034                 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2035                 spin_unlock(&vcpu->kvm->mmu_lock);
2036                 return;
2037         }
2038         for (i = 0; i < 4; ++i) {
2039                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2040
2041                 if (root) {
2042                         root &= PT64_BASE_ADDR_MASK;
2043                         sp = page_header(root);
2044                         --sp->root_count;
2045                         if (!sp->root_count && sp->role.invalid)
2046                                 kvm_mmu_zap_page(vcpu->kvm, sp);
2047                 }
2048                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2049         }
2050         spin_unlock(&vcpu->kvm->mmu_lock);
2051         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2052 }
2053
2054 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2055 {
2056         int ret = 0;
2057
2058         if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2059                 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2060                 ret = 1;
2061         }
2062
2063         return ret;
2064 }
2065
2066 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2067 {
2068         int i;
2069         gfn_t root_gfn;
2070         struct kvm_mmu_page *sp;
2071         int direct = 0;
2072         u64 pdptr;
2073
2074         root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2075
2076         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2077                 hpa_t root = vcpu->arch.mmu.root_hpa;
2078
2079                 ASSERT(!VALID_PAGE(root));
2080                 if (tdp_enabled)
2081                         direct = 1;
2082                 if (mmu_check_root(vcpu, root_gfn))
2083                         return 1;
2084                 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2085                                       PT64_ROOT_LEVEL, direct,
2086                                       ACC_ALL, NULL);
2087                 root = __pa(sp->spt);
2088                 ++sp->root_count;
2089                 vcpu->arch.mmu.root_hpa = root;
2090                 return 0;
2091         }
2092         direct = !is_paging(vcpu);
2093         if (tdp_enabled)
2094                 direct = 1;
2095         for (i = 0; i < 4; ++i) {
2096                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2097
2098                 ASSERT(!VALID_PAGE(root));
2099                 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2100                         pdptr = kvm_pdptr_read(vcpu, i);
2101                         if (!is_present_gpte(pdptr)) {
2102                                 vcpu->arch.mmu.pae_root[i] = 0;
2103                                 continue;
2104                         }
2105                         root_gfn = pdptr >> PAGE_SHIFT;
2106                 } else if (vcpu->arch.mmu.root_level == 0)
2107                         root_gfn = 0;
2108                 if (mmu_check_root(vcpu, root_gfn))
2109                         return 1;
2110                 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2111                                       PT32_ROOT_LEVEL, direct,
2112                                       ACC_ALL, NULL);
2113                 root = __pa(sp->spt);
2114                 ++sp->root_count;
2115                 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2116         }
2117         vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2118         return 0;
2119 }
2120
2121 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2122 {
2123         int i;
2124         struct kvm_mmu_page *sp;
2125
2126         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2127                 return;
2128         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2129                 hpa_t root = vcpu->arch.mmu.root_hpa;
2130                 sp = page_header(root);
2131                 mmu_sync_children(vcpu, sp);
2132                 return;
2133         }
2134         for (i = 0; i < 4; ++i) {
2135                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2136
2137                 if (root && VALID_PAGE(root)) {
2138                         root &= PT64_BASE_ADDR_MASK;
2139                         sp = page_header(root);
2140                         mmu_sync_children(vcpu, sp);
2141                 }
2142         }
2143 }
2144
2145 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2146 {
2147         spin_lock(&vcpu->kvm->mmu_lock);
2148         mmu_sync_roots(vcpu);
2149         spin_unlock(&vcpu->kvm->mmu_lock);
2150 }
2151
2152 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2153                                   u32 access, u32 *error)
2154 {
2155         if (error)
2156                 *error = 0;
2157         return vaddr;
2158 }
2159
2160 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2161                                 u32 error_code)
2162 {
2163         gfn_t gfn;
2164         int r;
2165
2166         pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2167         r = mmu_topup_memory_caches(vcpu);
2168         if (r)
2169                 return r;
2170
2171         ASSERT(vcpu);
2172         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2173
2174         gfn = gva >> PAGE_SHIFT;
2175
2176         return nonpaging_map(vcpu, gva & PAGE_MASK,
2177                              error_code & PFERR_WRITE_MASK, gfn);
2178 }
2179
2180 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2181                                 u32 error_code)
2182 {
2183         pfn_t pfn;
2184         int r;
2185         int level;
2186         gfn_t gfn = gpa >> PAGE_SHIFT;
2187         unsigned long mmu_seq;
2188
2189         ASSERT(vcpu);
2190         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2191
2192         r = mmu_topup_memory_caches(vcpu);
2193         if (r)
2194                 return r;
2195
2196         level = mapping_level(vcpu, gfn);
2197
2198         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2199
2200         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2201         smp_rmb();
2202         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2203         if (is_error_pfn(pfn)) {
2204                 kvm_release_pfn_clean(pfn);
2205                 return 1;
2206         }
2207         spin_lock(&vcpu->kvm->mmu_lock);
2208         if (mmu_notifier_retry(vcpu, mmu_seq))
2209                 goto out_unlock;
2210         kvm_mmu_free_some_pages(vcpu);
2211         r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2212                          level, gfn, pfn);
2213         spin_unlock(&vcpu->kvm->mmu_lock);
2214
2215         return r;
2216
2217 out_unlock:
2218         spin_unlock(&vcpu->kvm->mmu_lock);
2219         kvm_release_pfn_clean(pfn);
2220         return 0;
2221 }
2222
2223 static void nonpaging_free(struct kvm_vcpu *vcpu)
2224 {
2225         mmu_free_roots(vcpu);
2226 }
2227
2228 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2229 {
2230         struct kvm_mmu *context = &vcpu->arch.mmu;
2231
2232         context->new_cr3 = nonpaging_new_cr3;
2233         context->page_fault = nonpaging_page_fault;
2234         context->gva_to_gpa = nonpaging_gva_to_gpa;
2235         context->free = nonpaging_free;
2236         context->prefetch_page = nonpaging_prefetch_page;
2237         context->sync_page = nonpaging_sync_page;
2238         context->invlpg = nonpaging_invlpg;
2239         context->root_level = 0;
2240         context->shadow_root_level = PT32E_ROOT_LEVEL;
2241         context->root_hpa = INVALID_PAGE;
2242         return 0;
2243 }
2244
2245 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2246 {
2247         ++vcpu->stat.tlb_flush;
2248         kvm_x86_ops->tlb_flush(vcpu);
2249 }
2250
2251 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2252 {
2253         pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2254         mmu_free_roots(vcpu);
2255 }
2256
2257 static void inject_page_fault(struct kvm_vcpu *vcpu,
2258                               u64 addr,
2259                               u32 err_code)
2260 {
2261         kvm_inject_page_fault(vcpu, addr, err_code);
2262 }
2263
2264 static void paging_free(struct kvm_vcpu *vcpu)
2265 {
2266         nonpaging_free(vcpu);
2267 }
2268
2269 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2270 {
2271         int bit7;
2272
2273         bit7 = (gpte >> 7) & 1;
2274         return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2275 }
2276
2277 #define PTTYPE 64
2278 #include "paging_tmpl.h"
2279 #undef PTTYPE
2280
2281 #define PTTYPE 32
2282 #include "paging_tmpl.h"
2283 #undef PTTYPE
2284
2285 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2286 {
2287         struct kvm_mmu *context = &vcpu->arch.mmu;
2288         int maxphyaddr = cpuid_maxphyaddr(vcpu);
2289         u64 exb_bit_rsvd = 0;
2290
2291         if (!is_nx(vcpu))
2292                 exb_bit_rsvd = rsvd_bits(63, 63);
2293         switch (level) {
2294         case PT32_ROOT_LEVEL:
2295                 /* no rsvd bits for 2 level 4K page table entries */
2296                 context->rsvd_bits_mask[0][1] = 0;
2297                 context->rsvd_bits_mask[0][0] = 0;
2298                 if (is_cpuid_PSE36())
2299                         /* 36bits PSE 4MB page */
2300                         context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2301                 else
2302                         /* 32 bits PSE 4MB page */
2303                         context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2304                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2305                 break;
2306         case PT32E_ROOT_LEVEL:
2307                 context->rsvd_bits_mask[0][2] =
2308                         rsvd_bits(maxphyaddr, 63) |
2309                         rsvd_bits(7, 8) | rsvd_bits(1, 2);      /* PDPTE */
2310                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2311                         rsvd_bits(maxphyaddr, 62);      /* PDE */
2312                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2313                         rsvd_bits(maxphyaddr, 62);      /* PTE */
2314                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2315                         rsvd_bits(maxphyaddr, 62) |
2316                         rsvd_bits(13, 20);              /* large page */
2317                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2318                 break;
2319         case PT64_ROOT_LEVEL:
2320                 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2321                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2322                 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2323                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2324                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2325                         rsvd_bits(maxphyaddr, 51);
2326                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2327                         rsvd_bits(maxphyaddr, 51);
2328                 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2329                 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2330                         rsvd_bits(maxphyaddr, 51) |
2331                         rsvd_bits(13, 29);
2332                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2333                         rsvd_bits(maxphyaddr, 51) |
2334                         rsvd_bits(13, 20);              /* large page */
2335                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2336                 break;
2337         }
2338 }
2339
2340 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2341 {
2342         struct kvm_mmu *context = &vcpu->arch.mmu;
2343
2344         ASSERT(is_pae(vcpu));
2345         context->new_cr3 = paging_new_cr3;
2346         context->page_fault = paging64_page_fault;
2347         context->gva_to_gpa = paging64_gva_to_gpa;
2348         context->prefetch_page = paging64_prefetch_page;
2349         context->sync_page = paging64_sync_page;
2350         context->invlpg = paging64_invlpg;
2351         context->free = paging_free;
2352         context->root_level = level;
2353         context->shadow_root_level = level;
2354         context->root_hpa = INVALID_PAGE;
2355         return 0;
2356 }
2357
2358 static int paging64_init_context(struct kvm_vcpu *vcpu)
2359 {
2360         reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2361         return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2362 }
2363
2364 static int paging32_init_context(struct kvm_vcpu *vcpu)
2365 {
2366         struct kvm_mmu *context = &vcpu->arch.mmu;
2367
2368         reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2369         context->new_cr3 = paging_new_cr3;
2370         context->page_fault = paging32_page_fault;
2371         context->gva_to_gpa = paging32_gva_to_gpa;
2372         context->free = paging_free;
2373         context->prefetch_page = paging32_prefetch_page;
2374         context->sync_page = paging32_sync_page;
2375         context->invlpg = paging32_invlpg;
2376         context->root_level = PT32_ROOT_LEVEL;
2377         context->shadow_root_level = PT32E_ROOT_LEVEL;
2378         context->root_hpa = INVALID_PAGE;
2379         return 0;
2380 }
2381
2382 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2383 {
2384         reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2385         return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2386 }
2387
2388 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2389 {
2390         struct kvm_mmu *context = &vcpu->arch.mmu;
2391
2392         context->new_cr3 = nonpaging_new_cr3;
2393         context->page_fault = tdp_page_fault;
2394         context->free = nonpaging_free;
2395         context->prefetch_page = nonpaging_prefetch_page;
2396         context->sync_page = nonpaging_sync_page;
2397         context->invlpg = nonpaging_invlpg;
2398         context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2399         context->root_hpa = INVALID_PAGE;
2400
2401         if (!is_paging(vcpu)) {
2402                 context->gva_to_gpa = nonpaging_gva_to_gpa;
2403                 context->root_level = 0;
2404         } else if (is_long_mode(vcpu)) {
2405                 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2406                 context->gva_to_gpa = paging64_gva_to_gpa;
2407                 context->root_level = PT64_ROOT_LEVEL;
2408         } else if (is_pae(vcpu)) {
2409                 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2410                 context->gva_to_gpa = paging64_gva_to_gpa;
2411                 context->root_level = PT32E_ROOT_LEVEL;
2412         } else {
2413                 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2414                 context->gva_to_gpa = paging32_gva_to_gpa;
2415                 context->root_level = PT32_ROOT_LEVEL;
2416         }
2417
2418         return 0;
2419 }
2420
2421 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2422 {
2423         int r;
2424
2425         ASSERT(vcpu);
2426         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2427
2428         if (!is_paging(vcpu))
2429                 r = nonpaging_init_context(vcpu);
2430         else if (is_long_mode(vcpu))
2431                 r = paging64_init_context(vcpu);
2432         else if (is_pae(vcpu))
2433                 r = paging32E_init_context(vcpu);
2434         else
2435                 r = paging32_init_context(vcpu);
2436
2437         vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2438
2439         return r;
2440 }
2441
2442 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2443 {
2444         vcpu->arch.update_pte.pfn = bad_pfn;
2445
2446         if (tdp_enabled)
2447                 return init_kvm_tdp_mmu(vcpu);
2448         else
2449                 return init_kvm_softmmu(vcpu);
2450 }
2451
2452 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2453 {
2454         ASSERT(vcpu);
2455         if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2456                 vcpu->arch.mmu.free(vcpu);
2457                 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2458         }
2459 }
2460
2461 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2462 {
2463         destroy_kvm_mmu(vcpu);
2464         return init_kvm_mmu(vcpu);
2465 }
2466 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2467
2468 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2469 {
2470         int r;
2471
2472         r = mmu_topup_memory_caches(vcpu);
2473         if (r)
2474                 goto out;
2475         spin_lock(&vcpu->kvm->mmu_lock);
2476         kvm_mmu_free_some_pages(vcpu);
2477         r = mmu_alloc_roots(vcpu);
2478         mmu_sync_roots(vcpu);
2479         spin_unlock(&vcpu->kvm->mmu_lock);
2480         if (r)
2481                 goto out;
2482         /* set_cr3() should ensure TLB has been flushed */
2483         kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2484 out:
2485         return r;
2486 }
2487 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2488
2489 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2490 {
2491         mmu_free_roots(vcpu);
2492 }
2493
2494 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2495                                   struct kvm_mmu_page *sp,
2496                                   u64 *spte)
2497 {
2498         u64 pte;
2499         struct kvm_mmu_page *child;
2500
2501         pte = *spte;
2502         if (is_shadow_present_pte(pte)) {
2503                 if (is_last_spte(pte, sp->role.level))
2504                         rmap_remove(vcpu->kvm, spte);
2505                 else {
2506                         child = page_header(pte & PT64_BASE_ADDR_MASK);
2507                         mmu_page_remove_parent_pte(child, spte);
2508                 }
2509         }
2510         __set_spte(spte, shadow_trap_nonpresent_pte);
2511         if (is_large_pte(pte))
2512                 --vcpu->kvm->stat.lpages;
2513 }
2514
2515 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2516                                   struct kvm_mmu_page *sp,
2517                                   u64 *spte,
2518                                   const void *new)
2519 {
2520         if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2521                 ++vcpu->kvm->stat.mmu_pde_zapped;
2522                 return;
2523         }
2524
2525         ++vcpu->kvm->stat.mmu_pte_updated;
2526         if (sp->role.glevels == PT32_ROOT_LEVEL)
2527                 paging32_update_pte(vcpu, sp, spte, new);
2528         else
2529                 paging64_update_pte(vcpu, sp, spte, new);
2530 }
2531
2532 static bool need_remote_flush(u64 old, u64 new)
2533 {
2534         if (!is_shadow_present_pte(old))
2535                 return false;
2536         if (!is_shadow_present_pte(new))
2537                 return true;
2538         if ((old ^ new) & PT64_BASE_ADDR_MASK)
2539                 return true;
2540         old ^= PT64_NX_MASK;
2541         new ^= PT64_NX_MASK;
2542         return (old & ~new & PT64_PERM_MASK) != 0;
2543 }
2544
2545 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2546 {
2547         if (need_remote_flush(old, new))
2548                 kvm_flush_remote_tlbs(vcpu->kvm);
2549         else
2550                 kvm_mmu_flush_tlb(vcpu);
2551 }
2552
2553 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2554 {
2555         u64 *spte = vcpu->arch.last_pte_updated;
2556
2557         return !!(spte && (*spte & shadow_accessed_mask));
2558 }
2559
2560 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2561                                           const u8 *new, int bytes)
2562 {
2563         gfn_t gfn;
2564         int r;
2565         u64 gpte = 0;
2566         pfn_t pfn;
2567
2568         if (bytes != 4 && bytes != 8)
2569                 return;
2570
2571         /*
2572          * Assume that the pte write on a page table of the same type
2573          * as the current vcpu paging mode.  This is nearly always true
2574          * (might be false while changing modes).  Note it is verified later
2575          * by update_pte().
2576          */
2577         if (is_pae(vcpu)) {
2578                 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2579                 if ((bytes == 4) && (gpa % 4 == 0)) {
2580                         r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2581                         if (r)
2582                                 return;
2583                         memcpy((void *)&gpte + (gpa % 8), new, 4);
2584                 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2585                         memcpy((void *)&gpte, new, 8);
2586                 }
2587         } else {
2588                 if ((bytes == 4) && (gpa % 4 == 0))
2589                         memcpy((void *)&gpte, new, 4);
2590         }
2591         if (!is_present_gpte(gpte))
2592                 return;
2593         gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2594
2595         vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2596         smp_rmb();
2597         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2598
2599         if (is_error_pfn(pfn)) {
2600                 kvm_release_pfn_clean(pfn);
2601                 return;
2602         }
2603         vcpu->arch.update_pte.gfn = gfn;
2604         vcpu->arch.update_pte.pfn = pfn;
2605 }
2606
2607 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2608 {
2609         u64 *spte = vcpu->arch.last_pte_updated;
2610
2611         if (spte
2612             && vcpu->arch.last_pte_gfn == gfn
2613             && shadow_accessed_mask
2614             && !(*spte & shadow_accessed_mask)
2615             && is_shadow_present_pte(*spte))
2616                 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2617 }
2618
2619 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2620                        const u8 *new, int bytes,
2621                        bool guest_initiated)
2622 {
2623         gfn_t gfn = gpa >> PAGE_SHIFT;
2624         struct kvm_mmu_page *sp;
2625         struct hlist_node *node, *n;
2626         struct hlist_head *bucket;
2627         unsigned index;
2628         u64 entry, gentry;
2629         u64 *spte;
2630         unsigned offset = offset_in_page(gpa);
2631         unsigned pte_size;
2632         unsigned page_offset;
2633         unsigned misaligned;
2634         unsigned quadrant;
2635         int level;
2636         int flooded = 0;
2637         int npte;
2638         int r;
2639
2640         pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2641         mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
2642         spin_lock(&vcpu->kvm->mmu_lock);
2643         kvm_mmu_access_page(vcpu, gfn);
2644         kvm_mmu_free_some_pages(vcpu);
2645         ++vcpu->kvm->stat.mmu_pte_write;
2646         kvm_mmu_audit(vcpu, "pre pte write");
2647         if (guest_initiated) {
2648                 if (gfn == vcpu->arch.last_pt_write_gfn
2649                     && !last_updated_pte_accessed(vcpu)) {
2650                         ++vcpu->arch.last_pt_write_count;
2651                         if (vcpu->arch.last_pt_write_count >= 3)
2652                                 flooded = 1;
2653                 } else {
2654                         vcpu->arch.last_pt_write_gfn = gfn;
2655                         vcpu->arch.last_pt_write_count = 1;
2656                         vcpu->arch.last_pte_updated = NULL;
2657                 }
2658         }
2659         index = kvm_page_table_hashfn(gfn);
2660         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2661         hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2662                 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2663                         continue;
2664                 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
2665                 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2666                 misaligned |= bytes < 4;
2667                 if (misaligned || flooded) {
2668                         /*
2669                          * Misaligned accesses are too much trouble to fix
2670                          * up; also, they usually indicate a page is not used
2671                          * as a page table.
2672                          *
2673                          * If we're seeing too many writes to a page,
2674                          * it may no longer be a page table, or we may be
2675                          * forking, in which case it is better to unmap the
2676                          * page.
2677                          */
2678                         pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2679                                  gpa, bytes, sp->role.word);
2680                         if (kvm_mmu_zap_page(vcpu->kvm, sp))
2681                                 n = bucket->first;
2682                         ++vcpu->kvm->stat.mmu_flooded;
2683                         continue;
2684                 }
2685                 page_offset = offset;
2686                 level = sp->role.level;
2687                 npte = 1;
2688                 if (sp->role.glevels == PT32_ROOT_LEVEL) {
2689                         page_offset <<= 1;      /* 32->64 */
2690                         /*
2691                          * A 32-bit pde maps 4MB while the shadow pdes map
2692                          * only 2MB.  So we need to double the offset again
2693                          * and zap two pdes instead of one.
2694                          */
2695                         if (level == PT32_ROOT_LEVEL) {
2696                                 page_offset &= ~7; /* kill rounding error */
2697                                 page_offset <<= 1;
2698                                 npte = 2;
2699                         }
2700                         quadrant = page_offset >> PAGE_SHIFT;
2701                         page_offset &= ~PAGE_MASK;
2702                         if (quadrant != sp->role.quadrant)
2703                                 continue;
2704                 }
2705                 spte = &sp->spt[page_offset / sizeof(*spte)];
2706                 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2707                         gentry = 0;
2708                         r = kvm_read_guest_atomic(vcpu->kvm,
2709                                                   gpa & ~(u64)(pte_size - 1),
2710                                                   &gentry, pte_size);
2711                         new = (const void *)&gentry;
2712                         if (r < 0)
2713                                 new = NULL;
2714                 }
2715                 while (npte--) {
2716                         entry = *spte;
2717                         mmu_pte_write_zap_pte(vcpu, sp, spte);
2718                         if (new)
2719                                 mmu_pte_write_new_pte(vcpu, sp, spte, new);
2720                         mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2721                         ++spte;
2722                 }
2723         }
2724         kvm_mmu_audit(vcpu, "post pte write");
2725         spin_unlock(&vcpu->kvm->mmu_lock);
2726         if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2727                 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2728                 vcpu->arch.update_pte.pfn = bad_pfn;
2729         }
2730 }
2731
2732 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2733 {
2734         gpa_t gpa;
2735         int r;
2736
2737         if (tdp_enabled)
2738                 return 0;
2739
2740         gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2741
2742         spin_lock(&vcpu->kvm->mmu_lock);
2743         r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2744         spin_unlock(&vcpu->kvm->mmu_lock);
2745         return r;
2746 }
2747 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2748
2749 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2750 {
2751         while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2752                !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2753                 struct kvm_mmu_page *sp;
2754
2755                 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2756                                   struct kvm_mmu_page, link);
2757                 kvm_mmu_zap_page(vcpu->kvm, sp);
2758                 ++vcpu->kvm->stat.mmu_recycled;
2759         }
2760 }
2761
2762 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2763 {
2764         int r;
2765         enum emulation_result er;
2766
2767         r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2768         if (r < 0)
2769                 goto out;
2770
2771         if (!r) {
2772                 r = 1;
2773                 goto out;
2774         }
2775
2776         r = mmu_topup_memory_caches(vcpu);
2777         if (r)
2778                 goto out;
2779
2780         er = emulate_instruction(vcpu, cr2, error_code, 0);
2781
2782         switch (er) {
2783         case EMULATE_DONE:
2784                 return 1;
2785         case EMULATE_DO_MMIO:
2786                 ++vcpu->stat.mmio_exits;
2787                 return 0;
2788         case EMULATE_FAIL:
2789                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2790                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
2791                 vcpu->run->internal.ndata = 0;
2792                 return 0;
2793         default:
2794                 BUG();
2795         }
2796 out:
2797         return r;
2798 }
2799 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2800
2801 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2802 {
2803         vcpu->arch.mmu.invlpg(vcpu, gva);
2804         kvm_mmu_flush_tlb(vcpu);
2805         ++vcpu->stat.invlpg;
2806 }
2807 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2808
2809 void kvm_enable_tdp(void)
2810 {
2811         tdp_enabled = true;
2812 }
2813 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2814
2815 void kvm_disable_tdp(void)
2816 {
2817         tdp_enabled = false;
2818 }
2819 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2820
2821 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2822 {
2823         free_page((unsigned long)vcpu->arch.mmu.pae_root);
2824 }
2825
2826 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2827 {
2828         struct page *page;
2829         int i;
2830
2831         ASSERT(vcpu);
2832
2833         /*
2834          * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2835          * Therefore we need to allocate shadow page tables in the first
2836          * 4GB of memory, which happens to fit the DMA32 zone.
2837          */
2838         page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2839         if (!page)
2840                 return -ENOMEM;
2841
2842         vcpu->arch.mmu.pae_root = page_address(page);
2843         for (i = 0; i < 4; ++i)
2844                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2845
2846         return 0;
2847 }
2848
2849 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2850 {
2851         ASSERT(vcpu);
2852         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2853
2854         return alloc_mmu_pages(vcpu);
2855 }
2856
2857 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2858 {
2859         ASSERT(vcpu);
2860         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2861
2862         return init_kvm_mmu(vcpu);
2863 }
2864
2865 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2866 {
2867         ASSERT(vcpu);
2868
2869         destroy_kvm_mmu(vcpu);
2870         free_mmu_pages(vcpu);
2871         mmu_free_memory_caches(vcpu);
2872 }
2873
2874 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2875 {
2876         struct kvm_mmu_page *sp;
2877
2878         list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2879                 int i;
2880                 u64 *pt;
2881
2882                 if (!test_bit(slot, sp->slot_bitmap))
2883                         continue;
2884
2885                 pt = sp->spt;
2886                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2887                         /* avoid RMW */
2888                         if (pt[i] & PT_WRITABLE_MASK)
2889                                 pt[i] &= ~PT_WRITABLE_MASK;
2890         }
2891         kvm_flush_remote_tlbs(kvm);
2892 }
2893
2894 void kvm_mmu_zap_all(struct kvm *kvm)
2895 {
2896         struct kvm_mmu_page *sp, *node;
2897
2898         spin_lock(&kvm->mmu_lock);
2899         list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2900                 if (kvm_mmu_zap_page(kvm, sp))
2901                         node = container_of(kvm->arch.active_mmu_pages.next,
2902                                             struct kvm_mmu_page, link);
2903         spin_unlock(&kvm->mmu_lock);
2904
2905         kvm_flush_remote_tlbs(kvm);
2906 }
2907
2908 static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
2909 {
2910         struct kvm_mmu_page *page;
2911
2912         page = container_of(kvm->arch.active_mmu_pages.prev,
2913                             struct kvm_mmu_page, link);
2914         kvm_mmu_zap_page(kvm, page);
2915 }
2916
2917 static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2918 {
2919         struct kvm *kvm;
2920         struct kvm *kvm_freed = NULL;
2921         int cache_count = 0;
2922
2923         spin_lock(&kvm_lock);
2924
2925         list_for_each_entry(kvm, &vm_list, vm_list) {
2926                 int npages, idx;
2927
2928                 idx = srcu_read_lock(&kvm->srcu);
2929                 spin_lock(&kvm->mmu_lock);
2930                 npages = kvm->arch.n_alloc_mmu_pages -
2931                          kvm->arch.n_free_mmu_pages;
2932                 cache_count += npages;
2933                 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2934                         kvm_mmu_remove_one_alloc_mmu_page(kvm);
2935                         cache_count--;
2936                         kvm_freed = kvm;
2937                 }
2938                 nr_to_scan--;
2939
2940                 spin_unlock(&kvm->mmu_lock);
2941                 srcu_read_unlock(&kvm->srcu, idx);
2942         }
2943         if (kvm_freed)
2944                 list_move_tail(&kvm_freed->vm_list, &vm_list);
2945
2946         spin_unlock(&kvm_lock);
2947
2948         return cache_count;
2949 }
2950
2951 static struct shrinker mmu_shrinker = {
2952         .shrink = mmu_shrink,
2953         .seeks = DEFAULT_SEEKS * 10,
2954 };
2955
2956 static void mmu_destroy_caches(void)
2957 {
2958         if (pte_chain_cache)
2959                 kmem_cache_destroy(pte_chain_cache);
2960         if (rmap_desc_cache)
2961                 kmem_cache_destroy(rmap_desc_cache);
2962         if (mmu_page_header_cache)
2963                 kmem_cache_destroy(mmu_page_header_cache);
2964 }
2965
2966 void kvm_mmu_module_exit(void)
2967 {
2968         mmu_destroy_caches();
2969         unregister_shrinker(&mmu_shrinker);
2970 }
2971
2972 int kvm_mmu_module_init(void)
2973 {
2974         pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2975                                             sizeof(struct kvm_pte_chain),
2976                                             0, 0, NULL);
2977         if (!pte_chain_cache)
2978                 goto nomem;
2979         rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2980                                             sizeof(struct kvm_rmap_desc),
2981                                             0, 0, NULL);
2982         if (!rmap_desc_cache)
2983                 goto nomem;
2984
2985         mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2986                                                   sizeof(struct kvm_mmu_page),
2987                                                   0, 0, NULL);
2988         if (!mmu_page_header_cache)
2989                 goto nomem;
2990
2991         register_shrinker(&mmu_shrinker);
2992
2993         return 0;
2994
2995 nomem:
2996         mmu_destroy_caches();
2997         return -ENOMEM;
2998 }
2999
3000 /*
3001  * Caculate mmu pages needed for kvm.
3002  */
3003 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3004 {
3005         int i;
3006         unsigned int nr_mmu_pages;
3007         unsigned int  nr_pages = 0;
3008         struct kvm_memslots *slots;
3009
3010         slots = rcu_dereference(kvm->memslots);
3011         for (i = 0; i < slots->nmemslots; i++)
3012                 nr_pages += slots->memslots[i].npages;
3013
3014         nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3015         nr_mmu_pages = max(nr_mmu_pages,
3016                         (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3017
3018         return nr_mmu_pages;
3019 }
3020
3021 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3022                                 unsigned len)
3023 {
3024         if (len > buffer->len)
3025                 return NULL;
3026         return buffer->ptr;
3027 }
3028
3029 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3030                                 unsigned len)
3031 {
3032         void *ret;
3033
3034         ret = pv_mmu_peek_buffer(buffer, len);
3035         if (!ret)
3036                 return ret;
3037         buffer->ptr += len;
3038         buffer->len -= len;
3039         buffer->processed += len;
3040         return ret;
3041 }
3042
3043 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3044                              gpa_t addr, gpa_t value)
3045 {
3046         int bytes = 8;
3047         int r;
3048
3049         if (!is_long_mode(vcpu) && !is_pae(vcpu))
3050                 bytes = 4;
3051
3052         r = mmu_topup_memory_caches(vcpu);
3053         if (r)
3054                 return r;
3055
3056         if (!emulator_write_phys(vcpu, addr, &value, bytes))
3057                 return -EFAULT;
3058
3059         return 1;
3060 }
3061
3062 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3063 {
3064         kvm_set_cr3(vcpu, vcpu->arch.cr3);
3065         return 1;
3066 }
3067
3068 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3069 {
3070         spin_lock(&vcpu->kvm->mmu_lock);
3071         mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3072         spin_unlock(&vcpu->kvm->mmu_lock);
3073         return 1;
3074 }
3075
3076 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3077                              struct kvm_pv_mmu_op_buffer *buffer)
3078 {
3079         struct kvm_mmu_op_header *header;
3080
3081         header = pv_mmu_peek_buffer(buffer, sizeof *header);
3082         if (!header)
3083                 return 0;
3084         switch (header->op) {
3085         case KVM_MMU_OP_WRITE_PTE: {
3086                 struct kvm_mmu_op_write_pte *wpte;
3087
3088                 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3089                 if (!wpte)
3090                         return 0;
3091                 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3092                                         wpte->pte_val);
3093         }
3094         case KVM_MMU_OP_FLUSH_TLB: {
3095                 struct kvm_mmu_op_flush_tlb *ftlb;
3096
3097                 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3098                 if (!ftlb)
3099                         return 0;
3100                 return kvm_pv_mmu_flush_tlb(vcpu);
3101         }
3102         case KVM_MMU_OP_RELEASE_PT: {
3103                 struct kvm_mmu_op_release_pt *rpt;
3104
3105                 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3106                 if (!rpt)
3107                         return 0;
3108                 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3109         }
3110         default: return 0;
3111         }
3112 }
3113
3114 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3115                   gpa_t addr, unsigned long *ret)
3116 {
3117         int r;
3118         struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3119
3120         buffer->ptr = buffer->buf;
3121         buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3122         buffer->processed = 0;
3123
3124         r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3125         if (r)
3126                 goto out;
3127
3128         while (buffer->len) {
3129                 r = kvm_pv_mmu_op_one(vcpu, buffer);
3130                 if (r < 0)
3131                         goto out;
3132                 if (r == 0)
3133                         break;
3134         }
3135
3136         r = 1;
3137 out:
3138         *ret = buffer->processed;
3139         return r;
3140 }
3141
3142 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3143 {
3144         struct kvm_shadow_walk_iterator iterator;
3145         int nr_sptes = 0;
3146
3147         spin_lock(&vcpu->kvm->mmu_lock);
3148         for_each_shadow_entry(vcpu, addr, iterator) {
3149                 sptes[iterator.level-1] = *iterator.sptep;
3150                 nr_sptes++;
3151                 if (!is_shadow_present_pte(*iterator.sptep))
3152                         break;
3153         }
3154         spin_unlock(&vcpu->kvm->mmu_lock);
3155
3156         return nr_sptes;
3157 }
3158 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3159
3160 #ifdef AUDIT
3161
3162 static const char *audit_msg;
3163
3164 static gva_t canonicalize(gva_t gva)
3165 {
3166 #ifdef CONFIG_X86_64
3167         gva = (long long)(gva << 16) >> 16;
3168 #endif
3169         return gva;
3170 }
3171
3172
3173 typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp,
3174                                  u64 *sptep);
3175
3176 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3177                             inspect_spte_fn fn)
3178 {
3179         int i;
3180
3181         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3182                 u64 ent = sp->spt[i];
3183
3184                 if (is_shadow_present_pte(ent)) {
3185                         if (!is_last_spte(ent, sp->role.level)) {
3186                                 struct kvm_mmu_page *child;
3187                                 child = page_header(ent & PT64_BASE_ADDR_MASK);
3188                                 __mmu_spte_walk(kvm, child, fn);
3189                         } else
3190                                 fn(kvm, sp, &sp->spt[i]);
3191                 }
3192         }
3193 }
3194
3195 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3196 {
3197         int i;
3198         struct kvm_mmu_page *sp;
3199
3200         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3201                 return;
3202         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3203                 hpa_t root = vcpu->arch.mmu.root_hpa;
3204                 sp = page_header(root);
3205                 __mmu_spte_walk(vcpu->kvm, sp, fn);
3206                 return;
3207         }
3208         for (i = 0; i < 4; ++i) {
3209                 hpa_t root = vcpu->arch.mmu.pae_root[i];
3210
3211                 if (root && VALID_PAGE(root)) {
3212                         root &= PT64_BASE_ADDR_MASK;
3213                         sp = page_header(root);
3214                         __mmu_spte_walk(vcpu->kvm, sp, fn);
3215                 }
3216         }
3217         return;
3218 }
3219
3220 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3221                                 gva_t va, int level)
3222 {
3223         u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3224         int i;
3225         gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3226
3227         for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3228                 u64 ent = pt[i];
3229
3230                 if (ent == shadow_trap_nonpresent_pte)
3231                         continue;
3232
3233                 va = canonicalize(va);
3234                 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3235                         audit_mappings_page(vcpu, ent, va, level - 1);
3236                 else {
3237                         gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3238                         gfn_t gfn = gpa >> PAGE_SHIFT;
3239                         pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3240                         hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3241
3242                         if (is_error_pfn(pfn)) {
3243                                 kvm_release_pfn_clean(pfn);
3244                                 continue;
3245                         }
3246
3247                         if (is_shadow_present_pte(ent)
3248                             && (ent & PT64_BASE_ADDR_MASK) != hpa)
3249                                 printk(KERN_ERR "xx audit error: (%s) levels %d"
3250                                        " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3251                                        audit_msg, vcpu->arch.mmu.root_level,
3252                                        va, gpa, hpa, ent,
3253                                        is_shadow_present_pte(ent));
3254                         else if (ent == shadow_notrap_nonpresent_pte
3255                                  && !is_error_hpa(hpa))
3256                                 printk(KERN_ERR "audit: (%s) notrap shadow,"
3257                                        " valid guest gva %lx\n", audit_msg, va);
3258                         kvm_release_pfn_clean(pfn);
3259
3260                 }
3261         }
3262 }
3263
3264 static void audit_mappings(struct kvm_vcpu *vcpu)
3265 {
3266         unsigned i;
3267
3268         if (vcpu->arch.mmu.root_level == 4)
3269                 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3270         else
3271                 for (i = 0; i < 4; ++i)
3272                         if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3273                                 audit_mappings_page(vcpu,
3274                                                     vcpu->arch.mmu.pae_root[i],
3275                                                     i << 30,
3276                                                     2);
3277 }
3278
3279 static int count_rmaps(struct kvm_vcpu *vcpu)
3280 {
3281         int nmaps = 0;
3282         int i, j, k, idx;
3283
3284         idx = srcu_read_lock(&kvm->srcu);
3285         slots = rcu_dereference(kvm->memslots);
3286         for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3287                 struct kvm_memory_slot *m = &slots->memslots[i];
3288                 struct kvm_rmap_desc *d;
3289
3290                 for (j = 0; j < m->npages; ++j) {
3291                         unsigned long *rmapp = &m->rmap[j];
3292
3293                         if (!*rmapp)
3294                                 continue;
3295                         if (!(*rmapp & 1)) {
3296                                 ++nmaps;
3297                                 continue;
3298                         }
3299                         d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3300                         while (d) {
3301                                 for (k = 0; k < RMAP_EXT; ++k)
3302                                         if (d->sptes[k])
3303                                                 ++nmaps;
3304                                         else
3305                                                 break;
3306                                 d = d->more;
3307                         }
3308                 }
3309         }
3310         srcu_read_unlock(&kvm->srcu, idx);
3311         return nmaps;
3312 }
3313
3314 void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep)
3315 {
3316         unsigned long *rmapp;
3317         struct kvm_mmu_page *rev_sp;
3318         gfn_t gfn;
3319
3320         if (*sptep & PT_WRITABLE_MASK) {
3321                 rev_sp = page_header(__pa(sptep));
3322                 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3323
3324                 if (!gfn_to_memslot(kvm, gfn)) {
3325                         if (!printk_ratelimit())
3326                                 return;
3327                         printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3328                                          audit_msg, gfn);
3329                         printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3330                                         audit_msg, sptep - rev_sp->spt,
3331                                         rev_sp->gfn);
3332                         dump_stack();
3333                         return;
3334                 }
3335
3336                 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3337                                     is_large_pte(*sptep));
3338                 if (!*rmapp) {
3339                         if (!printk_ratelimit())
3340                                 return;
3341                         printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3342                                          audit_msg, *sptep);
3343                         dump_stack();
3344                 }
3345         }
3346
3347 }
3348
3349 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3350 {
3351         mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3352 }
3353
3354 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3355 {
3356         struct kvm_mmu_page *sp;
3357         int i;
3358
3359         list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3360                 u64 *pt = sp->spt;
3361
3362                 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3363                         continue;
3364
3365                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3366                         u64 ent = pt[i];
3367
3368                         if (!(ent & PT_PRESENT_MASK))
3369                                 continue;
3370                         if (!(ent & PT_WRITABLE_MASK))
3371                                 continue;
3372                         inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]);
3373                 }
3374         }
3375         return;
3376 }
3377
3378 static void audit_rmap(struct kvm_vcpu *vcpu)
3379 {
3380         check_writable_mappings_rmap(vcpu);
3381         count_rmaps(vcpu);
3382 }
3383
3384 static void audit_write_protection(struct kvm_vcpu *vcpu)
3385 {
3386         struct kvm_mmu_page *sp;
3387         struct kvm_memory_slot *slot;
3388         unsigned long *rmapp;
3389         u64 *spte;
3390         gfn_t gfn;
3391
3392         list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3393                 if (sp->role.direct)
3394                         continue;
3395                 if (sp->unsync)
3396                         continue;
3397
3398                 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3399                 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3400                 rmapp = &slot->rmap[gfn - slot->base_gfn];
3401
3402                 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3403                 while (spte) {
3404                         if (*spte & PT_WRITABLE_MASK)
3405                                 printk(KERN_ERR "%s: (%s) shadow page has "
3406                                 "writable mappings: gfn %lx role %x\n",
3407                                __func__, audit_msg, sp->gfn,
3408                                sp->role.word);
3409                         spte = rmap_next(vcpu->kvm, rmapp, spte);
3410                 }
3411         }
3412 }
3413
3414 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3415 {
3416         int olddbg = dbg;
3417
3418         dbg = 0;
3419         audit_msg = msg;
3420         audit_rmap(vcpu);
3421         audit_write_protection(vcpu);
3422         if (strcmp("pre pte write", audit_msg) != 0)
3423                 audit_mappings(vcpu);
3424         audit_writable_sptes_have_rmaps(vcpu);
3425         dbg = olddbg;
3426 }
3427
3428 #endif