KVM: MMU: invalidate and flush on spte small->large page size change
[safe/jmp/linux-2.6] / arch / x86 / kvm / mmu.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * This module enables machines with Intel VT-x extensions to run virtual
5  * machines without emulation or binary translation.
6  *
7  * MMU support
8  *
9  * Copyright (C) 2006 Qumranet, Inc.
10  *
11  * Authors:
12  *   Yaniv Kamay  <yaniv@qumranet.com>
13  *   Avi Kivity   <avi@qumranet.com>
14  *
15  * This work is licensed under the terms of the GNU GPL, version 2.  See
16  * the COPYING file in the top-level directory.
17  *
18  */
19
20 #include "mmu.h"
21 #include "x86.h"
22 #include "kvm_cache_regs.h"
23
24 #include <linux/kvm_host.h>
25 #include <linux/types.h>
26 #include <linux/string.h>
27 #include <linux/mm.h>
28 #include <linux/highmem.h>
29 #include <linux/module.h>
30 #include <linux/swap.h>
31 #include <linux/hugetlb.h>
32 #include <linux/compiler.h>
33 #include <linux/srcu.h>
34 #include <linux/slab.h>
35
36 #include <asm/page.h>
37 #include <asm/cmpxchg.h>
38 #include <asm/io.h>
39 #include <asm/vmx.h>
40
41 /*
42  * When setting this variable to true it enables Two-Dimensional-Paging
43  * where the hardware walks 2 page tables:
44  * 1. the guest-virtual to guest-physical
45  * 2. while doing 1. it walks guest-physical to host-physical
46  * If the hardware supports that we don't need to do shadow paging.
47  */
48 bool tdp_enabled = false;
49
50 #undef MMU_DEBUG
51
52 #undef AUDIT
53
54 #ifdef AUDIT
55 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
56 #else
57 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
58 #endif
59
60 #ifdef MMU_DEBUG
61
62 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
63 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
64
65 #else
66
67 #define pgprintk(x...) do { } while (0)
68 #define rmap_printk(x...) do { } while (0)
69
70 #endif
71
72 #if defined(MMU_DEBUG) || defined(AUDIT)
73 static int dbg = 0;
74 module_param(dbg, bool, 0644);
75 #endif
76
77 static int oos_shadow = 1;
78 module_param(oos_shadow, bool, 0644);
79
80 #ifndef MMU_DEBUG
81 #define ASSERT(x) do { } while (0)
82 #else
83 #define ASSERT(x)                                                       \
84         if (!(x)) {                                                     \
85                 printk(KERN_WARNING "assertion failed %s:%d: %s\n",     \
86                        __FILE__, __LINE__, #x);                         \
87         }
88 #endif
89
90 #define PT_FIRST_AVAIL_BITS_SHIFT 9
91 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
92
93 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
94
95 #define PT64_LEVEL_BITS 9
96
97 #define PT64_LEVEL_SHIFT(level) \
98                 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
99
100 #define PT64_LEVEL_MASK(level) \
101                 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
102
103 #define PT64_INDEX(address, level)\
104         (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
105
106
107 #define PT32_LEVEL_BITS 10
108
109 #define PT32_LEVEL_SHIFT(level) \
110                 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
111
112 #define PT32_LEVEL_MASK(level) \
113                 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
114 #define PT32_LVL_OFFSET_MASK(level) \
115         (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
116                                                 * PT32_LEVEL_BITS))) - 1))
117
118 #define PT32_INDEX(address, level)\
119         (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
120
121
122 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
123 #define PT64_DIR_BASE_ADDR_MASK \
124         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
125 #define PT64_LVL_ADDR_MASK(level) \
126         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
127                                                 * PT64_LEVEL_BITS))) - 1))
128 #define PT64_LVL_OFFSET_MASK(level) \
129         (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
130                                                 * PT64_LEVEL_BITS))) - 1))
131
132 #define PT32_BASE_ADDR_MASK PAGE_MASK
133 #define PT32_DIR_BASE_ADDR_MASK \
134         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
135 #define PT32_LVL_ADDR_MASK(level) \
136         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
137                                             * PT32_LEVEL_BITS))) - 1))
138
139 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
140                         | PT64_NX_MASK)
141
142 #define RMAP_EXT 4
143
144 #define ACC_EXEC_MASK    1
145 #define ACC_WRITE_MASK   PT_WRITABLE_MASK
146 #define ACC_USER_MASK    PT_USER_MASK
147 #define ACC_ALL          (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
148
149 #include <trace/events/kvm.h>
150
151 #define CREATE_TRACE_POINTS
152 #include "mmutrace.h"
153
154 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
155
156 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
157
158 struct kvm_rmap_desc {
159         u64 *sptes[RMAP_EXT];
160         struct kvm_rmap_desc *more;
161 };
162
163 struct kvm_shadow_walk_iterator {
164         u64 addr;
165         hpa_t shadow_addr;
166         int level;
167         u64 *sptep;
168         unsigned index;
169 };
170
171 #define for_each_shadow_entry(_vcpu, _addr, _walker)    \
172         for (shadow_walk_init(&(_walker), _vcpu, _addr);        \
173              shadow_walk_okay(&(_walker));                      \
174              shadow_walk_next(&(_walker)))
175
176 typedef int (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp);
177
178 static struct kmem_cache *pte_chain_cache;
179 static struct kmem_cache *rmap_desc_cache;
180 static struct kmem_cache *mmu_page_header_cache;
181
182 static u64 __read_mostly shadow_trap_nonpresent_pte;
183 static u64 __read_mostly shadow_notrap_nonpresent_pte;
184 static u64 __read_mostly shadow_base_present_pte;
185 static u64 __read_mostly shadow_nx_mask;
186 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
187 static u64 __read_mostly shadow_user_mask;
188 static u64 __read_mostly shadow_accessed_mask;
189 static u64 __read_mostly shadow_dirty_mask;
190
191 static inline u64 rsvd_bits(int s, int e)
192 {
193         return ((1ULL << (e - s + 1)) - 1) << s;
194 }
195
196 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
197 {
198         shadow_trap_nonpresent_pte = trap_pte;
199         shadow_notrap_nonpresent_pte = notrap_pte;
200 }
201 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
202
203 void kvm_mmu_set_base_ptes(u64 base_pte)
204 {
205         shadow_base_present_pte = base_pte;
206 }
207 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
208
209 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
210                 u64 dirty_mask, u64 nx_mask, u64 x_mask)
211 {
212         shadow_user_mask = user_mask;
213         shadow_accessed_mask = accessed_mask;
214         shadow_dirty_mask = dirty_mask;
215         shadow_nx_mask = nx_mask;
216         shadow_x_mask = x_mask;
217 }
218 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
219
220 static bool is_write_protection(struct kvm_vcpu *vcpu)
221 {
222         return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
223 }
224
225 static int is_cpuid_PSE36(void)
226 {
227         return 1;
228 }
229
230 static int is_nx(struct kvm_vcpu *vcpu)
231 {
232         return vcpu->arch.efer & EFER_NX;
233 }
234
235 static int is_shadow_present_pte(u64 pte)
236 {
237         return pte != shadow_trap_nonpresent_pte
238                 && pte != shadow_notrap_nonpresent_pte;
239 }
240
241 static int is_large_pte(u64 pte)
242 {
243         return pte & PT_PAGE_SIZE_MASK;
244 }
245
246 static int is_writable_pte(unsigned long pte)
247 {
248         return pte & PT_WRITABLE_MASK;
249 }
250
251 static int is_dirty_gpte(unsigned long pte)
252 {
253         return pte & PT_DIRTY_MASK;
254 }
255
256 static int is_rmap_spte(u64 pte)
257 {
258         return is_shadow_present_pte(pte);
259 }
260
261 static int is_last_spte(u64 pte, int level)
262 {
263         if (level == PT_PAGE_TABLE_LEVEL)
264                 return 1;
265         if (is_large_pte(pte))
266                 return 1;
267         return 0;
268 }
269
270 static pfn_t spte_to_pfn(u64 pte)
271 {
272         return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
273 }
274
275 static gfn_t pse36_gfn_delta(u32 gpte)
276 {
277         int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
278
279         return (gpte & PT32_DIR_PSE36_MASK) << shift;
280 }
281
282 static void __set_spte(u64 *sptep, u64 spte)
283 {
284 #ifdef CONFIG_X86_64
285         set_64bit((unsigned long *)sptep, spte);
286 #else
287         set_64bit((unsigned long long *)sptep, spte);
288 #endif
289 }
290
291 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
292                                   struct kmem_cache *base_cache, int min)
293 {
294         void *obj;
295
296         if (cache->nobjs >= min)
297                 return 0;
298         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
299                 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
300                 if (!obj)
301                         return -ENOMEM;
302                 cache->objects[cache->nobjs++] = obj;
303         }
304         return 0;
305 }
306
307 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
308 {
309         while (mc->nobjs)
310                 kfree(mc->objects[--mc->nobjs]);
311 }
312
313 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
314                                        int min)
315 {
316         struct page *page;
317
318         if (cache->nobjs >= min)
319                 return 0;
320         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
321                 page = alloc_page(GFP_KERNEL);
322                 if (!page)
323                         return -ENOMEM;
324                 cache->objects[cache->nobjs++] = page_address(page);
325         }
326         return 0;
327 }
328
329 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
330 {
331         while (mc->nobjs)
332                 free_page((unsigned long)mc->objects[--mc->nobjs]);
333 }
334
335 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
336 {
337         int r;
338
339         r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
340                                    pte_chain_cache, 4);
341         if (r)
342                 goto out;
343         r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
344                                    rmap_desc_cache, 4);
345         if (r)
346                 goto out;
347         r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
348         if (r)
349                 goto out;
350         r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
351                                    mmu_page_header_cache, 4);
352 out:
353         return r;
354 }
355
356 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
357 {
358         mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
359         mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
360         mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
361         mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
362 }
363
364 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
365                                     size_t size)
366 {
367         void *p;
368
369         BUG_ON(!mc->nobjs);
370         p = mc->objects[--mc->nobjs];
371         return p;
372 }
373
374 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
375 {
376         return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
377                                       sizeof(struct kvm_pte_chain));
378 }
379
380 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
381 {
382         kfree(pc);
383 }
384
385 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
386 {
387         return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
388                                       sizeof(struct kvm_rmap_desc));
389 }
390
391 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
392 {
393         kfree(rd);
394 }
395
396 /*
397  * Return the pointer to the largepage write count for a given
398  * gfn, handling slots that are not large page aligned.
399  */
400 static int *slot_largepage_idx(gfn_t gfn,
401                                struct kvm_memory_slot *slot,
402                                int level)
403 {
404         unsigned long idx;
405
406         idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
407               (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
408         return &slot->lpage_info[level - 2][idx].write_count;
409 }
410
411 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
412 {
413         struct kvm_memory_slot *slot;
414         int *write_count;
415         int i;
416
417         gfn = unalias_gfn(kvm, gfn);
418
419         slot = gfn_to_memslot_unaliased(kvm, gfn);
420         for (i = PT_DIRECTORY_LEVEL;
421              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
422                 write_count   = slot_largepage_idx(gfn, slot, i);
423                 *write_count += 1;
424         }
425 }
426
427 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
428 {
429         struct kvm_memory_slot *slot;
430         int *write_count;
431         int i;
432
433         gfn = unalias_gfn(kvm, gfn);
434         slot = gfn_to_memslot_unaliased(kvm, gfn);
435         for (i = PT_DIRECTORY_LEVEL;
436              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
437                 write_count   = slot_largepage_idx(gfn, slot, i);
438                 *write_count -= 1;
439                 WARN_ON(*write_count < 0);
440         }
441 }
442
443 static int has_wrprotected_page(struct kvm *kvm,
444                                 gfn_t gfn,
445                                 int level)
446 {
447         struct kvm_memory_slot *slot;
448         int *largepage_idx;
449
450         gfn = unalias_gfn(kvm, gfn);
451         slot = gfn_to_memslot_unaliased(kvm, gfn);
452         if (slot) {
453                 largepage_idx = slot_largepage_idx(gfn, slot, level);
454                 return *largepage_idx;
455         }
456
457         return 1;
458 }
459
460 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
461 {
462         unsigned long page_size;
463         int i, ret = 0;
464
465         page_size = kvm_host_page_size(kvm, gfn);
466
467         for (i = PT_PAGE_TABLE_LEVEL;
468              i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
469                 if (page_size >= KVM_HPAGE_SIZE(i))
470                         ret = i;
471                 else
472                         break;
473         }
474
475         return ret;
476 }
477
478 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
479 {
480         struct kvm_memory_slot *slot;
481         int host_level, level, max_level;
482
483         slot = gfn_to_memslot(vcpu->kvm, large_gfn);
484         if (slot && slot->dirty_bitmap)
485                 return PT_PAGE_TABLE_LEVEL;
486
487         host_level = host_mapping_level(vcpu->kvm, large_gfn);
488
489         if (host_level == PT_PAGE_TABLE_LEVEL)
490                 return host_level;
491
492         max_level = kvm_x86_ops->get_lpage_level() < host_level ?
493                 kvm_x86_ops->get_lpage_level() : host_level;
494
495         for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
496                 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
497                         break;
498
499         return level - 1;
500 }
501
502 /*
503  * Take gfn and return the reverse mapping to it.
504  * Note: gfn must be unaliased before this function get called
505  */
506
507 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
508 {
509         struct kvm_memory_slot *slot;
510         unsigned long idx;
511
512         slot = gfn_to_memslot(kvm, gfn);
513         if (likely(level == PT_PAGE_TABLE_LEVEL))
514                 return &slot->rmap[gfn - slot->base_gfn];
515
516         idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
517                 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
518
519         return &slot->lpage_info[level - 2][idx].rmap_pde;
520 }
521
522 /*
523  * Reverse mapping data structures:
524  *
525  * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
526  * that points to page_address(page).
527  *
528  * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
529  * containing more mappings.
530  *
531  * Returns the number of rmap entries before the spte was added or zero if
532  * the spte was not added.
533  *
534  */
535 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
536 {
537         struct kvm_mmu_page *sp;
538         struct kvm_rmap_desc *desc;
539         unsigned long *rmapp;
540         int i, count = 0;
541
542         if (!is_rmap_spte(*spte))
543                 return count;
544         gfn = unalias_gfn(vcpu->kvm, gfn);
545         sp = page_header(__pa(spte));
546         sp->gfns[spte - sp->spt] = gfn;
547         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
548         if (!*rmapp) {
549                 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
550                 *rmapp = (unsigned long)spte;
551         } else if (!(*rmapp & 1)) {
552                 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
553                 desc = mmu_alloc_rmap_desc(vcpu);
554                 desc->sptes[0] = (u64 *)*rmapp;
555                 desc->sptes[1] = spte;
556                 *rmapp = (unsigned long)desc | 1;
557         } else {
558                 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
559                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
560                 while (desc->sptes[RMAP_EXT-1] && desc->more) {
561                         desc = desc->more;
562                         count += RMAP_EXT;
563                 }
564                 if (desc->sptes[RMAP_EXT-1]) {
565                         desc->more = mmu_alloc_rmap_desc(vcpu);
566                         desc = desc->more;
567                 }
568                 for (i = 0; desc->sptes[i]; ++i)
569                         ;
570                 desc->sptes[i] = spte;
571         }
572         return count;
573 }
574
575 static void rmap_desc_remove_entry(unsigned long *rmapp,
576                                    struct kvm_rmap_desc *desc,
577                                    int i,
578                                    struct kvm_rmap_desc *prev_desc)
579 {
580         int j;
581
582         for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
583                 ;
584         desc->sptes[i] = desc->sptes[j];
585         desc->sptes[j] = NULL;
586         if (j != 0)
587                 return;
588         if (!prev_desc && !desc->more)
589                 *rmapp = (unsigned long)desc->sptes[0];
590         else
591                 if (prev_desc)
592                         prev_desc->more = desc->more;
593                 else
594                         *rmapp = (unsigned long)desc->more | 1;
595         mmu_free_rmap_desc(desc);
596 }
597
598 static void rmap_remove(struct kvm *kvm, u64 *spte)
599 {
600         struct kvm_rmap_desc *desc;
601         struct kvm_rmap_desc *prev_desc;
602         struct kvm_mmu_page *sp;
603         pfn_t pfn;
604         unsigned long *rmapp;
605         int i;
606
607         if (!is_rmap_spte(*spte))
608                 return;
609         sp = page_header(__pa(spte));
610         pfn = spte_to_pfn(*spte);
611         if (*spte & shadow_accessed_mask)
612                 kvm_set_pfn_accessed(pfn);
613         if (is_writable_pte(*spte))
614                 kvm_set_pfn_dirty(pfn);
615         rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
616         if (!*rmapp) {
617                 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
618                 BUG();
619         } else if (!(*rmapp & 1)) {
620                 rmap_printk("rmap_remove:  %p %llx 1->0\n", spte, *spte);
621                 if ((u64 *)*rmapp != spte) {
622                         printk(KERN_ERR "rmap_remove:  %p %llx 1->BUG\n",
623                                spte, *spte);
624                         BUG();
625                 }
626                 *rmapp = 0;
627         } else {
628                 rmap_printk("rmap_remove:  %p %llx many->many\n", spte, *spte);
629                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
630                 prev_desc = NULL;
631                 while (desc) {
632                         for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
633                                 if (desc->sptes[i] == spte) {
634                                         rmap_desc_remove_entry(rmapp,
635                                                                desc, i,
636                                                                prev_desc);
637                                         return;
638                                 }
639                         prev_desc = desc;
640                         desc = desc->more;
641                 }
642                 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
643                 BUG();
644         }
645 }
646
647 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
648 {
649         struct kvm_rmap_desc *desc;
650         u64 *prev_spte;
651         int i;
652
653         if (!*rmapp)
654                 return NULL;
655         else if (!(*rmapp & 1)) {
656                 if (!spte)
657                         return (u64 *)*rmapp;
658                 return NULL;
659         }
660         desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
661         prev_spte = NULL;
662         while (desc) {
663                 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
664                         if (prev_spte == spte)
665                                 return desc->sptes[i];
666                         prev_spte = desc->sptes[i];
667                 }
668                 desc = desc->more;
669         }
670         return NULL;
671 }
672
673 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
674 {
675         unsigned long *rmapp;
676         u64 *spte;
677         int i, write_protected = 0;
678
679         gfn = unalias_gfn(kvm, gfn);
680         rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
681
682         spte = rmap_next(kvm, rmapp, NULL);
683         while (spte) {
684                 BUG_ON(!spte);
685                 BUG_ON(!(*spte & PT_PRESENT_MASK));
686                 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
687                 if (is_writable_pte(*spte)) {
688                         __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
689                         write_protected = 1;
690                 }
691                 spte = rmap_next(kvm, rmapp, spte);
692         }
693         if (write_protected) {
694                 pfn_t pfn;
695
696                 spte = rmap_next(kvm, rmapp, NULL);
697                 pfn = spte_to_pfn(*spte);
698                 kvm_set_pfn_dirty(pfn);
699         }
700
701         /* check for huge page mappings */
702         for (i = PT_DIRECTORY_LEVEL;
703              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
704                 rmapp = gfn_to_rmap(kvm, gfn, i);
705                 spte = rmap_next(kvm, rmapp, NULL);
706                 while (spte) {
707                         BUG_ON(!spte);
708                         BUG_ON(!(*spte & PT_PRESENT_MASK));
709                         BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
710                         pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
711                         if (is_writable_pte(*spte)) {
712                                 rmap_remove(kvm, spte);
713                                 --kvm->stat.lpages;
714                                 __set_spte(spte, shadow_trap_nonpresent_pte);
715                                 spte = NULL;
716                                 write_protected = 1;
717                         }
718                         spte = rmap_next(kvm, rmapp, spte);
719                 }
720         }
721
722         return write_protected;
723 }
724
725 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
726                            unsigned long data)
727 {
728         u64 *spte;
729         int need_tlb_flush = 0;
730
731         while ((spte = rmap_next(kvm, rmapp, NULL))) {
732                 BUG_ON(!(*spte & PT_PRESENT_MASK));
733                 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
734                 rmap_remove(kvm, spte);
735                 __set_spte(spte, shadow_trap_nonpresent_pte);
736                 need_tlb_flush = 1;
737         }
738         return need_tlb_flush;
739 }
740
741 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
742                              unsigned long data)
743 {
744         int need_flush = 0;
745         u64 *spte, new_spte;
746         pte_t *ptep = (pte_t *)data;
747         pfn_t new_pfn;
748
749         WARN_ON(pte_huge(*ptep));
750         new_pfn = pte_pfn(*ptep);
751         spte = rmap_next(kvm, rmapp, NULL);
752         while (spte) {
753                 BUG_ON(!is_shadow_present_pte(*spte));
754                 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
755                 need_flush = 1;
756                 if (pte_write(*ptep)) {
757                         rmap_remove(kvm, spte);
758                         __set_spte(spte, shadow_trap_nonpresent_pte);
759                         spte = rmap_next(kvm, rmapp, NULL);
760                 } else {
761                         new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
762                         new_spte |= (u64)new_pfn << PAGE_SHIFT;
763
764                         new_spte &= ~PT_WRITABLE_MASK;
765                         new_spte &= ~SPTE_HOST_WRITEABLE;
766                         if (is_writable_pte(*spte))
767                                 kvm_set_pfn_dirty(spte_to_pfn(*spte));
768                         __set_spte(spte, new_spte);
769                         spte = rmap_next(kvm, rmapp, spte);
770                 }
771         }
772         if (need_flush)
773                 kvm_flush_remote_tlbs(kvm);
774
775         return 0;
776 }
777
778 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
779                           unsigned long data,
780                           int (*handler)(struct kvm *kvm, unsigned long *rmapp,
781                                          unsigned long data))
782 {
783         int i, j;
784         int ret;
785         int retval = 0;
786         struct kvm_memslots *slots;
787
788         slots = kvm_memslots(kvm);
789
790         for (i = 0; i < slots->nmemslots; i++) {
791                 struct kvm_memory_slot *memslot = &slots->memslots[i];
792                 unsigned long start = memslot->userspace_addr;
793                 unsigned long end;
794
795                 end = start + (memslot->npages << PAGE_SHIFT);
796                 if (hva >= start && hva < end) {
797                         gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
798
799                         ret = handler(kvm, &memslot->rmap[gfn_offset], data);
800
801                         for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
802                                 int idx = gfn_offset;
803                                 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
804                                 ret |= handler(kvm,
805                                         &memslot->lpage_info[j][idx].rmap_pde,
806                                         data);
807                         }
808                         trace_kvm_age_page(hva, memslot, ret);
809                         retval |= ret;
810                 }
811         }
812
813         return retval;
814 }
815
816 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
817 {
818         return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
819 }
820
821 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
822 {
823         kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
824 }
825
826 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
827                          unsigned long data)
828 {
829         u64 *spte;
830         int young = 0;
831
832         /*
833          * Emulate the accessed bit for EPT, by checking if this page has
834          * an EPT mapping, and clearing it if it does. On the next access,
835          * a new EPT mapping will be established.
836          * This has some overhead, but not as much as the cost of swapping
837          * out actively used pages or breaking up actively used hugepages.
838          */
839         if (!shadow_accessed_mask)
840                 return kvm_unmap_rmapp(kvm, rmapp, data);
841
842         spte = rmap_next(kvm, rmapp, NULL);
843         while (spte) {
844                 int _young;
845                 u64 _spte = *spte;
846                 BUG_ON(!(_spte & PT_PRESENT_MASK));
847                 _young = _spte & PT_ACCESSED_MASK;
848                 if (_young) {
849                         young = 1;
850                         clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
851                 }
852                 spte = rmap_next(kvm, rmapp, spte);
853         }
854         return young;
855 }
856
857 #define RMAP_RECYCLE_THRESHOLD 1000
858
859 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
860 {
861         unsigned long *rmapp;
862         struct kvm_mmu_page *sp;
863
864         sp = page_header(__pa(spte));
865
866         gfn = unalias_gfn(vcpu->kvm, gfn);
867         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
868
869         kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
870         kvm_flush_remote_tlbs(vcpu->kvm);
871 }
872
873 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
874 {
875         return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
876 }
877
878 #ifdef MMU_DEBUG
879 static int is_empty_shadow_page(u64 *spt)
880 {
881         u64 *pos;
882         u64 *end;
883
884         for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
885                 if (is_shadow_present_pte(*pos)) {
886                         printk(KERN_ERR "%s: %p %llx\n", __func__,
887                                pos, *pos);
888                         return 0;
889                 }
890         return 1;
891 }
892 #endif
893
894 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
895 {
896         ASSERT(is_empty_shadow_page(sp->spt));
897         list_del(&sp->link);
898         __free_page(virt_to_page(sp->spt));
899         __free_page(virt_to_page(sp->gfns));
900         kfree(sp);
901         ++kvm->arch.n_free_mmu_pages;
902 }
903
904 static unsigned kvm_page_table_hashfn(gfn_t gfn)
905 {
906         return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
907 }
908
909 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
910                                                u64 *parent_pte)
911 {
912         struct kvm_mmu_page *sp;
913
914         sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
915         sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
916         sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
917         set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
918         list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
919         bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
920         sp->multimapped = 0;
921         sp->parent_pte = parent_pte;
922         --vcpu->kvm->arch.n_free_mmu_pages;
923         return sp;
924 }
925
926 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
927                                     struct kvm_mmu_page *sp, u64 *parent_pte)
928 {
929         struct kvm_pte_chain *pte_chain;
930         struct hlist_node *node;
931         int i;
932
933         if (!parent_pte)
934                 return;
935         if (!sp->multimapped) {
936                 u64 *old = sp->parent_pte;
937
938                 if (!old) {
939                         sp->parent_pte = parent_pte;
940                         return;
941                 }
942                 sp->multimapped = 1;
943                 pte_chain = mmu_alloc_pte_chain(vcpu);
944                 INIT_HLIST_HEAD(&sp->parent_ptes);
945                 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
946                 pte_chain->parent_ptes[0] = old;
947         }
948         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
949                 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
950                         continue;
951                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
952                         if (!pte_chain->parent_ptes[i]) {
953                                 pte_chain->parent_ptes[i] = parent_pte;
954                                 return;
955                         }
956         }
957         pte_chain = mmu_alloc_pte_chain(vcpu);
958         BUG_ON(!pte_chain);
959         hlist_add_head(&pte_chain->link, &sp->parent_ptes);
960         pte_chain->parent_ptes[0] = parent_pte;
961 }
962
963 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
964                                        u64 *parent_pte)
965 {
966         struct kvm_pte_chain *pte_chain;
967         struct hlist_node *node;
968         int i;
969
970         if (!sp->multimapped) {
971                 BUG_ON(sp->parent_pte != parent_pte);
972                 sp->parent_pte = NULL;
973                 return;
974         }
975         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
976                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
977                         if (!pte_chain->parent_ptes[i])
978                                 break;
979                         if (pte_chain->parent_ptes[i] != parent_pte)
980                                 continue;
981                         while (i + 1 < NR_PTE_CHAIN_ENTRIES
982                                 && pte_chain->parent_ptes[i + 1]) {
983                                 pte_chain->parent_ptes[i]
984                                         = pte_chain->parent_ptes[i + 1];
985                                 ++i;
986                         }
987                         pte_chain->parent_ptes[i] = NULL;
988                         if (i == 0) {
989                                 hlist_del(&pte_chain->link);
990                                 mmu_free_pte_chain(pte_chain);
991                                 if (hlist_empty(&sp->parent_ptes)) {
992                                         sp->multimapped = 0;
993                                         sp->parent_pte = NULL;
994                                 }
995                         }
996                         return;
997                 }
998         BUG();
999 }
1000
1001
1002 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1003 {
1004         struct kvm_pte_chain *pte_chain;
1005         struct hlist_node *node;
1006         struct kvm_mmu_page *parent_sp;
1007         int i;
1008
1009         if (!sp->multimapped && sp->parent_pte) {
1010                 parent_sp = page_header(__pa(sp->parent_pte));
1011                 fn(parent_sp);
1012                 mmu_parent_walk(parent_sp, fn);
1013                 return;
1014         }
1015         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1016                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1017                         if (!pte_chain->parent_ptes[i])
1018                                 break;
1019                         parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1020                         fn(parent_sp);
1021                         mmu_parent_walk(parent_sp, fn);
1022                 }
1023 }
1024
1025 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1026 {
1027         unsigned int index;
1028         struct kvm_mmu_page *sp = page_header(__pa(spte));
1029
1030         index = spte - sp->spt;
1031         if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1032                 sp->unsync_children++;
1033         WARN_ON(!sp->unsync_children);
1034 }
1035
1036 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1037 {
1038         struct kvm_pte_chain *pte_chain;
1039         struct hlist_node *node;
1040         int i;
1041
1042         if (!sp->parent_pte)
1043                 return;
1044
1045         if (!sp->multimapped) {
1046                 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1047                 return;
1048         }
1049
1050         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1051                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1052                         if (!pte_chain->parent_ptes[i])
1053                                 break;
1054                         kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1055                 }
1056 }
1057
1058 static int unsync_walk_fn(struct kvm_mmu_page *sp)
1059 {
1060         kvm_mmu_update_parents_unsync(sp);
1061         return 1;
1062 }
1063
1064 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1065 {
1066         mmu_parent_walk(sp, unsync_walk_fn);
1067         kvm_mmu_update_parents_unsync(sp);
1068 }
1069
1070 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1071                                     struct kvm_mmu_page *sp)
1072 {
1073         int i;
1074
1075         for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1076                 sp->spt[i] = shadow_trap_nonpresent_pte;
1077 }
1078
1079 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1080                                struct kvm_mmu_page *sp)
1081 {
1082         return 1;
1083 }
1084
1085 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1086 {
1087 }
1088
1089 #define KVM_PAGE_ARRAY_NR 16
1090
1091 struct kvm_mmu_pages {
1092         struct mmu_page_and_offset {
1093                 struct kvm_mmu_page *sp;
1094                 unsigned int idx;
1095         } page[KVM_PAGE_ARRAY_NR];
1096         unsigned int nr;
1097 };
1098
1099 #define for_each_unsync_children(bitmap, idx)           \
1100         for (idx = find_first_bit(bitmap, 512);         \
1101              idx < 512;                                 \
1102              idx = find_next_bit(bitmap, 512, idx+1))
1103
1104 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1105                          int idx)
1106 {
1107         int i;
1108
1109         if (sp->unsync)
1110                 for (i=0; i < pvec->nr; i++)
1111                         if (pvec->page[i].sp == sp)
1112                                 return 0;
1113
1114         pvec->page[pvec->nr].sp = sp;
1115         pvec->page[pvec->nr].idx = idx;
1116         pvec->nr++;
1117         return (pvec->nr == KVM_PAGE_ARRAY_NR);
1118 }
1119
1120 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1121                            struct kvm_mmu_pages *pvec)
1122 {
1123         int i, ret, nr_unsync_leaf = 0;
1124
1125         for_each_unsync_children(sp->unsync_child_bitmap, i) {
1126                 u64 ent = sp->spt[i];
1127
1128                 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1129                         struct kvm_mmu_page *child;
1130                         child = page_header(ent & PT64_BASE_ADDR_MASK);
1131
1132                         if (child->unsync_children) {
1133                                 if (mmu_pages_add(pvec, child, i))
1134                                         return -ENOSPC;
1135
1136                                 ret = __mmu_unsync_walk(child, pvec);
1137                                 if (!ret)
1138                                         __clear_bit(i, sp->unsync_child_bitmap);
1139                                 else if (ret > 0)
1140                                         nr_unsync_leaf += ret;
1141                                 else
1142                                         return ret;
1143                         }
1144
1145                         if (child->unsync) {
1146                                 nr_unsync_leaf++;
1147                                 if (mmu_pages_add(pvec, child, i))
1148                                         return -ENOSPC;
1149                         }
1150                 }
1151         }
1152
1153         if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1154                 sp->unsync_children = 0;
1155
1156         return nr_unsync_leaf;
1157 }
1158
1159 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1160                            struct kvm_mmu_pages *pvec)
1161 {
1162         if (!sp->unsync_children)
1163                 return 0;
1164
1165         mmu_pages_add(pvec, sp, 0);
1166         return __mmu_unsync_walk(sp, pvec);
1167 }
1168
1169 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1170 {
1171         unsigned index;
1172         struct hlist_head *bucket;
1173         struct kvm_mmu_page *sp;
1174         struct hlist_node *node;
1175
1176         pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1177         index = kvm_page_table_hashfn(gfn);
1178         bucket = &kvm->arch.mmu_page_hash[index];
1179         hlist_for_each_entry(sp, node, bucket, hash_link)
1180                 if (sp->gfn == gfn && !sp->role.direct
1181                     && !sp->role.invalid) {
1182                         pgprintk("%s: found role %x\n",
1183                                  __func__, sp->role.word);
1184                         return sp;
1185                 }
1186         return NULL;
1187 }
1188
1189 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1190 {
1191         WARN_ON(!sp->unsync);
1192         trace_kvm_mmu_sync_page(sp);
1193         sp->unsync = 0;
1194         --kvm->stat.mmu_unsync;
1195 }
1196
1197 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1198
1199 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1200 {
1201         if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1202                 kvm_mmu_zap_page(vcpu->kvm, sp);
1203                 return 1;
1204         }
1205
1206         if (rmap_write_protect(vcpu->kvm, sp->gfn))
1207                 kvm_flush_remote_tlbs(vcpu->kvm);
1208         kvm_unlink_unsync_page(vcpu->kvm, sp);
1209         if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1210                 kvm_mmu_zap_page(vcpu->kvm, sp);
1211                 return 1;
1212         }
1213
1214         kvm_mmu_flush_tlb(vcpu);
1215         return 0;
1216 }
1217
1218 struct mmu_page_path {
1219         struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1220         unsigned int idx[PT64_ROOT_LEVEL-1];
1221 };
1222
1223 #define for_each_sp(pvec, sp, parents, i)                       \
1224                 for (i = mmu_pages_next(&pvec, &parents, -1),   \
1225                         sp = pvec.page[i].sp;                   \
1226                         i < pvec.nr && ({ sp = pvec.page[i].sp; 1;});   \
1227                         i = mmu_pages_next(&pvec, &parents, i))
1228
1229 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1230                           struct mmu_page_path *parents,
1231                           int i)
1232 {
1233         int n;
1234
1235         for (n = i+1; n < pvec->nr; n++) {
1236                 struct kvm_mmu_page *sp = pvec->page[n].sp;
1237
1238                 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1239                         parents->idx[0] = pvec->page[n].idx;
1240                         return n;
1241                 }
1242
1243                 parents->parent[sp->role.level-2] = sp;
1244                 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1245         }
1246
1247         return n;
1248 }
1249
1250 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1251 {
1252         struct kvm_mmu_page *sp;
1253         unsigned int level = 0;
1254
1255         do {
1256                 unsigned int idx = parents->idx[level];
1257
1258                 sp = parents->parent[level];
1259                 if (!sp)
1260                         return;
1261
1262                 --sp->unsync_children;
1263                 WARN_ON((int)sp->unsync_children < 0);
1264                 __clear_bit(idx, sp->unsync_child_bitmap);
1265                 level++;
1266         } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1267 }
1268
1269 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1270                                struct mmu_page_path *parents,
1271                                struct kvm_mmu_pages *pvec)
1272 {
1273         parents->parent[parent->role.level-1] = NULL;
1274         pvec->nr = 0;
1275 }
1276
1277 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1278                               struct kvm_mmu_page *parent)
1279 {
1280         int i;
1281         struct kvm_mmu_page *sp;
1282         struct mmu_page_path parents;
1283         struct kvm_mmu_pages pages;
1284
1285         kvm_mmu_pages_init(parent, &parents, &pages);
1286         while (mmu_unsync_walk(parent, &pages)) {
1287                 int protected = 0;
1288
1289                 for_each_sp(pages, sp, parents, i)
1290                         protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1291
1292                 if (protected)
1293                         kvm_flush_remote_tlbs(vcpu->kvm);
1294
1295                 for_each_sp(pages, sp, parents, i) {
1296                         kvm_sync_page(vcpu, sp);
1297                         mmu_pages_clear_parents(&parents);
1298                 }
1299                 cond_resched_lock(&vcpu->kvm->mmu_lock);
1300                 kvm_mmu_pages_init(parent, &parents, &pages);
1301         }
1302 }
1303
1304 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1305                                              gfn_t gfn,
1306                                              gva_t gaddr,
1307                                              unsigned level,
1308                                              int direct,
1309                                              unsigned access,
1310                                              u64 *parent_pte)
1311 {
1312         union kvm_mmu_page_role role;
1313         unsigned index;
1314         unsigned quadrant;
1315         struct hlist_head *bucket;
1316         struct kvm_mmu_page *sp;
1317         struct hlist_node *node, *tmp;
1318
1319         role = vcpu->arch.mmu.base_role;
1320         role.level = level;
1321         role.direct = direct;
1322         if (role.direct)
1323                 role.cr4_pae = 0;
1324         role.access = access;
1325         if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1326                 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1327                 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1328                 role.quadrant = quadrant;
1329         }
1330         index = kvm_page_table_hashfn(gfn);
1331         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1332         hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1333                 if (sp->gfn == gfn) {
1334                         if (sp->unsync)
1335                                 if (kvm_sync_page(vcpu, sp))
1336                                         continue;
1337
1338                         if (sp->role.word != role.word)
1339                                 continue;
1340
1341                         mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1342                         if (sp->unsync_children) {
1343                                 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1344                                 kvm_mmu_mark_parents_unsync(sp);
1345                         }
1346                         trace_kvm_mmu_get_page(sp, false);
1347                         return sp;
1348                 }
1349         ++vcpu->kvm->stat.mmu_cache_miss;
1350         sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1351         if (!sp)
1352                 return sp;
1353         sp->gfn = gfn;
1354         sp->role = role;
1355         hlist_add_head(&sp->hash_link, bucket);
1356         if (!direct) {
1357                 if (rmap_write_protect(vcpu->kvm, gfn))
1358                         kvm_flush_remote_tlbs(vcpu->kvm);
1359                 account_shadowed(vcpu->kvm, gfn);
1360         }
1361         if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1362                 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1363         else
1364                 nonpaging_prefetch_page(vcpu, sp);
1365         trace_kvm_mmu_get_page(sp, true);
1366         return sp;
1367 }
1368
1369 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1370                              struct kvm_vcpu *vcpu, u64 addr)
1371 {
1372         iterator->addr = addr;
1373         iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1374         iterator->level = vcpu->arch.mmu.shadow_root_level;
1375         if (iterator->level == PT32E_ROOT_LEVEL) {
1376                 iterator->shadow_addr
1377                         = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1378                 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1379                 --iterator->level;
1380                 if (!iterator->shadow_addr)
1381                         iterator->level = 0;
1382         }
1383 }
1384
1385 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1386 {
1387         if (iterator->level < PT_PAGE_TABLE_LEVEL)
1388                 return false;
1389
1390         if (iterator->level == PT_PAGE_TABLE_LEVEL)
1391                 if (is_large_pte(*iterator->sptep))
1392                         return false;
1393
1394         iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1395         iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1396         return true;
1397 }
1398
1399 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1400 {
1401         iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1402         --iterator->level;
1403 }
1404
1405 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1406                                          struct kvm_mmu_page *sp)
1407 {
1408         unsigned i;
1409         u64 *pt;
1410         u64 ent;
1411
1412         pt = sp->spt;
1413
1414         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1415                 ent = pt[i];
1416
1417                 if (is_shadow_present_pte(ent)) {
1418                         if (!is_last_spte(ent, sp->role.level)) {
1419                                 ent &= PT64_BASE_ADDR_MASK;
1420                                 mmu_page_remove_parent_pte(page_header(ent),
1421                                                            &pt[i]);
1422                         } else {
1423                                 if (is_large_pte(ent))
1424                                         --kvm->stat.lpages;
1425                                 rmap_remove(kvm, &pt[i]);
1426                         }
1427                 }
1428                 pt[i] = shadow_trap_nonpresent_pte;
1429         }
1430 }
1431
1432 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1433 {
1434         mmu_page_remove_parent_pte(sp, parent_pte);
1435 }
1436
1437 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1438 {
1439         int i;
1440         struct kvm_vcpu *vcpu;
1441
1442         kvm_for_each_vcpu(i, vcpu, kvm)
1443                 vcpu->arch.last_pte_updated = NULL;
1444 }
1445
1446 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1447 {
1448         u64 *parent_pte;
1449
1450         while (sp->multimapped || sp->parent_pte) {
1451                 if (!sp->multimapped)
1452                         parent_pte = sp->parent_pte;
1453                 else {
1454                         struct kvm_pte_chain *chain;
1455
1456                         chain = container_of(sp->parent_ptes.first,
1457                                              struct kvm_pte_chain, link);
1458                         parent_pte = chain->parent_ptes[0];
1459                 }
1460                 BUG_ON(!parent_pte);
1461                 kvm_mmu_put_page(sp, parent_pte);
1462                 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1463         }
1464 }
1465
1466 static int mmu_zap_unsync_children(struct kvm *kvm,
1467                                    struct kvm_mmu_page *parent)
1468 {
1469         int i, zapped = 0;
1470         struct mmu_page_path parents;
1471         struct kvm_mmu_pages pages;
1472
1473         if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1474                 return 0;
1475
1476         kvm_mmu_pages_init(parent, &parents, &pages);
1477         while (mmu_unsync_walk(parent, &pages)) {
1478                 struct kvm_mmu_page *sp;
1479
1480                 for_each_sp(pages, sp, parents, i) {
1481                         kvm_mmu_zap_page(kvm, sp);
1482                         mmu_pages_clear_parents(&parents);
1483                         zapped++;
1484                 }
1485                 kvm_mmu_pages_init(parent, &parents, &pages);
1486         }
1487
1488         return zapped;
1489 }
1490
1491 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1492 {
1493         int ret;
1494
1495         trace_kvm_mmu_zap_page(sp);
1496         ++kvm->stat.mmu_shadow_zapped;
1497         ret = mmu_zap_unsync_children(kvm, sp);
1498         kvm_mmu_page_unlink_children(kvm, sp);
1499         kvm_mmu_unlink_parents(kvm, sp);
1500         kvm_flush_remote_tlbs(kvm);
1501         if (!sp->role.invalid && !sp->role.direct)
1502                 unaccount_shadowed(kvm, sp->gfn);
1503         if (sp->unsync)
1504                 kvm_unlink_unsync_page(kvm, sp);
1505         if (!sp->root_count) {
1506                 hlist_del(&sp->hash_link);
1507                 kvm_mmu_free_page(kvm, sp);
1508         } else {
1509                 sp->role.invalid = 1;
1510                 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1511                 kvm_reload_remote_mmus(kvm);
1512         }
1513         kvm_mmu_reset_last_pte_updated(kvm);
1514         return ret;
1515 }
1516
1517 /*
1518  * Changing the number of mmu pages allocated to the vm
1519  * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1520  */
1521 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1522 {
1523         int used_pages;
1524
1525         used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1526         used_pages = max(0, used_pages);
1527
1528         /*
1529          * If we set the number of mmu pages to be smaller be than the
1530          * number of actived pages , we must to free some mmu pages before we
1531          * change the value
1532          */
1533
1534         if (used_pages > kvm_nr_mmu_pages) {
1535                 while (used_pages > kvm_nr_mmu_pages &&
1536                         !list_empty(&kvm->arch.active_mmu_pages)) {
1537                         struct kvm_mmu_page *page;
1538
1539                         page = container_of(kvm->arch.active_mmu_pages.prev,
1540                                             struct kvm_mmu_page, link);
1541                         used_pages -= kvm_mmu_zap_page(kvm, page);
1542                         used_pages--;
1543                 }
1544                 kvm_nr_mmu_pages = used_pages;
1545                 kvm->arch.n_free_mmu_pages = 0;
1546         }
1547         else
1548                 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1549                                          - kvm->arch.n_alloc_mmu_pages;
1550
1551         kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1552 }
1553
1554 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1555 {
1556         unsigned index;
1557         struct hlist_head *bucket;
1558         struct kvm_mmu_page *sp;
1559         struct hlist_node *node, *n;
1560         int r;
1561
1562         pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1563         r = 0;
1564         index = kvm_page_table_hashfn(gfn);
1565         bucket = &kvm->arch.mmu_page_hash[index];
1566 restart:
1567         hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1568                 if (sp->gfn == gfn && !sp->role.direct) {
1569                         pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1570                                  sp->role.word);
1571                         r = 1;
1572                         if (kvm_mmu_zap_page(kvm, sp))
1573                                 goto restart;
1574                 }
1575         return r;
1576 }
1577
1578 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1579 {
1580         unsigned index;
1581         struct hlist_head *bucket;
1582         struct kvm_mmu_page *sp;
1583         struct hlist_node *node, *nn;
1584
1585         index = kvm_page_table_hashfn(gfn);
1586         bucket = &kvm->arch.mmu_page_hash[index];
1587 restart:
1588         hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1589                 if (sp->gfn == gfn && !sp->role.direct
1590                     && !sp->role.invalid) {
1591                         pgprintk("%s: zap %lx %x\n",
1592                                  __func__, gfn, sp->role.word);
1593                         if (kvm_mmu_zap_page(kvm, sp))
1594                                 goto restart;
1595                 }
1596         }
1597 }
1598
1599 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1600 {
1601         int slot = memslot_id(kvm, gfn);
1602         struct kvm_mmu_page *sp = page_header(__pa(pte));
1603
1604         __set_bit(slot, sp->slot_bitmap);
1605 }
1606
1607 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1608 {
1609         int i;
1610         u64 *pt = sp->spt;
1611
1612         if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1613                 return;
1614
1615         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1616                 if (pt[i] == shadow_notrap_nonpresent_pte)
1617                         __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1618         }
1619 }
1620
1621 /*
1622  * The function is based on mtrr_type_lookup() in
1623  * arch/x86/kernel/cpu/mtrr/generic.c
1624  */
1625 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1626                          u64 start, u64 end)
1627 {
1628         int i;
1629         u64 base, mask;
1630         u8 prev_match, curr_match;
1631         int num_var_ranges = KVM_NR_VAR_MTRR;
1632
1633         if (!mtrr_state->enabled)
1634                 return 0xFF;
1635
1636         /* Make end inclusive end, instead of exclusive */
1637         end--;
1638
1639         /* Look in fixed ranges. Just return the type as per start */
1640         if (mtrr_state->have_fixed && (start < 0x100000)) {
1641                 int idx;
1642
1643                 if (start < 0x80000) {
1644                         idx = 0;
1645                         idx += (start >> 16);
1646                         return mtrr_state->fixed_ranges[idx];
1647                 } else if (start < 0xC0000) {
1648                         idx = 1 * 8;
1649                         idx += ((start - 0x80000) >> 14);
1650                         return mtrr_state->fixed_ranges[idx];
1651                 } else if (start < 0x1000000) {
1652                         idx = 3 * 8;
1653                         idx += ((start - 0xC0000) >> 12);
1654                         return mtrr_state->fixed_ranges[idx];
1655                 }
1656         }
1657
1658         /*
1659          * Look in variable ranges
1660          * Look of multiple ranges matching this address and pick type
1661          * as per MTRR precedence
1662          */
1663         if (!(mtrr_state->enabled & 2))
1664                 return mtrr_state->def_type;
1665
1666         prev_match = 0xFF;
1667         for (i = 0; i < num_var_ranges; ++i) {
1668                 unsigned short start_state, end_state;
1669
1670                 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1671                         continue;
1672
1673                 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1674                        (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1675                 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1676                        (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1677
1678                 start_state = ((start & mask) == (base & mask));
1679                 end_state = ((end & mask) == (base & mask));
1680                 if (start_state != end_state)
1681                         return 0xFE;
1682
1683                 if ((start & mask) != (base & mask))
1684                         continue;
1685
1686                 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1687                 if (prev_match == 0xFF) {
1688                         prev_match = curr_match;
1689                         continue;
1690                 }
1691
1692                 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1693                     curr_match == MTRR_TYPE_UNCACHABLE)
1694                         return MTRR_TYPE_UNCACHABLE;
1695
1696                 if ((prev_match == MTRR_TYPE_WRBACK &&
1697                      curr_match == MTRR_TYPE_WRTHROUGH) ||
1698                     (prev_match == MTRR_TYPE_WRTHROUGH &&
1699                      curr_match == MTRR_TYPE_WRBACK)) {
1700                         prev_match = MTRR_TYPE_WRTHROUGH;
1701                         curr_match = MTRR_TYPE_WRTHROUGH;
1702                 }
1703
1704                 if (prev_match != curr_match)
1705                         return MTRR_TYPE_UNCACHABLE;
1706         }
1707
1708         if (prev_match != 0xFF)
1709                 return prev_match;
1710
1711         return mtrr_state->def_type;
1712 }
1713
1714 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1715 {
1716         u8 mtrr;
1717
1718         mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1719                              (gfn << PAGE_SHIFT) + PAGE_SIZE);
1720         if (mtrr == 0xfe || mtrr == 0xff)
1721                 mtrr = MTRR_TYPE_WRBACK;
1722         return mtrr;
1723 }
1724 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1725
1726 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1727 {
1728         unsigned index;
1729         struct hlist_head *bucket;
1730         struct kvm_mmu_page *s;
1731         struct hlist_node *node, *n;
1732
1733         index = kvm_page_table_hashfn(sp->gfn);
1734         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1735         /* don't unsync if pagetable is shadowed with multiple roles */
1736         hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1737                 if (s->gfn != sp->gfn || s->role.direct)
1738                         continue;
1739                 if (s->role.word != sp->role.word)
1740                         return 1;
1741         }
1742         trace_kvm_mmu_unsync_page(sp);
1743         ++vcpu->kvm->stat.mmu_unsync;
1744         sp->unsync = 1;
1745
1746         kvm_mmu_mark_parents_unsync(sp);
1747
1748         mmu_convert_notrap(sp);
1749         return 0;
1750 }
1751
1752 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1753                                   bool can_unsync)
1754 {
1755         struct kvm_mmu_page *shadow;
1756
1757         shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1758         if (shadow) {
1759                 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1760                         return 1;
1761                 if (shadow->unsync)
1762                         return 0;
1763                 if (can_unsync && oos_shadow)
1764                         return kvm_unsync_page(vcpu, shadow);
1765                 return 1;
1766         }
1767         return 0;
1768 }
1769
1770 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1771                     unsigned pte_access, int user_fault,
1772                     int write_fault, int dirty, int level,
1773                     gfn_t gfn, pfn_t pfn, bool speculative,
1774                     bool can_unsync, bool reset_host_protection)
1775 {
1776         u64 spte;
1777         int ret = 0;
1778
1779         /*
1780          * We don't set the accessed bit, since we sometimes want to see
1781          * whether the guest actually used the pte (in order to detect
1782          * demand paging).
1783          */
1784         spte = shadow_base_present_pte | shadow_dirty_mask;
1785         if (!speculative)
1786                 spte |= shadow_accessed_mask;
1787         if (!dirty)
1788                 pte_access &= ~ACC_WRITE_MASK;
1789         if (pte_access & ACC_EXEC_MASK)
1790                 spte |= shadow_x_mask;
1791         else
1792                 spte |= shadow_nx_mask;
1793         if (pte_access & ACC_USER_MASK)
1794                 spte |= shadow_user_mask;
1795         if (level > PT_PAGE_TABLE_LEVEL)
1796                 spte |= PT_PAGE_SIZE_MASK;
1797         if (tdp_enabled)
1798                 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1799                         kvm_is_mmio_pfn(pfn));
1800
1801         if (reset_host_protection)
1802                 spte |= SPTE_HOST_WRITEABLE;
1803
1804         spte |= (u64)pfn << PAGE_SHIFT;
1805
1806         if ((pte_access & ACC_WRITE_MASK)
1807             || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1808
1809                 if (level > PT_PAGE_TABLE_LEVEL &&
1810                     has_wrprotected_page(vcpu->kvm, gfn, level)) {
1811                         ret = 1;
1812                         spte = shadow_trap_nonpresent_pte;
1813                         goto set_pte;
1814                 }
1815
1816                 spte |= PT_WRITABLE_MASK;
1817
1818                 /*
1819                  * Optimization: for pte sync, if spte was writable the hash
1820                  * lookup is unnecessary (and expensive). Write protection
1821                  * is responsibility of mmu_get_page / kvm_sync_page.
1822                  * Same reasoning can be applied to dirty page accounting.
1823                  */
1824                 if (!can_unsync && is_writable_pte(*sptep))
1825                         goto set_pte;
1826
1827                 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1828                         pgprintk("%s: found shadow page for %lx, marking ro\n",
1829                                  __func__, gfn);
1830                         ret = 1;
1831                         pte_access &= ~ACC_WRITE_MASK;
1832                         if (is_writable_pte(spte))
1833                                 spte &= ~PT_WRITABLE_MASK;
1834                 }
1835         }
1836
1837         if (pte_access & ACC_WRITE_MASK)
1838                 mark_page_dirty(vcpu->kvm, gfn);
1839
1840 set_pte:
1841         __set_spte(sptep, spte);
1842         return ret;
1843 }
1844
1845 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1846                          unsigned pt_access, unsigned pte_access,
1847                          int user_fault, int write_fault, int dirty,
1848                          int *ptwrite, int level, gfn_t gfn,
1849                          pfn_t pfn, bool speculative,
1850                          bool reset_host_protection)
1851 {
1852         int was_rmapped = 0;
1853         int was_writable = is_writable_pte(*sptep);
1854         int rmap_count;
1855
1856         pgprintk("%s: spte %llx access %x write_fault %d"
1857                  " user_fault %d gfn %lx\n",
1858                  __func__, *sptep, pt_access,
1859                  write_fault, user_fault, gfn);
1860
1861         if (is_rmap_spte(*sptep)) {
1862                 /*
1863                  * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1864                  * the parent of the now unreachable PTE.
1865                  */
1866                 if (level > PT_PAGE_TABLE_LEVEL &&
1867                     !is_large_pte(*sptep)) {
1868                         struct kvm_mmu_page *child;
1869                         u64 pte = *sptep;
1870
1871                         child = page_header(pte & PT64_BASE_ADDR_MASK);
1872                         mmu_page_remove_parent_pte(child, sptep);
1873                         __set_spte(sptep, shadow_trap_nonpresent_pte);
1874                         kvm_flush_remote_tlbs(vcpu->kvm);
1875                 } else if (pfn != spte_to_pfn(*sptep)) {
1876                         pgprintk("hfn old %lx new %lx\n",
1877                                  spte_to_pfn(*sptep), pfn);
1878                         rmap_remove(vcpu->kvm, sptep);
1879                 } else
1880                         was_rmapped = 1;
1881         }
1882
1883         if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1884                       dirty, level, gfn, pfn, speculative, true,
1885                       reset_host_protection)) {
1886                 if (write_fault)
1887                         *ptwrite = 1;
1888                 kvm_x86_ops->tlb_flush(vcpu);
1889         }
1890
1891         pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1892         pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1893                  is_large_pte(*sptep)? "2MB" : "4kB",
1894                  *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1895                  *sptep, sptep);
1896         if (!was_rmapped && is_large_pte(*sptep))
1897                 ++vcpu->kvm->stat.lpages;
1898
1899         page_header_update_slot(vcpu->kvm, sptep, gfn);
1900         if (!was_rmapped) {
1901                 rmap_count = rmap_add(vcpu, sptep, gfn);
1902                 kvm_release_pfn_clean(pfn);
1903                 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1904                         rmap_recycle(vcpu, sptep, gfn);
1905         } else {
1906                 if (was_writable)
1907                         kvm_release_pfn_dirty(pfn);
1908                 else
1909                         kvm_release_pfn_clean(pfn);
1910         }
1911         if (speculative) {
1912                 vcpu->arch.last_pte_updated = sptep;
1913                 vcpu->arch.last_pte_gfn = gfn;
1914         }
1915 }
1916
1917 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1918 {
1919 }
1920
1921 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1922                         int level, gfn_t gfn, pfn_t pfn)
1923 {
1924         struct kvm_shadow_walk_iterator iterator;
1925         struct kvm_mmu_page *sp;
1926         int pt_write = 0;
1927         gfn_t pseudo_gfn;
1928
1929         for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1930                 if (iterator.level == level) {
1931                         mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1932                                      0, write, 1, &pt_write,
1933                                      level, gfn, pfn, false, true);
1934                         ++vcpu->stat.pf_fixed;
1935                         break;
1936                 }
1937
1938                 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1939                         pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1940                         sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1941                                               iterator.level - 1,
1942                                               1, ACC_ALL, iterator.sptep);
1943                         if (!sp) {
1944                                 pgprintk("nonpaging_map: ENOMEM\n");
1945                                 kvm_release_pfn_clean(pfn);
1946                                 return -ENOMEM;
1947                         }
1948
1949                         __set_spte(iterator.sptep,
1950                                    __pa(sp->spt)
1951                                    | PT_PRESENT_MASK | PT_WRITABLE_MASK
1952                                    | shadow_user_mask | shadow_x_mask);
1953                 }
1954         }
1955         return pt_write;
1956 }
1957
1958 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1959 {
1960         int r;
1961         int level;
1962         pfn_t pfn;
1963         unsigned long mmu_seq;
1964
1965         level = mapping_level(vcpu, gfn);
1966
1967         /*
1968          * This path builds a PAE pagetable - so we can map 2mb pages at
1969          * maximum. Therefore check if the level is larger than that.
1970          */
1971         if (level > PT_DIRECTORY_LEVEL)
1972                 level = PT_DIRECTORY_LEVEL;
1973
1974         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
1975
1976         mmu_seq = vcpu->kvm->mmu_notifier_seq;
1977         smp_rmb();
1978         pfn = gfn_to_pfn(vcpu->kvm, gfn);
1979
1980         /* mmio */
1981         if (is_error_pfn(pfn)) {
1982                 kvm_release_pfn_clean(pfn);
1983                 return 1;
1984         }
1985
1986         spin_lock(&vcpu->kvm->mmu_lock);
1987         if (mmu_notifier_retry(vcpu, mmu_seq))
1988                 goto out_unlock;
1989         kvm_mmu_free_some_pages(vcpu);
1990         r = __direct_map(vcpu, v, write, level, gfn, pfn);
1991         spin_unlock(&vcpu->kvm->mmu_lock);
1992
1993
1994         return r;
1995
1996 out_unlock:
1997         spin_unlock(&vcpu->kvm->mmu_lock);
1998         kvm_release_pfn_clean(pfn);
1999         return 0;
2000 }
2001
2002
2003 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2004 {
2005         int i;
2006         struct kvm_mmu_page *sp;
2007
2008         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2009                 return;
2010         spin_lock(&vcpu->kvm->mmu_lock);
2011         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2012                 hpa_t root = vcpu->arch.mmu.root_hpa;
2013
2014                 sp = page_header(root);
2015                 --sp->root_count;
2016                 if (!sp->root_count && sp->role.invalid)
2017                         kvm_mmu_zap_page(vcpu->kvm, sp);
2018                 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2019                 spin_unlock(&vcpu->kvm->mmu_lock);
2020                 return;
2021         }
2022         for (i = 0; i < 4; ++i) {
2023                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2024
2025                 if (root) {
2026                         root &= PT64_BASE_ADDR_MASK;
2027                         sp = page_header(root);
2028                         --sp->root_count;
2029                         if (!sp->root_count && sp->role.invalid)
2030                                 kvm_mmu_zap_page(vcpu->kvm, sp);
2031                 }
2032                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2033         }
2034         spin_unlock(&vcpu->kvm->mmu_lock);
2035         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2036 }
2037
2038 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2039 {
2040         int ret = 0;
2041
2042         if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2043                 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2044                 ret = 1;
2045         }
2046
2047         return ret;
2048 }
2049
2050 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2051 {
2052         int i;
2053         gfn_t root_gfn;
2054         struct kvm_mmu_page *sp;
2055         int direct = 0;
2056         u64 pdptr;
2057
2058         root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2059
2060         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2061                 hpa_t root = vcpu->arch.mmu.root_hpa;
2062
2063                 ASSERT(!VALID_PAGE(root));
2064                 if (mmu_check_root(vcpu, root_gfn))
2065                         return 1;
2066                 if (tdp_enabled) {
2067                         direct = 1;
2068                         root_gfn = 0;
2069                 }
2070                 spin_lock(&vcpu->kvm->mmu_lock);
2071                 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2072                                       PT64_ROOT_LEVEL, direct,
2073                                       ACC_ALL, NULL);
2074                 root = __pa(sp->spt);
2075                 ++sp->root_count;
2076                 spin_unlock(&vcpu->kvm->mmu_lock);
2077                 vcpu->arch.mmu.root_hpa = root;
2078                 return 0;
2079         }
2080         direct = !is_paging(vcpu);
2081         for (i = 0; i < 4; ++i) {
2082                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2083
2084                 ASSERT(!VALID_PAGE(root));
2085                 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2086                         pdptr = kvm_pdptr_read(vcpu, i);
2087                         if (!is_present_gpte(pdptr)) {
2088                                 vcpu->arch.mmu.pae_root[i] = 0;
2089                                 continue;
2090                         }
2091                         root_gfn = pdptr >> PAGE_SHIFT;
2092                 } else if (vcpu->arch.mmu.root_level == 0)
2093                         root_gfn = 0;
2094                 if (mmu_check_root(vcpu, root_gfn))
2095                         return 1;
2096                 if (tdp_enabled) {
2097                         direct = 1;
2098                         root_gfn = i << 30;
2099                 }
2100                 spin_lock(&vcpu->kvm->mmu_lock);
2101                 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2102                                       PT32_ROOT_LEVEL, direct,
2103                                       ACC_ALL, NULL);
2104                 root = __pa(sp->spt);
2105                 ++sp->root_count;
2106                 spin_unlock(&vcpu->kvm->mmu_lock);
2107
2108                 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2109         }
2110         vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2111         return 0;
2112 }
2113
2114 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2115 {
2116         int i;
2117         struct kvm_mmu_page *sp;
2118
2119         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2120                 return;
2121         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2122                 hpa_t root = vcpu->arch.mmu.root_hpa;
2123                 sp = page_header(root);
2124                 mmu_sync_children(vcpu, sp);
2125                 return;
2126         }
2127         for (i = 0; i < 4; ++i) {
2128                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2129
2130                 if (root && VALID_PAGE(root)) {
2131                         root &= PT64_BASE_ADDR_MASK;
2132                         sp = page_header(root);
2133                         mmu_sync_children(vcpu, sp);
2134                 }
2135         }
2136 }
2137
2138 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2139 {
2140         spin_lock(&vcpu->kvm->mmu_lock);
2141         mmu_sync_roots(vcpu);
2142         spin_unlock(&vcpu->kvm->mmu_lock);
2143 }
2144
2145 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2146                                   u32 access, u32 *error)
2147 {
2148         if (error)
2149                 *error = 0;
2150         return vaddr;
2151 }
2152
2153 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2154                                 u32 error_code)
2155 {
2156         gfn_t gfn;
2157         int r;
2158
2159         pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2160         r = mmu_topup_memory_caches(vcpu);
2161         if (r)
2162                 return r;
2163
2164         ASSERT(vcpu);
2165         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2166
2167         gfn = gva >> PAGE_SHIFT;
2168
2169         return nonpaging_map(vcpu, gva & PAGE_MASK,
2170                              error_code & PFERR_WRITE_MASK, gfn);
2171 }
2172
2173 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2174                                 u32 error_code)
2175 {
2176         pfn_t pfn;
2177         int r;
2178         int level;
2179         gfn_t gfn = gpa >> PAGE_SHIFT;
2180         unsigned long mmu_seq;
2181
2182         ASSERT(vcpu);
2183         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2184
2185         r = mmu_topup_memory_caches(vcpu);
2186         if (r)
2187                 return r;
2188
2189         level = mapping_level(vcpu, gfn);
2190
2191         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2192
2193         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2194         smp_rmb();
2195         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2196         if (is_error_pfn(pfn)) {
2197                 kvm_release_pfn_clean(pfn);
2198                 return 1;
2199         }
2200         spin_lock(&vcpu->kvm->mmu_lock);
2201         if (mmu_notifier_retry(vcpu, mmu_seq))
2202                 goto out_unlock;
2203         kvm_mmu_free_some_pages(vcpu);
2204         r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2205                          level, gfn, pfn);
2206         spin_unlock(&vcpu->kvm->mmu_lock);
2207
2208         return r;
2209
2210 out_unlock:
2211         spin_unlock(&vcpu->kvm->mmu_lock);
2212         kvm_release_pfn_clean(pfn);
2213         return 0;
2214 }
2215
2216 static void nonpaging_free(struct kvm_vcpu *vcpu)
2217 {
2218         mmu_free_roots(vcpu);
2219 }
2220
2221 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2222 {
2223         struct kvm_mmu *context = &vcpu->arch.mmu;
2224
2225         context->new_cr3 = nonpaging_new_cr3;
2226         context->page_fault = nonpaging_page_fault;
2227         context->gva_to_gpa = nonpaging_gva_to_gpa;
2228         context->free = nonpaging_free;
2229         context->prefetch_page = nonpaging_prefetch_page;
2230         context->sync_page = nonpaging_sync_page;
2231         context->invlpg = nonpaging_invlpg;
2232         context->root_level = 0;
2233         context->shadow_root_level = PT32E_ROOT_LEVEL;
2234         context->root_hpa = INVALID_PAGE;
2235         return 0;
2236 }
2237
2238 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2239 {
2240         ++vcpu->stat.tlb_flush;
2241         kvm_x86_ops->tlb_flush(vcpu);
2242 }
2243
2244 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2245 {
2246         pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2247         mmu_free_roots(vcpu);
2248 }
2249
2250 static void inject_page_fault(struct kvm_vcpu *vcpu,
2251                               u64 addr,
2252                               u32 err_code)
2253 {
2254         kvm_inject_page_fault(vcpu, addr, err_code);
2255 }
2256
2257 static void paging_free(struct kvm_vcpu *vcpu)
2258 {
2259         nonpaging_free(vcpu);
2260 }
2261
2262 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2263 {
2264         int bit7;
2265
2266         bit7 = (gpte >> 7) & 1;
2267         return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2268 }
2269
2270 #define PTTYPE 64
2271 #include "paging_tmpl.h"
2272 #undef PTTYPE
2273
2274 #define PTTYPE 32
2275 #include "paging_tmpl.h"
2276 #undef PTTYPE
2277
2278 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2279 {
2280         struct kvm_mmu *context = &vcpu->arch.mmu;
2281         int maxphyaddr = cpuid_maxphyaddr(vcpu);
2282         u64 exb_bit_rsvd = 0;
2283
2284         if (!is_nx(vcpu))
2285                 exb_bit_rsvd = rsvd_bits(63, 63);
2286         switch (level) {
2287         case PT32_ROOT_LEVEL:
2288                 /* no rsvd bits for 2 level 4K page table entries */
2289                 context->rsvd_bits_mask[0][1] = 0;
2290                 context->rsvd_bits_mask[0][0] = 0;
2291                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2292
2293                 if (!is_pse(vcpu)) {
2294                         context->rsvd_bits_mask[1][1] = 0;
2295                         break;
2296                 }
2297
2298                 if (is_cpuid_PSE36())
2299                         /* 36bits PSE 4MB page */
2300                         context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2301                 else
2302                         /* 32 bits PSE 4MB page */
2303                         context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2304                 break;
2305         case PT32E_ROOT_LEVEL:
2306                 context->rsvd_bits_mask[0][2] =
2307                         rsvd_bits(maxphyaddr, 63) |
2308                         rsvd_bits(7, 8) | rsvd_bits(1, 2);      /* PDPTE */
2309                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2310                         rsvd_bits(maxphyaddr, 62);      /* PDE */
2311                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2312                         rsvd_bits(maxphyaddr, 62);      /* PTE */
2313                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2314                         rsvd_bits(maxphyaddr, 62) |
2315                         rsvd_bits(13, 20);              /* large page */
2316                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2317                 break;
2318         case PT64_ROOT_LEVEL:
2319                 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2320                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2321                 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2322                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2323                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2324                         rsvd_bits(maxphyaddr, 51);
2325                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2326                         rsvd_bits(maxphyaddr, 51);
2327                 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2328                 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2329                         rsvd_bits(maxphyaddr, 51) |
2330                         rsvd_bits(13, 29);
2331                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2332                         rsvd_bits(maxphyaddr, 51) |
2333                         rsvd_bits(13, 20);              /* large page */
2334                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2335                 break;
2336         }
2337 }
2338
2339 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2340 {
2341         struct kvm_mmu *context = &vcpu->arch.mmu;
2342
2343         ASSERT(is_pae(vcpu));
2344         context->new_cr3 = paging_new_cr3;
2345         context->page_fault = paging64_page_fault;
2346         context->gva_to_gpa = paging64_gva_to_gpa;
2347         context->prefetch_page = paging64_prefetch_page;
2348         context->sync_page = paging64_sync_page;
2349         context->invlpg = paging64_invlpg;
2350         context->free = paging_free;
2351         context->root_level = level;
2352         context->shadow_root_level = level;
2353         context->root_hpa = INVALID_PAGE;
2354         return 0;
2355 }
2356
2357 static int paging64_init_context(struct kvm_vcpu *vcpu)
2358 {
2359         reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2360         return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2361 }
2362
2363 static int paging32_init_context(struct kvm_vcpu *vcpu)
2364 {
2365         struct kvm_mmu *context = &vcpu->arch.mmu;
2366
2367         reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2368         context->new_cr3 = paging_new_cr3;
2369         context->page_fault = paging32_page_fault;
2370         context->gva_to_gpa = paging32_gva_to_gpa;
2371         context->free = paging_free;
2372         context->prefetch_page = paging32_prefetch_page;
2373         context->sync_page = paging32_sync_page;
2374         context->invlpg = paging32_invlpg;
2375         context->root_level = PT32_ROOT_LEVEL;
2376         context->shadow_root_level = PT32E_ROOT_LEVEL;
2377         context->root_hpa = INVALID_PAGE;
2378         return 0;
2379 }
2380
2381 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2382 {
2383         reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2384         return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2385 }
2386
2387 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2388 {
2389         struct kvm_mmu *context = &vcpu->arch.mmu;
2390
2391         context->new_cr3 = nonpaging_new_cr3;
2392         context->page_fault = tdp_page_fault;
2393         context->free = nonpaging_free;
2394         context->prefetch_page = nonpaging_prefetch_page;
2395         context->sync_page = nonpaging_sync_page;
2396         context->invlpg = nonpaging_invlpg;
2397         context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2398         context->root_hpa = INVALID_PAGE;
2399
2400         if (!is_paging(vcpu)) {
2401                 context->gva_to_gpa = nonpaging_gva_to_gpa;
2402                 context->root_level = 0;
2403         } else if (is_long_mode(vcpu)) {
2404                 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2405                 context->gva_to_gpa = paging64_gva_to_gpa;
2406                 context->root_level = PT64_ROOT_LEVEL;
2407         } else if (is_pae(vcpu)) {
2408                 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2409                 context->gva_to_gpa = paging64_gva_to_gpa;
2410                 context->root_level = PT32E_ROOT_LEVEL;
2411         } else {
2412                 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2413                 context->gva_to_gpa = paging32_gva_to_gpa;
2414                 context->root_level = PT32_ROOT_LEVEL;
2415         }
2416
2417         return 0;
2418 }
2419
2420 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2421 {
2422         int r;
2423
2424         ASSERT(vcpu);
2425         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2426
2427         if (!is_paging(vcpu))
2428                 r = nonpaging_init_context(vcpu);
2429         else if (is_long_mode(vcpu))
2430                 r = paging64_init_context(vcpu);
2431         else if (is_pae(vcpu))
2432                 r = paging32E_init_context(vcpu);
2433         else
2434                 r = paging32_init_context(vcpu);
2435
2436         vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2437         vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
2438
2439         return r;
2440 }
2441
2442 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2443 {
2444         vcpu->arch.update_pte.pfn = bad_pfn;
2445
2446         if (tdp_enabled)
2447                 return init_kvm_tdp_mmu(vcpu);
2448         else
2449                 return init_kvm_softmmu(vcpu);
2450 }
2451
2452 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2453 {
2454         ASSERT(vcpu);
2455         if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2456                 vcpu->arch.mmu.free(vcpu);
2457                 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2458         }
2459 }
2460
2461 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2462 {
2463         destroy_kvm_mmu(vcpu);
2464         return init_kvm_mmu(vcpu);
2465 }
2466 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2467
2468 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2469 {
2470         int r;
2471
2472         r = mmu_topup_memory_caches(vcpu);
2473         if (r)
2474                 goto out;
2475         spin_lock(&vcpu->kvm->mmu_lock);
2476         kvm_mmu_free_some_pages(vcpu);
2477         spin_unlock(&vcpu->kvm->mmu_lock);
2478         r = mmu_alloc_roots(vcpu);
2479         spin_lock(&vcpu->kvm->mmu_lock);
2480         mmu_sync_roots(vcpu);
2481         spin_unlock(&vcpu->kvm->mmu_lock);
2482         if (r)
2483                 goto out;
2484         /* set_cr3() should ensure TLB has been flushed */
2485         kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2486 out:
2487         return r;
2488 }
2489 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2490
2491 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2492 {
2493         mmu_free_roots(vcpu);
2494 }
2495
2496 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2497                                   struct kvm_mmu_page *sp,
2498                                   u64 *spte)
2499 {
2500         u64 pte;
2501         struct kvm_mmu_page *child;
2502
2503         pte = *spte;
2504         if (is_shadow_present_pte(pte)) {
2505                 if (is_last_spte(pte, sp->role.level))
2506                         rmap_remove(vcpu->kvm, spte);
2507                 else {
2508                         child = page_header(pte & PT64_BASE_ADDR_MASK);
2509                         mmu_page_remove_parent_pte(child, spte);
2510                 }
2511         }
2512         __set_spte(spte, shadow_trap_nonpresent_pte);
2513         if (is_large_pte(pte))
2514                 --vcpu->kvm->stat.lpages;
2515 }
2516
2517 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2518                                   struct kvm_mmu_page *sp,
2519                                   u64 *spte,
2520                                   const void *new)
2521 {
2522         if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2523                 ++vcpu->kvm->stat.mmu_pde_zapped;
2524                 return;
2525         }
2526
2527         ++vcpu->kvm->stat.mmu_pte_updated;
2528         if (!sp->role.cr4_pae)
2529                 paging32_update_pte(vcpu, sp, spte, new);
2530         else
2531                 paging64_update_pte(vcpu, sp, spte, new);
2532 }
2533
2534 static bool need_remote_flush(u64 old, u64 new)
2535 {
2536         if (!is_shadow_present_pte(old))
2537                 return false;
2538         if (!is_shadow_present_pte(new))
2539                 return true;
2540         if ((old ^ new) & PT64_BASE_ADDR_MASK)
2541                 return true;
2542         old ^= PT64_NX_MASK;
2543         new ^= PT64_NX_MASK;
2544         return (old & ~new & PT64_PERM_MASK) != 0;
2545 }
2546
2547 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2548 {
2549         if (need_remote_flush(old, new))
2550                 kvm_flush_remote_tlbs(vcpu->kvm);
2551         else
2552                 kvm_mmu_flush_tlb(vcpu);
2553 }
2554
2555 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2556 {
2557         u64 *spte = vcpu->arch.last_pte_updated;
2558
2559         return !!(spte && (*spte & shadow_accessed_mask));
2560 }
2561
2562 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2563                                           u64 gpte)
2564 {
2565         gfn_t gfn;
2566         pfn_t pfn;
2567
2568         if (!is_present_gpte(gpte))
2569                 return;
2570         gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2571
2572         vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2573         smp_rmb();
2574         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2575
2576         if (is_error_pfn(pfn)) {
2577                 kvm_release_pfn_clean(pfn);
2578                 return;
2579         }
2580         vcpu->arch.update_pte.gfn = gfn;
2581         vcpu->arch.update_pte.pfn = pfn;
2582 }
2583
2584 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2585 {
2586         u64 *spte = vcpu->arch.last_pte_updated;
2587
2588         if (spte
2589             && vcpu->arch.last_pte_gfn == gfn
2590             && shadow_accessed_mask
2591             && !(*spte & shadow_accessed_mask)
2592             && is_shadow_present_pte(*spte))
2593                 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2594 }
2595
2596 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2597                        const u8 *new, int bytes,
2598                        bool guest_initiated)
2599 {
2600         gfn_t gfn = gpa >> PAGE_SHIFT;
2601         struct kvm_mmu_page *sp;
2602         struct hlist_node *node, *n;
2603         struct hlist_head *bucket;
2604         unsigned index;
2605         u64 entry, gentry;
2606         u64 *spte;
2607         unsigned offset = offset_in_page(gpa);
2608         unsigned pte_size;
2609         unsigned page_offset;
2610         unsigned misaligned;
2611         unsigned quadrant;
2612         int level;
2613         int flooded = 0;
2614         int npte;
2615         int r;
2616         int invlpg_counter;
2617
2618         pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2619
2620         invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
2621
2622         /*
2623          * Assume that the pte write on a page table of the same type
2624          * as the current vcpu paging mode.  This is nearly always true
2625          * (might be false while changing modes).  Note it is verified later
2626          * by update_pte().
2627          */
2628         if ((is_pae(vcpu) && bytes == 4) || !new) {
2629                 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2630                 if (is_pae(vcpu)) {
2631                         gpa &= ~(gpa_t)7;
2632                         bytes = 8;
2633                 }
2634                 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
2635                 if (r)
2636                         gentry = 0;
2637                 new = (const u8 *)&gentry;
2638         }
2639
2640         switch (bytes) {
2641         case 4:
2642                 gentry = *(const u32 *)new;
2643                 break;
2644         case 8:
2645                 gentry = *(const u64 *)new;
2646                 break;
2647         default:
2648                 gentry = 0;
2649                 break;
2650         }
2651
2652         mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
2653         spin_lock(&vcpu->kvm->mmu_lock);
2654         if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2655                 gentry = 0;
2656         kvm_mmu_access_page(vcpu, gfn);
2657         kvm_mmu_free_some_pages(vcpu);
2658         ++vcpu->kvm->stat.mmu_pte_write;
2659         kvm_mmu_audit(vcpu, "pre pte write");
2660         if (guest_initiated) {
2661                 if (gfn == vcpu->arch.last_pt_write_gfn
2662                     && !last_updated_pte_accessed(vcpu)) {
2663                         ++vcpu->arch.last_pt_write_count;
2664                         if (vcpu->arch.last_pt_write_count >= 3)
2665                                 flooded = 1;
2666                 } else {
2667                         vcpu->arch.last_pt_write_gfn = gfn;
2668                         vcpu->arch.last_pt_write_count = 1;
2669                         vcpu->arch.last_pte_updated = NULL;
2670                 }
2671         }
2672         index = kvm_page_table_hashfn(gfn);
2673         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2674
2675 restart:
2676         hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2677                 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2678                         continue;
2679                 pte_size = sp->role.cr4_pae ? 8 : 4;
2680                 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2681                 misaligned |= bytes < 4;
2682                 if (misaligned || flooded) {
2683                         /*
2684                          * Misaligned accesses are too much trouble to fix
2685                          * up; also, they usually indicate a page is not used
2686                          * as a page table.
2687                          *
2688                          * If we're seeing too many writes to a page,
2689                          * it may no longer be a page table, or we may be
2690                          * forking, in which case it is better to unmap the
2691                          * page.
2692                          */
2693                         pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2694                                  gpa, bytes, sp->role.word);
2695                         if (kvm_mmu_zap_page(vcpu->kvm, sp))
2696                                 goto restart;
2697                         ++vcpu->kvm->stat.mmu_flooded;
2698                         continue;
2699                 }
2700                 page_offset = offset;
2701                 level = sp->role.level;
2702                 npte = 1;
2703                 if (!sp->role.cr4_pae) {
2704                         page_offset <<= 1;      /* 32->64 */
2705                         /*
2706                          * A 32-bit pde maps 4MB while the shadow pdes map
2707                          * only 2MB.  So we need to double the offset again
2708                          * and zap two pdes instead of one.
2709                          */
2710                         if (level == PT32_ROOT_LEVEL) {
2711                                 page_offset &= ~7; /* kill rounding error */
2712                                 page_offset <<= 1;
2713                                 npte = 2;
2714                         }
2715                         quadrant = page_offset >> PAGE_SHIFT;
2716                         page_offset &= ~PAGE_MASK;
2717                         if (quadrant != sp->role.quadrant)
2718                                 continue;
2719                 }
2720                 spte = &sp->spt[page_offset / sizeof(*spte)];
2721                 while (npte--) {
2722                         entry = *spte;
2723                         mmu_pte_write_zap_pte(vcpu, sp, spte);
2724                         if (gentry)
2725                                 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
2726                         mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2727                         ++spte;
2728                 }
2729         }
2730         kvm_mmu_audit(vcpu, "post pte write");
2731         spin_unlock(&vcpu->kvm->mmu_lock);
2732         if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2733                 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2734                 vcpu->arch.update_pte.pfn = bad_pfn;
2735         }
2736 }
2737
2738 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2739 {
2740         gpa_t gpa;
2741         int r;
2742
2743         if (tdp_enabled)
2744                 return 0;
2745
2746         gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2747
2748         spin_lock(&vcpu->kvm->mmu_lock);
2749         r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2750         spin_unlock(&vcpu->kvm->mmu_lock);
2751         return r;
2752 }
2753 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2754
2755 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2756 {
2757         while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2758                !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2759                 struct kvm_mmu_page *sp;
2760
2761                 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2762                                   struct kvm_mmu_page, link);
2763                 kvm_mmu_zap_page(vcpu->kvm, sp);
2764                 ++vcpu->kvm->stat.mmu_recycled;
2765         }
2766 }
2767
2768 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2769 {
2770         int r;
2771         enum emulation_result er;
2772
2773         r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2774         if (r < 0)
2775                 goto out;
2776
2777         if (!r) {
2778                 r = 1;
2779                 goto out;
2780         }
2781
2782         r = mmu_topup_memory_caches(vcpu);
2783         if (r)
2784                 goto out;
2785
2786         er = emulate_instruction(vcpu, cr2, error_code, 0);
2787
2788         switch (er) {
2789         case EMULATE_DONE:
2790                 return 1;
2791         case EMULATE_DO_MMIO:
2792                 ++vcpu->stat.mmio_exits;
2793                 return 0;
2794         case EMULATE_FAIL:
2795                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2796                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
2797                 vcpu->run->internal.ndata = 0;
2798                 return 0;
2799         default:
2800                 BUG();
2801         }
2802 out:
2803         return r;
2804 }
2805 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2806
2807 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2808 {
2809         vcpu->arch.mmu.invlpg(vcpu, gva);
2810         kvm_mmu_flush_tlb(vcpu);
2811         ++vcpu->stat.invlpg;
2812 }
2813 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2814
2815 void kvm_enable_tdp(void)
2816 {
2817         tdp_enabled = true;
2818 }
2819 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2820
2821 void kvm_disable_tdp(void)
2822 {
2823         tdp_enabled = false;
2824 }
2825 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2826
2827 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2828 {
2829         free_page((unsigned long)vcpu->arch.mmu.pae_root);
2830 }
2831
2832 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2833 {
2834         struct page *page;
2835         int i;
2836
2837         ASSERT(vcpu);
2838
2839         /*
2840          * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2841          * Therefore we need to allocate shadow page tables in the first
2842          * 4GB of memory, which happens to fit the DMA32 zone.
2843          */
2844         page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2845         if (!page)
2846                 return -ENOMEM;
2847
2848         vcpu->arch.mmu.pae_root = page_address(page);
2849         for (i = 0; i < 4; ++i)
2850                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2851
2852         return 0;
2853 }
2854
2855 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2856 {
2857         ASSERT(vcpu);
2858         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2859
2860         return alloc_mmu_pages(vcpu);
2861 }
2862
2863 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2864 {
2865         ASSERT(vcpu);
2866         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2867
2868         return init_kvm_mmu(vcpu);
2869 }
2870
2871 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2872 {
2873         ASSERT(vcpu);
2874
2875         destroy_kvm_mmu(vcpu);
2876         free_mmu_pages(vcpu);
2877         mmu_free_memory_caches(vcpu);
2878 }
2879
2880 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2881 {
2882         struct kvm_mmu_page *sp;
2883
2884         list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2885                 int i;
2886                 u64 *pt;
2887
2888                 if (!test_bit(slot, sp->slot_bitmap))
2889                         continue;
2890
2891                 pt = sp->spt;
2892                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2893                         /* avoid RMW */
2894                         if (pt[i] & PT_WRITABLE_MASK)
2895                                 pt[i] &= ~PT_WRITABLE_MASK;
2896         }
2897         kvm_flush_remote_tlbs(kvm);
2898 }
2899
2900 void kvm_mmu_zap_all(struct kvm *kvm)
2901 {
2902         struct kvm_mmu_page *sp, *node;
2903
2904         spin_lock(&kvm->mmu_lock);
2905 restart:
2906         list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2907                 if (kvm_mmu_zap_page(kvm, sp))
2908                         goto restart;
2909
2910         spin_unlock(&kvm->mmu_lock);
2911
2912         kvm_flush_remote_tlbs(kvm);
2913 }
2914
2915 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm)
2916 {
2917         struct kvm_mmu_page *page;
2918
2919         page = container_of(kvm->arch.active_mmu_pages.prev,
2920                             struct kvm_mmu_page, link);
2921         return kvm_mmu_zap_page(kvm, page) + 1;
2922 }
2923
2924 static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2925 {
2926         struct kvm *kvm;
2927         struct kvm *kvm_freed = NULL;
2928         int cache_count = 0;
2929
2930         spin_lock(&kvm_lock);
2931
2932         list_for_each_entry(kvm, &vm_list, vm_list) {
2933                 int npages, idx, freed_pages;
2934
2935                 idx = srcu_read_lock(&kvm->srcu);
2936                 spin_lock(&kvm->mmu_lock);
2937                 npages = kvm->arch.n_alloc_mmu_pages -
2938                          kvm->arch.n_free_mmu_pages;
2939                 cache_count += npages;
2940                 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2941                         freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm);
2942                         cache_count -= freed_pages;
2943                         kvm_freed = kvm;
2944                 }
2945                 nr_to_scan--;
2946
2947                 spin_unlock(&kvm->mmu_lock);
2948                 srcu_read_unlock(&kvm->srcu, idx);
2949         }
2950         if (kvm_freed)
2951                 list_move_tail(&kvm_freed->vm_list, &vm_list);
2952
2953         spin_unlock(&kvm_lock);
2954
2955         return cache_count;
2956 }
2957
2958 static struct shrinker mmu_shrinker = {
2959         .shrink = mmu_shrink,
2960         .seeks = DEFAULT_SEEKS * 10,
2961 };
2962
2963 static void mmu_destroy_caches(void)
2964 {
2965         if (pte_chain_cache)
2966                 kmem_cache_destroy(pte_chain_cache);
2967         if (rmap_desc_cache)
2968                 kmem_cache_destroy(rmap_desc_cache);
2969         if (mmu_page_header_cache)
2970                 kmem_cache_destroy(mmu_page_header_cache);
2971 }
2972
2973 void kvm_mmu_module_exit(void)
2974 {
2975         mmu_destroy_caches();
2976         unregister_shrinker(&mmu_shrinker);
2977 }
2978
2979 int kvm_mmu_module_init(void)
2980 {
2981         pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2982                                             sizeof(struct kvm_pte_chain),
2983                                             0, 0, NULL);
2984         if (!pte_chain_cache)
2985                 goto nomem;
2986         rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2987                                             sizeof(struct kvm_rmap_desc),
2988                                             0, 0, NULL);
2989         if (!rmap_desc_cache)
2990                 goto nomem;
2991
2992         mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2993                                                   sizeof(struct kvm_mmu_page),
2994                                                   0, 0, NULL);
2995         if (!mmu_page_header_cache)
2996                 goto nomem;
2997
2998         register_shrinker(&mmu_shrinker);
2999
3000         return 0;
3001
3002 nomem:
3003         mmu_destroy_caches();
3004         return -ENOMEM;
3005 }
3006
3007 /*
3008  * Caculate mmu pages needed for kvm.
3009  */
3010 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3011 {
3012         int i;
3013         unsigned int nr_mmu_pages;
3014         unsigned int  nr_pages = 0;
3015         struct kvm_memslots *slots;
3016
3017         slots = kvm_memslots(kvm);
3018
3019         for (i = 0; i < slots->nmemslots; i++)
3020                 nr_pages += slots->memslots[i].npages;
3021
3022         nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3023         nr_mmu_pages = max(nr_mmu_pages,
3024                         (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3025
3026         return nr_mmu_pages;
3027 }
3028
3029 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3030                                 unsigned len)
3031 {
3032         if (len > buffer->len)
3033                 return NULL;
3034         return buffer->ptr;
3035 }
3036
3037 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3038                                 unsigned len)
3039 {
3040         void *ret;
3041
3042         ret = pv_mmu_peek_buffer(buffer, len);
3043         if (!ret)
3044                 return ret;
3045         buffer->ptr += len;
3046         buffer->len -= len;
3047         buffer->processed += len;
3048         return ret;
3049 }
3050
3051 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3052                              gpa_t addr, gpa_t value)
3053 {
3054         int bytes = 8;
3055         int r;
3056
3057         if (!is_long_mode(vcpu) && !is_pae(vcpu))
3058                 bytes = 4;
3059
3060         r = mmu_topup_memory_caches(vcpu);
3061         if (r)
3062                 return r;
3063
3064         if (!emulator_write_phys(vcpu, addr, &value, bytes))
3065                 return -EFAULT;
3066
3067         return 1;
3068 }
3069
3070 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3071 {
3072         kvm_set_cr3(vcpu, vcpu->arch.cr3);
3073         return 1;
3074 }
3075
3076 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3077 {
3078         spin_lock(&vcpu->kvm->mmu_lock);
3079         mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3080         spin_unlock(&vcpu->kvm->mmu_lock);
3081         return 1;
3082 }
3083
3084 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3085                              struct kvm_pv_mmu_op_buffer *buffer)
3086 {
3087         struct kvm_mmu_op_header *header;
3088
3089         header = pv_mmu_peek_buffer(buffer, sizeof *header);
3090         if (!header)
3091                 return 0;
3092         switch (header->op) {
3093         case KVM_MMU_OP_WRITE_PTE: {
3094                 struct kvm_mmu_op_write_pte *wpte;
3095
3096                 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3097                 if (!wpte)
3098                         return 0;
3099                 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3100                                         wpte->pte_val);
3101         }
3102         case KVM_MMU_OP_FLUSH_TLB: {
3103                 struct kvm_mmu_op_flush_tlb *ftlb;
3104
3105                 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3106                 if (!ftlb)
3107                         return 0;
3108                 return kvm_pv_mmu_flush_tlb(vcpu);
3109         }
3110         case KVM_MMU_OP_RELEASE_PT: {
3111                 struct kvm_mmu_op_release_pt *rpt;
3112
3113                 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3114                 if (!rpt)
3115                         return 0;
3116                 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3117         }
3118         default: return 0;
3119         }
3120 }
3121
3122 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3123                   gpa_t addr, unsigned long *ret)
3124 {
3125         int r;
3126         struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3127
3128         buffer->ptr = buffer->buf;
3129         buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3130         buffer->processed = 0;
3131
3132         r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3133         if (r)
3134                 goto out;
3135
3136         while (buffer->len) {
3137                 r = kvm_pv_mmu_op_one(vcpu, buffer);
3138                 if (r < 0)
3139                         goto out;
3140                 if (r == 0)
3141                         break;
3142         }
3143
3144         r = 1;
3145 out:
3146         *ret = buffer->processed;
3147         return r;
3148 }
3149
3150 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3151 {
3152         struct kvm_shadow_walk_iterator iterator;
3153         int nr_sptes = 0;
3154
3155         spin_lock(&vcpu->kvm->mmu_lock);
3156         for_each_shadow_entry(vcpu, addr, iterator) {
3157                 sptes[iterator.level-1] = *iterator.sptep;
3158                 nr_sptes++;
3159                 if (!is_shadow_present_pte(*iterator.sptep))
3160                         break;
3161         }
3162         spin_unlock(&vcpu->kvm->mmu_lock);
3163
3164         return nr_sptes;
3165 }
3166 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3167
3168 #ifdef AUDIT
3169
3170 static const char *audit_msg;
3171
3172 static gva_t canonicalize(gva_t gva)
3173 {
3174 #ifdef CONFIG_X86_64
3175         gva = (long long)(gva << 16) >> 16;
3176 #endif
3177         return gva;
3178 }
3179
3180
3181 typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
3182
3183 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3184                             inspect_spte_fn fn)
3185 {
3186         int i;
3187
3188         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3189                 u64 ent = sp->spt[i];
3190
3191                 if (is_shadow_present_pte(ent)) {
3192                         if (!is_last_spte(ent, sp->role.level)) {
3193                                 struct kvm_mmu_page *child;
3194                                 child = page_header(ent & PT64_BASE_ADDR_MASK);
3195                                 __mmu_spte_walk(kvm, child, fn);
3196                         } else
3197                                 fn(kvm, &sp->spt[i]);
3198                 }
3199         }
3200 }
3201
3202 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3203 {
3204         int i;
3205         struct kvm_mmu_page *sp;
3206
3207         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3208                 return;
3209         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3210                 hpa_t root = vcpu->arch.mmu.root_hpa;
3211                 sp = page_header(root);
3212                 __mmu_spte_walk(vcpu->kvm, sp, fn);
3213                 return;
3214         }
3215         for (i = 0; i < 4; ++i) {
3216                 hpa_t root = vcpu->arch.mmu.pae_root[i];
3217
3218                 if (root && VALID_PAGE(root)) {
3219                         root &= PT64_BASE_ADDR_MASK;
3220                         sp = page_header(root);
3221                         __mmu_spte_walk(vcpu->kvm, sp, fn);
3222                 }
3223         }
3224         return;
3225 }
3226
3227 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3228                                 gva_t va, int level)
3229 {
3230         u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3231         int i;
3232         gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3233
3234         for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3235                 u64 ent = pt[i];
3236
3237                 if (ent == shadow_trap_nonpresent_pte)
3238                         continue;
3239
3240                 va = canonicalize(va);
3241                 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3242                         audit_mappings_page(vcpu, ent, va, level - 1);
3243                 else {
3244                         gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3245                         gfn_t gfn = gpa >> PAGE_SHIFT;
3246                         pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3247                         hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3248
3249                         if (is_error_pfn(pfn)) {
3250                                 kvm_release_pfn_clean(pfn);
3251                                 continue;
3252                         }
3253
3254                         if (is_shadow_present_pte(ent)
3255                             && (ent & PT64_BASE_ADDR_MASK) != hpa)
3256                                 printk(KERN_ERR "xx audit error: (%s) levels %d"
3257                                        " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3258                                        audit_msg, vcpu->arch.mmu.root_level,
3259                                        va, gpa, hpa, ent,
3260                                        is_shadow_present_pte(ent));
3261                         else if (ent == shadow_notrap_nonpresent_pte
3262                                  && !is_error_hpa(hpa))
3263                                 printk(KERN_ERR "audit: (%s) notrap shadow,"
3264                                        " valid guest gva %lx\n", audit_msg, va);
3265                         kvm_release_pfn_clean(pfn);
3266
3267                 }
3268         }
3269 }
3270
3271 static void audit_mappings(struct kvm_vcpu *vcpu)
3272 {
3273         unsigned i;
3274
3275         if (vcpu->arch.mmu.root_level == 4)
3276                 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3277         else
3278                 for (i = 0; i < 4; ++i)
3279                         if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3280                                 audit_mappings_page(vcpu,
3281                                                     vcpu->arch.mmu.pae_root[i],
3282                                                     i << 30,
3283                                                     2);
3284 }
3285
3286 static int count_rmaps(struct kvm_vcpu *vcpu)
3287 {
3288         struct kvm *kvm = vcpu->kvm;
3289         struct kvm_memslots *slots;
3290         int nmaps = 0;
3291         int i, j, k, idx;
3292
3293         idx = srcu_read_lock(&kvm->srcu);
3294         slots = kvm_memslots(kvm);
3295         for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3296                 struct kvm_memory_slot *m = &slots->memslots[i];
3297                 struct kvm_rmap_desc *d;
3298
3299                 for (j = 0; j < m->npages; ++j) {
3300                         unsigned long *rmapp = &m->rmap[j];
3301
3302                         if (!*rmapp)
3303                                 continue;
3304                         if (!(*rmapp & 1)) {
3305                                 ++nmaps;
3306                                 continue;
3307                         }
3308                         d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3309                         while (d) {
3310                                 for (k = 0; k < RMAP_EXT; ++k)
3311                                         if (d->sptes[k])
3312                                                 ++nmaps;
3313                                         else
3314                                                 break;
3315                                 d = d->more;
3316                         }
3317                 }
3318         }
3319         srcu_read_unlock(&kvm->srcu, idx);
3320         return nmaps;
3321 }
3322
3323 void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
3324 {
3325         unsigned long *rmapp;
3326         struct kvm_mmu_page *rev_sp;
3327         gfn_t gfn;
3328
3329         if (*sptep & PT_WRITABLE_MASK) {
3330                 rev_sp = page_header(__pa(sptep));
3331                 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3332
3333                 if (!gfn_to_memslot(kvm, gfn)) {
3334                         if (!printk_ratelimit())
3335                                 return;
3336                         printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3337                                          audit_msg, gfn);
3338                         printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3339                                audit_msg, (long int)(sptep - rev_sp->spt),
3340                                         rev_sp->gfn);
3341                         dump_stack();
3342                         return;
3343                 }
3344
3345                 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3346                                     rev_sp->role.level);
3347                 if (!*rmapp) {
3348                         if (!printk_ratelimit())
3349                                 return;
3350                         printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3351                                          audit_msg, *sptep);
3352                         dump_stack();
3353                 }
3354         }
3355
3356 }
3357
3358 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3359 {
3360         mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3361 }
3362
3363 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3364 {
3365         struct kvm_mmu_page *sp;
3366         int i;
3367
3368         list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3369                 u64 *pt = sp->spt;
3370
3371                 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3372                         continue;
3373
3374                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3375                         u64 ent = pt[i];
3376
3377                         if (!(ent & PT_PRESENT_MASK))
3378                                 continue;
3379                         if (!(ent & PT_WRITABLE_MASK))
3380                                 continue;
3381                         inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
3382                 }
3383         }
3384         return;
3385 }
3386
3387 static void audit_rmap(struct kvm_vcpu *vcpu)
3388 {
3389         check_writable_mappings_rmap(vcpu);
3390         count_rmaps(vcpu);
3391 }
3392
3393 static void audit_write_protection(struct kvm_vcpu *vcpu)
3394 {
3395         struct kvm_mmu_page *sp;
3396         struct kvm_memory_slot *slot;
3397         unsigned long *rmapp;
3398         u64 *spte;
3399         gfn_t gfn;
3400
3401         list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3402                 if (sp->role.direct)
3403                         continue;
3404                 if (sp->unsync)
3405                         continue;
3406
3407                 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3408                 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3409                 rmapp = &slot->rmap[gfn - slot->base_gfn];
3410
3411                 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3412                 while (spte) {
3413                         if (*spte & PT_WRITABLE_MASK)
3414                                 printk(KERN_ERR "%s: (%s) shadow page has "
3415                                 "writable mappings: gfn %lx role %x\n",
3416                                __func__, audit_msg, sp->gfn,
3417                                sp->role.word);
3418                         spte = rmap_next(vcpu->kvm, rmapp, spte);
3419                 }
3420         }
3421 }
3422
3423 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3424 {
3425         int olddbg = dbg;
3426
3427         dbg = 0;
3428         audit_msg = msg;
3429         audit_rmap(vcpu);
3430         audit_write_protection(vcpu);
3431         if (strcmp("pre pte write", audit_msg) != 0)
3432                 audit_mappings(vcpu);
3433         audit_writable_sptes_have_rmaps(vcpu);
3434         dbg = olddbg;
3435 }
3436
3437 #endif