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   1 /*
   2  * Shared support code for AMD K8 northbridges and derivates.
   3  * Copyright 2006 Andi Kleen, SUSE Labs. Subject to GPLv2.
   4  */
   5 #include <linux/types.h>
   6 #include <linux/slab.h>
   7 #include <linux/init.h>
   8 #include <linux/errno.h>
   9 #include <linux/module.h>
  10 #include <linux/spinlock.h>
  11 #include <asm/k8.h>
  12
  13 int num_k8_northbridges;
  14 EXPORT_SYMBOL(num_k8_northbridges);
  15
  16 static u32 *flush_words;
  17
  18 struct pci_device_id k8_nb_ids[] = {
  19         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MISC) },
  20         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) },
  21         {}
  22 };
  23 EXPORT_SYMBOL(k8_nb_ids);
  24
  25 struct pci_dev **k8_northbridges;
  26 EXPORT_SYMBOL(k8_northbridges);
  27
  28 static struct pci_dev *next_k8_northbridge(struct pci_dev *dev)
  29 {
  30         do {
  31                 dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
  32                 if (!dev)
  33                         break;
  34         } while (!pci_match_id(&k8_nb_ids[0], dev));
  35         return dev;
  36 }
  37
  38 int cache_k8_northbridges(void)
  39 {
  40         int i;
  41         struct pci_dev *dev;
  42
  43         if (num_k8_northbridges)
  44                 return 0;
  45
  46         dev = NULL;
  47         while ((dev = next_k8_northbridge(dev)) != NULL)
  48                 num_k8_northbridges++;
  49
  50         k8_northbridges = kmalloc((num_k8_northbridges + 1) * sizeof(void *),
  51                                   GFP_KERNEL);
  52         if (!k8_northbridges)
  53                 return -ENOMEM;
  54
  55         if (!num_k8_northbridges) {
  56                 k8_northbridges[0] = NULL;
  57                 return 0;
  58         }
  59
  60         flush_words = kmalloc(num_k8_northbridges * sizeof(u32), GFP_KERNEL);
  61         if (!flush_words) {
  62                 kfree(k8_northbridges);
  63                 return -ENOMEM;
  64         }
  65
  66         dev = NULL;
  67         i = 0;
  68         while ((dev = next_k8_northbridge(dev)) != NULL) {
  69                 k8_northbridges[i] = dev;
  70                 pci_read_config_dword(dev, 0x9c, &flush_words[i++]);
  71         }
  72         k8_northbridges[i] = NULL;
  73         return 0;
  74 }
  75 EXPORT_SYMBOL_GPL(cache_k8_northbridges);
  76
  77 /* Ignores subdevice/subvendor but as far as I can figure out
  78    they're useless anyways */
  79 int __init early_is_k8_nb(u32 device)
  80 {
  81         struct pci_device_id *id;
  82         u32 vendor = device & 0xffff;
  83         device >>= 16;
  84         for (id = k8_nb_ids; id->vendor; id++)
  85                 if (vendor == id->vendor && device == id->device)
  86                         return 1;
  87         return 0;
  88 }
  89
  90 void k8_flush_garts(void)
  91 {
  92         int flushed, i;
  93         unsigned long flags;
  94         static DEFINE_SPINLOCK(gart_lock);
  95
  96         /* Avoid races between AGP and IOMMU. In theory it's not needed
  97            but I'm not sure if the hardware won't lose flush requests
  98            when another is pending. This whole thing is so expensive anyways
  99            that it doesn't matter to serialize more. -AK */
 100         spin_lock_irqsave(&gart_lock, flags);
 101         flushed = 0;
 102         for (i = 0; i < num_k8_northbridges; i++) {
 103                 pci_write_config_dword(k8_northbridges[i], 0x9c,
 104                                        flush_words[i]|1);
 105                 flushed++;
 106         }
 107         for (i = 0; i < num_k8_northbridges; i++) {
 108                 u32 w;
 109                 /* Make sure the hardware actually executed the flush*/
 110                 for (;;) {
 111                         pci_read_config_dword(k8_northbridges[i],
 112                                               0x9c, &w);
 113                         if (!(w & 1))
 114                                 break;
 115                         cpu_relax();
 116                 }
 117         }
 118         spin_unlock_irqrestore(&gart_lock, flags);
 119         if (!flushed)
 120                 printk("nothing to flush?\n");
 121 }
 122 EXPORT_SYMBOL_GPL(k8_flush_garts);
 123
 124 static __init int init_k8_nbs(void)
 125 {
 126         int err = 0;
 127
 128         err = cache_k8_northbridges();
 129
 130         if (err < 0)
 131                 printk(KERN_NOTICE "K8 NB: Cannot enumerate AMD northbridges.\n");
 132
 133         return err;
 134 }
 135
 136 /* This has to go after the PCI subsystem */
 137 fs_initcall(init_k8_nbs);