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   1 /*
   2  *  linux/arch/arm/mach-realview/realview_eb.c
   3  *
   4  *  Copyright (C) 2004 ARM Limited
   5  *  Copyright (C) 2000 Deep Blue Solutions Ltd
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21
  22 #include <linux/init.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/sysdev.h>
  25 #include <linux/amba/bus.h>
  26 #include <linux/amba/pl061.h>
  27 #include <linux/amba/mmci.h>
  28 #include <linux/io.h>
  29
  30 #include <mach/hardware.h>
  31 #include <asm/irq.h>
  32 #include <asm/leds.h>
  33 #include <asm/mach-types.h>
  34 #include <asm/hardware/gic.h>
  35 #include <asm/hardware/icst307.h>
  36 #include <asm/hardware/cache-l2x0.h>
  37 #include <asm/localtimer.h>
  38
  39 #include <asm/mach/arch.h>
  40 #include <asm/mach/map.h>
  41 #include <asm/mach/time.h>
  42
  43 #include <mach/board-eb.h>
  44 #include <mach/irqs.h>
  45
  46 #include "core.h"
  47 #include "clock.h"
  48
  49 static struct map_desc realview_eb_io_desc[] __initdata = {
  50         {
  51                 .virtual        = IO_ADDRESS(REALVIEW_SYS_BASE),
  52                 .pfn            = __phys_to_pfn(REALVIEW_SYS_BASE),
  53                 .length         = SZ_4K,
  54                 .type           = MT_DEVICE,
  55         }, {
  56                 .virtual        = IO_ADDRESS(REALVIEW_EB_GIC_CPU_BASE),
  57                 .pfn            = __phys_to_pfn(REALVIEW_EB_GIC_CPU_BASE),
  58                 .length         = SZ_4K,
  59                 .type           = MT_DEVICE,
  60         }, {
  61                 .virtual        = IO_ADDRESS(REALVIEW_EB_GIC_DIST_BASE),
  62                 .pfn            = __phys_to_pfn(REALVIEW_EB_GIC_DIST_BASE),
  63                 .length         = SZ_4K,
  64                 .type           = MT_DEVICE,
  65         }, {
  66                 .virtual        = IO_ADDRESS(REALVIEW_SCTL_BASE),
  67                 .pfn            = __phys_to_pfn(REALVIEW_SCTL_BASE),
  68                 .length         = SZ_4K,
  69                 .type           = MT_DEVICE,
  70         }, {
  71                 .virtual        = IO_ADDRESS(REALVIEW_EB_TIMER0_1_BASE),
  72                 .pfn            = __phys_to_pfn(REALVIEW_EB_TIMER0_1_BASE),
  73                 .length         = SZ_4K,
  74                 .type           = MT_DEVICE,
  75         }, {
  76                 .virtual        = IO_ADDRESS(REALVIEW_EB_TIMER2_3_BASE),
  77                 .pfn            = __phys_to_pfn(REALVIEW_EB_TIMER2_3_BASE),
  78                 .length         = SZ_4K,
  79                 .type           = MT_DEVICE,
  80         },
  81 #ifdef CONFIG_DEBUG_LL
  82         {
  83                 .virtual        = IO_ADDRESS(REALVIEW_EB_UART0_BASE),
  84                 .pfn            = __phys_to_pfn(REALVIEW_EB_UART0_BASE),
  85                 .length         = SZ_4K,
  86                 .type           = MT_DEVICE,
  87         }
  88 #endif
  89 };
  90
  91 static struct map_desc realview_eb11mp_io_desc[] __initdata = {
  92         {
  93                 .virtual        = IO_ADDRESS(REALVIEW_EB11MP_GIC_CPU_BASE),
  94                 .pfn            = __phys_to_pfn(REALVIEW_EB11MP_GIC_CPU_BASE),
  95                 .length         = SZ_4K,
  96                 .type           = MT_DEVICE,
  97         }, {
  98                 .virtual        = IO_ADDRESS(REALVIEW_EB11MP_GIC_DIST_BASE),
  99                 .pfn            = __phys_to_pfn(REALVIEW_EB11MP_GIC_DIST_BASE),
 100                 .length         = SZ_4K,
 101                 .type           = MT_DEVICE,
 102         }, {
 103                 .virtual        = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE),
 104                 .pfn            = __phys_to_pfn(REALVIEW_EB11MP_L220_BASE),
 105                 .length         = SZ_8K,
 106                 .type           = MT_DEVICE,
 107         }
 108 };
 109
 110 static void __init realview_eb_map_io(void)
 111 {
 112         iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
 113         if (core_tile_eb11mp() || core_tile_a9mp())
 114                 iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
 115 }
 116
 117 static struct pl061_platform_data gpio0_plat_data = {
 118         .gpio_base      = 0,
 119         .irq_base       = -1,
 120 };
 121
 122 static struct pl061_platform_data gpio1_plat_data = {
 123         .gpio_base      = 8,
 124         .irq_base       = -1,
 125 };
 126
 127 static struct pl061_platform_data gpio2_plat_data = {
 128         .gpio_base      = 16,
 129         .irq_base       = -1,
 130 };
 131
 132 /*
 133  * RealView EB AMBA devices
 134  */
 135
 136 /*
 137  * These devices are connected via the core APB bridge
 138  */
 139 #define GPIO2_IRQ       { IRQ_EB_GPIO2, NO_IRQ }
 140 #define GPIO2_DMA       { 0, 0 }
 141 #define GPIO3_IRQ       { IRQ_EB_GPIO3, NO_IRQ }
 142 #define GPIO3_DMA       { 0, 0 }
 143
 144 #define AACI_IRQ        { IRQ_EB_AACI, NO_IRQ }
 145 #define AACI_DMA        { 0x80, 0x81 }
 146 #define MMCI0_IRQ       { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
 147 #define MMCI0_DMA       { 0x84, 0 }
 148 #define KMI0_IRQ        { IRQ_EB_KMI0, NO_IRQ }
 149 #define KMI0_DMA        { 0, 0 }
 150 #define KMI1_IRQ        { IRQ_EB_KMI1, NO_IRQ }
 151 #define KMI1_DMA        { 0, 0 }
 152
 153 /*
 154  * These devices are connected directly to the multi-layer AHB switch
 155  */
 156 #define EB_SMC_IRQ      { NO_IRQ, NO_IRQ }
 157 #define EB_SMC_DMA      { 0, 0 }
 158 #define MPMC_IRQ        { NO_IRQ, NO_IRQ }
 159 #define MPMC_DMA        { 0, 0 }
 160 #define EB_CLCD_IRQ     { IRQ_EB_CLCD, NO_IRQ }
 161 #define EB_CLCD_DMA     { 0, 0 }
 162 #define DMAC_IRQ        { IRQ_EB_DMA, NO_IRQ }
 163 #define DMAC_DMA        { 0, 0 }
 164
 165 /*
 166  * These devices are connected via the core APB bridge
 167  */
 168 #define SCTL_IRQ        { NO_IRQ, NO_IRQ }
 169 #define SCTL_DMA        { 0, 0 }
 170 #define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ }
 171 #define EB_WATCHDOG_DMA { 0, 0 }
 172 #define EB_GPIO0_IRQ    { IRQ_EB_GPIO0, NO_IRQ }
 173 #define EB_GPIO0_DMA    { 0, 0 }
 174 #define GPIO1_IRQ       { IRQ_EB_GPIO1, NO_IRQ }
 175 #define GPIO1_DMA       { 0, 0 }
 176 #define EB_RTC_IRQ      { IRQ_EB_RTC, NO_IRQ }
 177 #define EB_RTC_DMA      { 0, 0 }
 178
 179 /*
 180  * These devices are connected via the DMA APB bridge
 181  */
 182 #define SCI_IRQ         { IRQ_EB_SCI, NO_IRQ }
 183 #define SCI_DMA         { 7, 6 }
 184 #define EB_UART0_IRQ    { IRQ_EB_UART0, NO_IRQ }
 185 #define EB_UART0_DMA    { 15, 14 }
 186 #define EB_UART1_IRQ    { IRQ_EB_UART1, NO_IRQ }
 187 #define EB_UART1_DMA    { 13, 12 }
 188 #define EB_UART2_IRQ    { IRQ_EB_UART2, NO_IRQ }
 189 #define EB_UART2_DMA    { 11, 10 }
 190 #define EB_UART3_IRQ    { IRQ_EB_UART3, NO_IRQ }
 191 #define EB_UART3_DMA    { 0x86, 0x87 }
 192 #define EB_SSP_IRQ      { IRQ_EB_SSP, NO_IRQ }
 193 #define EB_SSP_DMA      { 9, 8 }
 194
 195 /* FPGA Primecells */
 196 AMBA_DEVICE(aaci,  "fpga:aaci",  AACI,     NULL);
 197 AMBA_DEVICE(mmc0,  "fpga:mmc0",  MMCI0,    &realview_mmc0_plat_data);
 198 AMBA_DEVICE(kmi0,  "fpga:kmi0",  KMI0,     NULL);
 199 AMBA_DEVICE(kmi1,  "fpga:kmi1",  KMI1,     NULL);
 200 AMBA_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL);
 201
 202 /* DevChip Primecells */
 203 AMBA_DEVICE(smc,   "dev:smc",   EB_SMC,   NULL);
 204 AMBA_DEVICE(clcd,  "dev:clcd",  EB_CLCD,  &clcd_plat_data);
 205 AMBA_DEVICE(dmac,  "dev:dmac",  DMAC,     NULL);
 206 AMBA_DEVICE(sctl,  "dev:sctl",  SCTL,     NULL);
 207 AMBA_DEVICE(wdog,  "dev:wdog",  EB_WATCHDOG, NULL);
 208 AMBA_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data);
 209 AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1,    &gpio1_plat_data);
 210 AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2,    &gpio2_plat_data);
 211 AMBA_DEVICE(rtc,   "dev:rtc",   EB_RTC,   NULL);
 212 AMBA_DEVICE(sci0,  "dev:sci0",  SCI,      NULL);
 213 AMBA_DEVICE(uart0, "dev:uart0", EB_UART0, NULL);
 214 AMBA_DEVICE(uart1, "dev:uart1", EB_UART1, NULL);
 215 AMBA_DEVICE(uart2, "dev:uart2", EB_UART2, NULL);
 216 AMBA_DEVICE(ssp0,  "dev:ssp0",  EB_SSP,   NULL);
 217
 218 static struct amba_device *amba_devs[] __initdata = {
 219         &dmac_device,
 220         &uart0_device,
 221         &uart1_device,
 222         &uart2_device,
 223         &uart3_device,
 224         &smc_device,
 225         &clcd_device,
 226         &sctl_device,
 227         &wdog_device,
 228         &gpio0_device,
 229         &gpio1_device,
 230         &gpio2_device,
 231         &rtc_device,
 232         &sci0_device,
 233         &ssp0_device,
 234         &aaci_device,
 235         &mmc0_device,
 236         &kmi0_device,
 237         &kmi1_device,
 238 };
 239
 240 /*
 241  * RealView EB platform devices
 242  */
 243 static struct resource realview_eb_flash_resource = {
 244         .start                  = REALVIEW_EB_FLASH_BASE,
 245         .end                    = REALVIEW_EB_FLASH_BASE + REALVIEW_EB_FLASH_SIZE - 1,
 246         .flags                  = IORESOURCE_MEM,
 247 };
 248
 249 static struct resource realview_eb_eth_resources[] = {
 250         [0] = {
 251                 .start          = REALVIEW_EB_ETH_BASE,
 252                 .end            = REALVIEW_EB_ETH_BASE + SZ_64K - 1,
 253                 .flags          = IORESOURCE_MEM,
 254         },
 255         [1] = {
 256                 .start          = IRQ_EB_ETH,
 257                 .end            = IRQ_EB_ETH,
 258                 .flags          = IORESOURCE_IRQ,
 259         },
 260 };
 261
 262 /*
 263  * Detect and register the correct Ethernet device. RealView/EB rev D
 264  * platforms use the newer SMSC LAN9118 Ethernet chip
 265  */
 266 static int eth_device_register(void)
 267 {
 268         void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K);
 269         const char *name = NULL;
 270         u32 idrev;
 271
 272         if (!eth_addr)
 273                 return -ENOMEM;
 274
 275         idrev = readl(eth_addr + 0x50);
 276         if ((idrev & 0xFFFF0000) != 0x01180000)
 277                 /* SMSC LAN9118 not present, use LAN91C111 instead */
 278                 name = "smc91x";
 279
 280         iounmap(eth_addr);
 281         return realview_eth_register(name, realview_eb_eth_resources);
 282 }
 283
 284 static struct resource realview_eb_isp1761_resources[] = {
 285         [0] = {
 286                 .start          = REALVIEW_EB_USB_BASE,
 287                 .end            = REALVIEW_EB_USB_BASE + SZ_128K - 1,
 288                 .flags          = IORESOURCE_MEM,
 289         },
 290         [1] = {
 291                 .start          = IRQ_EB_USB,
 292                 .end            = IRQ_EB_USB,
 293                 .flags          = IORESOURCE_IRQ,
 294         },
 295 };
 296
 297 static void __init gic_init_irq(void)
 298 {
 299         if (core_tile_eb11mp() || core_tile_a9mp()) {
 300                 unsigned int pldctrl;
 301
 302                 /* new irq mode */
 303                 writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
 304                 pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
 305                 pldctrl |= 0x00800000;
 306                 writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
 307                 writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
 308
 309                 /* core tile GIC, primary */
 310                 gic_cpu_base_addr = __io_address(REALVIEW_EB11MP_GIC_CPU_BASE);
 311                 gic_dist_init(0, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), 29);
 312                 gic_cpu_init(0, gic_cpu_base_addr);
 313
 314 #ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
 315                 /* board GIC, secondary */
 316                 gic_dist_init(1, __io_address(REALVIEW_EB_GIC_DIST_BASE), 64);
 317                 gic_cpu_init(1, __io_address(REALVIEW_EB_GIC_CPU_BASE));
 318                 gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
 319 #endif
 320         } else {
 321                 /* board GIC, primary */
 322                 gic_cpu_base_addr = __io_address(REALVIEW_EB_GIC_CPU_BASE);
 323                 gic_dist_init(0, __io_address(REALVIEW_EB_GIC_DIST_BASE), 29);
 324                 gic_cpu_init(0, gic_cpu_base_addr);
 325         }
 326 }
 327
 328 /*
 329  * Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile
 330  */
 331 static void realview_eb11mp_fixup(void)
 332 {
 333         /* AMBA devices */
 334         dmac_device.irq[0]      = IRQ_EB11MP_DMA;
 335         uart0_device.irq[0]     = IRQ_EB11MP_UART0;
 336         uart1_device.irq[0]     = IRQ_EB11MP_UART1;
 337         uart2_device.irq[0]     = IRQ_EB11MP_UART2;
 338         uart3_device.irq[0]     = IRQ_EB11MP_UART3;
 339         clcd_device.irq[0]      = IRQ_EB11MP_CLCD;
 340         wdog_device.irq[0]      = IRQ_EB11MP_WDOG;
 341         gpio0_device.irq[0]     = IRQ_EB11MP_GPIO0;
 342         gpio1_device.irq[0]     = IRQ_EB11MP_GPIO1;
 343         gpio2_device.irq[0]     = IRQ_EB11MP_GPIO2;
 344         rtc_device.irq[0]       = IRQ_EB11MP_RTC;
 345         sci0_device.irq[0]      = IRQ_EB11MP_SCI;
 346         ssp0_device.irq[0]      = IRQ_EB11MP_SSP;
 347         aaci_device.irq[0]      = IRQ_EB11MP_AACI;
 348         mmc0_device.irq[0]      = IRQ_EB11MP_MMCI0A;
 349         mmc0_device.irq[1]      = IRQ_EB11MP_MMCI0B;
 350         kmi0_device.irq[0]      = IRQ_EB11MP_KMI0;
 351         kmi1_device.irq[0]      = IRQ_EB11MP_KMI1;
 352
 353         /* platform devices */
 354         realview_eb_eth_resources[1].start      = IRQ_EB11MP_ETH;
 355         realview_eb_eth_resources[1].end        = IRQ_EB11MP_ETH;
 356         realview_eb_isp1761_resources[1].start  = IRQ_EB11MP_USB;
 357         realview_eb_isp1761_resources[1].end    = IRQ_EB11MP_USB;
 358 }
 359
 360 static void __init realview_eb_timer_init(void)
 361 {
 362         unsigned int timer_irq;
 363
 364         timer0_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE);
 365         timer1_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE) + 0x20;
 366         timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE);
 367         timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20;
 368
 369         if (core_tile_eb11mp() || core_tile_a9mp()) {
 370 #ifdef CONFIG_LOCAL_TIMERS
 371                 twd_base = __io_address(REALVIEW_EB11MP_TWD_BASE);
 372 #endif
 373                 timer_irq = IRQ_EB11MP_TIMER0_1;
 374         } else
 375                 timer_irq = IRQ_EB_TIMER0_1;
 376
 377         realview_timer_init(timer_irq);
 378 }
 379
 380 static struct sys_timer realview_eb_timer = {
 381         .init           = realview_eb_timer_init,
 382 };
 383
 384 static void realview_eb_reset(char mode)
 385 {
 386         void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
 387         void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
 388
 389         /*
 390          * To reset, we hit the on-board reset register
 391          * in the system FPGA
 392          */
 393         __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
 394         if (core_tile_eb11mp())
 395                 __raw_writel(0x0008, reset_ctrl);
 396 }
 397
 398 static void __init realview_eb_init(void)
 399 {
 400         int i;
 401
 402         if (core_tile_eb11mp() || core_tile_a9mp()) {
 403                 realview_eb11mp_fixup();
 404
 405 #ifdef CONFIG_CACHE_L2X0
 406                 /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
 407                  * Bits:  .... ...0 0111 1001 0000 .... .... .... */
 408                 l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
 409 #endif
 410         }
 411
 412         realview_flash_register(&realview_eb_flash_resource, 1);
 413         platform_device_register(&realview_i2c_device);
 414         eth_device_register();
 415         realview_usb_register(realview_eb_isp1761_resources);
 416
 417         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
 418                 struct amba_device *d = amba_devs[i];
 419                 amba_device_register(d, &iomem_resource);
 420         }
 421
 422 #ifdef CONFIG_LEDS
 423         leds_event = realview_leds_event;
 424 #endif
 425         realview_reset = realview_eb_reset;
 426 }
 427
 428 MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
 429         /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
 430         .phys_io        = REALVIEW_EB_UART0_BASE,
 431         .io_pg_offst    = (IO_ADDRESS(REALVIEW_EB_UART0_BASE) >> 18) & 0xfffc,
 432         .boot_params    = PHYS_OFFSET + 0x00000100,
 433         .fixup          = realview_fixup,
 434         .map_io         = realview_eb_map_io,
 435         .init_irq       = gic_init_irq,
 436         .timer          = &realview_eb_timer,
 437         .init_machine   = realview_eb_init,
 438 MACHINE_END