safe/jmp/linux-2.6
17 years ago[PATCH] i386: Avoid boot warning with apic=debug
Andi Kleen [Thu, 7 Dec 2006 01:14:11 +0000 (02:14 +0100)]
[PATCH] i386: Avoid boot warning with apic=debug

There are two consumers of apic=: the apic debug level and the low
level generic architecture code. early_param would warn when the
low level code rejected "debug". Avoid this.

Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: i386 add Intel BTS cpufeature bit and detection (take 2)
Stephane Eranian [Thu, 7 Dec 2006 01:14:11 +0000 (02:14 +0100)]
[PATCH] i386: i386 add Intel BTS cpufeature bit and detection (take 2)

Here is a small patch for i386 which adds a cpufeature flag and
detection code for Intel's Branch Trace Store (BTS) feature. This
feature can be found on Intel P4 and Core 2 processors among others.
It can also be used by perfmon.

changelog:
- add CPU_FEATURE_BTS
- add Branch Trace Store detection

signed-off-by: stephane eranian <eranian@hpl.hp.com>

Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] x86-64: x86-64 add Intel BTS cpufeature bit and detection (take 2)
Stephane Eranian [Thu, 7 Dec 2006 01:14:11 +0000 (02:14 +0100)]
[PATCH] x86-64: x86-64 add Intel BTS cpufeature bit and detection (take 2)

Here is a small patch for x86-64 which adds a cpufeature flag and
detection code for Intel's Branch Trace Store (BTS) feature. This
feature can be found on Intel P4 and Core 2 processors among others.
It can also be used by perfmon.

changelog:
- add CPU_FEATURE_BTS
- add Branch Trace Store detection

signed-off-by: stephane eranian <eranian@hpl.hp.com>

Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: Make irq_vector static
Adrian Bunk [Thu, 7 Dec 2006 01:14:11 +0000 (02:14 +0100)]
[PATCH] i386: Make irq_vector static

irq_vector[] can now become static.

Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Andi Kleen <ak@suse.de>
Acked-by: Eric W. Biederman <ebiederm@xmission.com>
Acked-by: Ingo Molnar <mingo@redhat.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] i386: handle a negative return value
Adrian Bunk [Thu, 7 Dec 2006 01:14:11 +0000 (02:14 +0100)]
[PATCH] i386: handle a negative return value

The Coverity checker noted that bad things might happen if
find_isa_irq_apic() returned -1.

[akpm@osdl.org: add debugging checks]
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Acked-by: Ingo Molnar <mingo@redhat.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] i386: call efi_get_time during suspend
Artiom Myaskouvskey [Thu, 7 Dec 2006 01:14:11 +0000 (02:14 +0100)]
[PATCH] i386: call efi_get_time during suspend

Function efi_get_time called not only during init kernel phase but also
during suspend (from get_cmos_time).

When it is called from get_cmos_time the corresponding runtime service
should be called in virtual and not in physical mode.

Signed-off-by: Artiom Myaskouvskey <artiom.myaskouvskey@intel.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: "Narayanan, Chandramouli" <chandramouli.narayanan@intel.com>
Cc: "Jiossy, Rami" <rami.jiossy@intel.com>
Cc: "Satt, Shai" <shai.satt@intel.com>
Cc: Andi Kleen <ak@suse.de>
Cc: Matt Domsch <Matt_Domsch@dell.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] x86: fix the irqbalance quirk for E7320/E7520/E7525
Siddha, Suresh B [Thu, 7 Dec 2006 01:14:10 +0000 (02:14 +0100)]
[PATCH] x86: fix the irqbalance quirk for E7320/E7520/E7525

Move the irqbalance quirks for E7320/E7520/E7525(Errata 23 in
http://download.intel.com/design/chipsets/specupdt/30304203.pdf) to early
quirks.

And add a PCI quirk for these platforms to check(which happens very late
during the boot) if the APIC routing is indeed set to default flat mode.

This fixes the breakage(in x86_64) of this quirk due to cpu hotplug which
selects physical mode instead of the logical flat(as needed for this errata
workaround).

Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Cc: "Li, Shaohua" <shaohua.li@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] x86-64: add genapic_force
Siddha, Suresh B [Thu, 7 Dec 2006 01:14:10 +0000 (02:14 +0100)]
[PATCH] x86-64: add genapic_force

Add genapic_force. Used by the next Intel quirks patch.

Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Cc: "Li, Shaohua" <shaohua.li@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] i386: change the 'no_control' field to 'hotpluggable' in the struct cpu
Siddha, Suresh B [Thu, 7 Dec 2006 01:14:10 +0000 (02:14 +0100)]
[PATCH] i386: change the 'no_control' field to 'hotpluggable' in the struct cpu

Change the 'no_control' field in the cpu struct to a more positive
and better term 'hotpluggable'. And change(/cleanup) the logic accordingly.

Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Cc: "Li, Shaohua" <shaohua.li@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] i386: introduce the mechanism of disabling cpu hotplug control
Siddha, Suresh B [Thu, 7 Dec 2006 01:14:10 +0000 (02:14 +0100)]
[PATCH] i386: introduce the mechanism of disabling cpu hotplug control

Add 'enable_cpu_hotplug' flag and when cleared, the hotplug control file
("online") will not be added under /sys/devices/system/cpu/cpuX/

Next patch doing PCI quirks will use this.

Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Cc: "Li, Shaohua" <shaohua.li@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] x86: add write_pci_config_byte() to direct PCI access routines
Siddha, Suresh B [Thu, 7 Dec 2006 01:14:10 +0000 (02:14 +0100)]
[PATCH] x86: add write_pci_config_byte() to direct PCI access routines

Mechanism of selecting physical mode in genapic when cpu hotplug is enabled on
x86_64, broke the quirk(quirk_intel_irqbalance()) introduced for working
around the transposing interrupt message errata in E7520/E7320/E7525 (revision
ID 0x9 and below.  errata #23 in
http://download.intel.com/design/chipsets/specupdt/30304203.pdf).

This errata requires the mode to be in logical flat, so that interrupts can be
directed to more than one cpu(and thus use hardware IRQ balancing enabled by
BIOS on these platforms).

Following four patches fixes this by moving the quirk to early quirk and
forcing the x86_64 genapic selection to logical flat on these platforms.

Thanks to Shaohua for pointing out the breakage.

This patch:

Add write_pci_config_byte() to direct PCI access  routines

Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Cc: "Li, Shaohua" <shaohua.li@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] i386: Convert more absolute symbols to section relative
Vivek Goyal [Thu, 7 Dec 2006 01:14:10 +0000 (02:14 +0100)]
[PATCH] i386: Convert more absolute symbols to section relative

o Convert more absolute symbols to section relative to keep the theme in
  vmlinux.lds.S file and to avoid problem if kernel is relocated.

o Also put a message so that in future people can be aware of it and
  avoid introducing absolute symbols.

Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] relocatable kernel: Fix kallsyms on avr32 after relocatable kernel changes
Vivek Goyal [Thu, 7 Dec 2006 01:14:10 +0000 (02:14 +0100)]
[PATCH] relocatable kernel: Fix kallsyms on avr32 after relocatable kernel changes

o On some platforms like avr32, section init comes before .text and
  not necessarily a symbol's relative position w.r.t _text is positive.
  In such cases assembler detects the overflow and emits warning. This
  patch fixes it.

Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Cc: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] i386: alloc_gdt() static
Adrian Bunk [Thu, 7 Dec 2006 01:14:10 +0000 (02:14 +0100)]
[PATCH] i386: alloc_gdt() static

Make the needlessly global alloc_gdt() static.

(against) pda-percpu-init

Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@muc.de>
Cc: Jeremy Fitzhardinge <jeremy@goop.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] i386: fix MTRR code
Jan Beulich [Thu, 7 Dec 2006 01:14:09 +0000 (02:14 +0100)]
[PATCH] i386: fix MTRR code

Until not so long ago, there were system log messages pointing to
inconsistent MTRR setup of the video frame buffer caused by the way vesafb
and X worked. While vesafb was fixed meanwhile, I believe fixing it there
only hides a shortcoming in the MTRR code itself, in that that code is not
symmetric with respect to the ordering of attempts to set up two (or more)
regions where one contains the other. In the current shape, it permits
only setting up sub-regions of pre-exisiting ones. The patch below makes
this symmetric.

While working on that I noticed a few more inconsistencies in that code,
namely
- use of 'unsigned int' for sizes in many, but not all places (the patch
  is converting this to use 'unsigned long' everywhere, which specifically
  might be necessary for x86-64 once a processor supporting more than 44
  physical address bits would become available)
- the code to correct inconsistent settings during secondary processor
  startup tried (if necessary) to correct, among other things, the value
  in IA32_MTRR_DEF_TYPE, however the newly computed value would never get
  used (i.e. stored in the respective MSR)
- the generic range validation code checked that the end of the
  to-be-added range would be above 1MB; the value checked should have been
  the start of the range
- when contained regions are detected, previously this was allowed only
  when the old region was uncacheable; this can be symmetric (i.e. the new
  region can also be uncacheable) and even further as per Intel's
  documentation write-trough and write-back for either region is also
  compatible with the respective opposite in the other

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] x86-64: adjust pmd_bad()
Jan Beulich [Thu, 7 Dec 2006 01:14:09 +0000 (02:14 +0100)]
[PATCH] x86-64: adjust pmd_bad()

Make pmd_bad() symmetrical to pgd_bad() and pud_bad(). At once,
simplify them all.

TBD: tighten down the checks again as suggested by Hugh D.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: conditionalize inclusion of some MTRR flavors
Jan Beulich [Thu, 7 Dec 2006 01:14:09 +0000 (02:14 +0100)]
[PATCH] i386: conditionalize inclusion of some MTRR flavors

Avoid inclusion of code that's dead for x86-64.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] x86-64: remove prototype of free_bootmem_generic()
Jan Beulich [Thu, 7 Dec 2006 01:14:09 +0000 (02:14 +0100)]
[PATCH] x86-64: remove prototype of free_bootmem_generic()

The function doesn't exist (anymore).

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: Don't touch per cpu memory of offline CPUs in touch_nmi_watchdog
Jan Beulich [Thu, 7 Dec 2006 01:14:09 +0000 (02:14 +0100)]
[PATCH] i386: Don't touch per cpu memory of offline CPUs in touch_nmi_watchdog

Just like on x86-64, don't touch foreign CPUs' memory if the watchdog
isn't enabled at all.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: clear_fixmap() should not use set_pte()
Jan Beulich [Thu, 7 Dec 2006 01:14:09 +0000 (02:14 +0100)]
[PATCH] i386: clear_fixmap() should not use set_pte()

While not strictly required with the current code (as the upper half of
page table entries generated by __set_fixmap() cannot be non-zero due
to the second parameter of this function being 'unsigned long'), the
use of set_pte() in __set_fixmap() in the context of clear_fixmap() is
still improper with CONFIG_X86_PAE (see the respective comment in
include/asm-i386/pgtable-3level.h) and would turn into a bug if that
second parameter ever gets changed to a 64-bit type.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] x86-64: Rate limit no irq handler messages
Andi Kleen [Thu, 7 Dec 2006 01:14:09 +0000 (02:14 +0100)]
[PATCH] x86-64: Rate limit no irq handler messages

Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] x86-64: fix perms/range of vsyscall vma in /proc/*/maps
Ernie Petrides [Thu, 7 Dec 2006 01:14:09 +0000 (02:14 +0100)]
[PATCH] x86-64: fix perms/range of vsyscall vma in /proc/*/maps

The final line of /proc/<pid>/maps on x86_64 for native 64-bit
tasks shows an incorrect ending address and incorrect permissions.  There
is only a single page mapped in this vsyscall region, and it is accessible
for both read and execute.

The patch below fixes this.  (Since 32-bit-compat tasks have a real vma
with correct perms/range, no change is necessary for that scenario.)

Before the patch, a "cat /proc/self/maps | tail -1" shows this:

        ffffffffff600000-ffffffffffe00000 ---p 00000000 [...]

After the patch, this is the output:

        ffffffffff600000-ffffffffff601000 r-xp 00000000 [...]

Signed-off-by: Ernie Petrides <petrides@redhat.com>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: Add support for compilation for Core2
Andi Kleen [Thu, 7 Dec 2006 01:14:09 +0000 (02:14 +0100)]
[PATCH] i386: Add support for compilation for Core2

gcc doesn't support -mtune=core2 yet, but will be soon. Use -mtune=generic or -mtune=i686
as fallback

TBD need benchmarking for INTEL_USERCOPY etc. So far I used the same defaults as MPENTIUMM

Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] x86-64: Add option to compile for Core2
Andi Kleen [Thu, 7 Dec 2006 01:14:09 +0000 (02:14 +0100)]
[PATCH] x86-64: Add option to compile for Core2

Add an option to compile for Intel's Core 2

The Kconfig help is a mouthful due to the inventiveness of Intel's
product naming department.

Mainly for the 64bit cache line sizes because gcc doesn't support
optimizing for core2 yet. However it will and then the kernel
should be ready by passing the right option

Also fix the old MPSC help text to confirm better to reality.

Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] paravirt: Add option to allow skipping the timer check
Zachary Amsden [Thu, 7 Dec 2006 01:14:09 +0000 (02:14 +0100)]
[PATCH] paravirt: Add option to allow skipping the timer check

Add a way to disable the timer IRQ routing check via a boot option.  The
VMI timer code uses this to avoid triggering the pester Mingo code, which
probes for some very unusual and broken motherboard routings.  It fires
100% of the time when using a paravirtual delay mechanism instead of using
a realtime delay, since there is no elapsed real time, and the 4 timer IRQs
have not yet been delivered.

In addition, it is entirely possible, though improbable, that this bug
could surface on real hardware which picks a particularly bad time to enter
SMM mode, causing a long latency during one of the timer IRQs.

While here, make check_timer be __init.

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andi Kleen <ak@suse.de>
[chrisw: use no_timer_check to bring inline with x86_64 as per Andi's request]
Signed-off-by: Chris Wright <chrisw@sous-sol.org>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] paravirt: fix missing pte update
Zachary Amsden [Thu, 7 Dec 2006 01:14:09 +0000 (02:14 +0100)]
[PATCH] paravirt: fix missing pte update

The function ptep_get_and_clear uses an atomic instruction sequence to get and
clear an active pte.  Rather than add such an atomic operator to all virtual
machine implementations in paravirt-ops, it is easier to support the raw
atomic sequence and use either a trapping writable pagetable approach, or a
post-update notification.  For the post update notification, we require the
pte_update function to be called after the access.  Combine the 2-level and
3-level paging operators into one common function which does the post-update
notification, and rename the actual atomic sequences to raw_ptep_xxx
operators.

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@muc.de>
Cc: Jeremy Fitzhardinge <jeremy@goop.org>
Cc: Chris Wright <chrisw@sous-sol.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] paravirt: fix parameter names in mmu operations
Zachary Amsden [Thu, 7 Dec 2006 01:14:08 +0000 (02:14 +0100)]
[PATCH] paravirt: fix parameter names in mmu operations

Make parameter names match function argument names for the yet to be defined
pte_update_defer accessor.

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@muc.de>
Cc: Jeremy Fitzhardinge <jeremy@goop.org>
Cc: Chris Wright <chrisw@sous-sol.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] paravirt: Preparatory mmu header movement
Zachary Amsden [Thu, 7 Dec 2006 01:14:08 +0000 (02:14 +0100)]
[PATCH] paravirt: Preparatory mmu header movement

Move header includes for the nopud / nopmd types to the location of the actual
pte / pgd type definitions.  This allows generic 4-level page type code to be
written before the split 2/3 level page table headers are included.

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@muc.de>
Cc: Jeremy Fitzhardinge <jeremy@goop.org>
Cc: Chris Wright <chrisw@sous-sol.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] paravirt: Be careful about touching BIOS address space
Rusty Russell [Thu, 7 Dec 2006 01:14:08 +0000 (02:14 +0100)]
[PATCH] paravirt: Be careful about touching BIOS address space

BIOS ROM areas may not be mapped into the guest address space, so be careful
when touching those addresses to make sure they appear to be mapped.

[akpm@osdl.org: fix unused var warning]
AK: Changed __get_user to probe_kernel_address

Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com>
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Jeremy Fitzhardinge <jeremy@goop.org>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] paravirt: Add MMU virtualization to paravirt_ops
Rusty Russell [Thu, 7 Dec 2006 01:14:08 +0000 (02:14 +0100)]
[PATCH] paravirt: Add MMU virtualization to paravirt_ops

Add the three bare TLB accessor functions to paravirt-ops.  Most amusingly,
flush_tlb is redefined on SMP, so I can't call the paravirt op flush_tlb.
Instead, I chose to indicate the actual flush type, kernel (global) vs. user
(non-global).  Global in this sense means using the global bit in the page
table entry, which makes TLB entries persistent across CR3 reloads, not
global as in the SMP sense of invoking remote shootdowns, so the term is
confusingly overloaded.

AK: folded in fix from Zach for PAE compilation

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Chris Wright <chrisw@sous-sol.org>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Jeremy Fitzhardinge <jeremy@goop.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] paravirt: Add APIC accessors to paravirt-ops.
Rusty Russell [Thu, 7 Dec 2006 01:14:08 +0000 (02:14 +0100)]
[PATCH] paravirt: Add APIC accessors to paravirt-ops.

Add APIC accessors to paravirt-ops.  Unfortunately, we need two write
functions, as some older broken hardware requires workarounds for
Pentium APIC errata - this is the purpose of apic_write_atomic.

AK: replaced __inline with inline

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Chris Wright <chrisw@sous-sol.org>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Jeremy Fitzhardinge <jeremy@goop.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] paravirt: Allow disable power management under hypervisor
Rusty Russell [Thu, 7 Dec 2006 01:14:08 +0000 (02:14 +0100)]
[PATCH] paravirt: Allow disable power management under hypervisor

Two legacy power management modes are much easier to just explicitly disable
when running in paravirtualized mode - neither APM nor PnP is still relevant.
The status of ACPI is still debatable, and noacpi is still a common enough
boot parameter that it is not necessary to explicitly disable ACPI.

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Chris Wright <chrisw@sous-sol.org>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Jeremy Fitzhardinge <jeremy@goop.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] paravirt: Disable vdso by default when CONFIG_PARAVIRT is enabled
Andi Kleen [Thu, 7 Dec 2006 01:14:08 +0000 (02:14 +0100)]
[PATCH] paravirt: Disable vdso by default when CONFIG_PARAVIRT is enabled

They don't work together and this way even glibc still works.

Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] paravirt: Allow selected bug checks to be
Rusty Russell [Thu, 7 Dec 2006 01:14:08 +0000 (02:14 +0100)]
[PATCH] paravirt: Allow selected bug checks to be

Allow selected bug checks to be skipped by paravirt kernels.  The two most
important are the F00F workaround (which is either done by the hypervisor,
or not required), and the 'hlt' instruction check, which can break under
some hypervisors.

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Chris Wright <chrisw@sous-sol.org>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Jeremy Fitzhardinge <jeremy@goop.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] paravirt: Add startup infrastructure for paravirtualization
Rusty Russell [Thu, 7 Dec 2006 01:14:08 +0000 (02:14 +0100)]
[PATCH] paravirt: Add startup infrastructure for paravirtualization

1) Each hypervisor writes a probe function to detect whether we are
   running under that hypervisor.  paravirt_probe() registers this
   function.

2) If vmlinux is booted with ring != 0, we call all the probe
   functions (with registers except %esp intact) in link order: the
   winner will not return.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Chris Wright <chrisw@sous-sol.org>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Jeremy Fitzhardinge <jeremy@goop.org>
Cc: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] i386: cpu_detect extraction
Rusty Russell [Thu, 7 Dec 2006 01:14:08 +0000 (02:14 +0100)]
[PATCH] i386: cpu_detect extraction

Both lhype and Xen want to call the core of the x86 cpu detect code before
calling start_kernel.

(extracted from larger patch)

AK: folded in start_kernel header patch

Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com>
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Jeremy Fitzhardinge <jeremy@goop.org>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] paravirt: Patch inline replacements for paravirt intercepts
Rusty Russell [Thu, 7 Dec 2006 01:14:08 +0000 (02:14 +0100)]
[PATCH] paravirt: Patch inline replacements for paravirt intercepts

It turns out that the most called ops, by several orders of magnitude,
are the interrupt manipulation ops.  These are obvious candidates for
patching, so mark them up and create infrastructure for it.

The method used is that the ops structure has a patch function, which
is called for each place which needs to be patched: this returns a
number of instructions (the rest are NOP-padded).

Usually we can spare a register (%eax) for the binary patched code to
use, but in a couple of critical places in entry.S we can't: we make
the clobbers explicit at the call site, and manually clobber the
allowed registers in debug mode as an extra check.

And:

Don't abuse CONFIG_DEBUG_KERNEL, add CONFIG_DEBUG_PARAVIRT.

And:

AK:  Fix warnings in x86-64 alternative.c build

And:

AK: Fix compilation with defconfig

And:

^From: Andrew Morton <akpm@osdl.org>

Some binutlises still like to emit references to __stop_parainstructions and
__start_parainstructions.

And:

AK: Fix warnings about unused variables when PARAVIRT is disabled.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com>
Signed-off-by: Chris Wright <chrisw@sous-sol.org>
Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] paravirt: header and stubs for paravirtualisation
Rusty Russell [Thu, 7 Dec 2006 01:14:07 +0000 (02:14 +0100)]
[PATCH] paravirt: header and stubs for paravirtualisation

Create a paravirt.h header for all the critical operations which need to be
replaced with hypervisor calls, and include that instead of defining native
operations, when CONFIG_PARAVIRT.

This patch does the dumbest possible replacement of paravirtualized
instructions: calls through a "paravirt_ops" structure.  Currently these are
function implementations of native hardware: hypervisors will override the ops
structure with their own variants.

All the pv-ops functions are declared "fastcall" so that a specific
register-based ABI is used, to make inlining assember easier.

And:

+From: Andy Whitcroft <apw@shadowen.org>

The paravirt ops introduce a 'weak' attribute onto memory_setup().
Code ordering leads to the following warnings on x86:

    arch/i386/kernel/setup.c:651: warning: weak declaration of
                `memory_setup' after first use results in unspecified behavior

Move memory_setup() to avoid this.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Chris Wright <chrisw@sous-sol.org>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Jeremy Fitzhardinge <jeremy@goop.org>
Cc: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Andy Whitcroft <apw@shadowen.org>
17 years ago[PATCH] i386: Fix double #includes in arch/i386
Nicolas Kaiser [Thu, 7 Dec 2006 01:14:07 +0000 (02:14 +0100)]
[PATCH] i386: Fix double #includes in arch/i386

Fix double #includes in arch/i386

Signed-off-by: Nicolas Kaiser <nikai@nikai.net>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: substitute __va lookup with pfn_to_kaddr
David Rientjes [Thu, 7 Dec 2006 01:14:07 +0000 (02:14 +0100)]
[PATCH] i386: substitute __va lookup with pfn_to_kaddr

Substitutes allocate_pgdat virtual address lookup with pfn_to_kaddr macro.

Signed-off-by: David Rientjes <rientjes@cs.washington.edu>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] x86-64: Don't force inlining of do_csum
Andi Kleen [Thu, 7 Dec 2006 01:14:07 +0000 (02:14 +0100)]
[PATCH] x86-64: Don't force inlining of do_csum

It's two big and used by two callers. Calls should be cheap enough anyways.

Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: remove IOPL check on task switch
Chuck Ebbert [Thu, 7 Dec 2006 01:14:07 +0000 (02:14 +0100)]
[PATCH] i386: remove IOPL check on task switch

IOPL is implicitly saved and restored on task switch,
so explicit check is no longer needed.

Signed-off-by: Chuck Ebbert <76306.1226@compuserve.com>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] x86-64: Fix race in IO-APIC routing entry setup.
Andi Kleen [Thu, 7 Dec 2006 01:14:07 +0000 (02:14 +0100)]
[PATCH] x86-64: Fix race in IO-APIC routing entry setup.

Interrupt could happen between setting the IO-APIC entry
and setting its interrupt data.

Pointed out by Linus.

Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: Fix race in IO-APIC routing entry setup.
Andi Kleen [Thu, 7 Dec 2006 01:14:07 +0000 (02:14 +0100)]
[PATCH] i386: Fix race in IO-APIC routing entry setup.

Interrupt could happen between setting the IO-APIC entry
and setting its interrupt data.

Pointed out by Linus.

Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] x86: comment magic constants in delay.h
Paolo 'Blaisorblade' Giarrusso [Thu, 7 Dec 2006 01:14:07 +0000 (02:14 +0100)]
[PATCH] x86: comment magic constants in delay.h

For both i386 and x86_64, copy from arch/$ARCH/lib/delay.c comments about the
used magic constants, plus a few other niceties.

Signed-off-by: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
Signed-off-by: Andi Kleen <ak@suse.de>
 include/asm-i386/delay.h   |    5 ++++-
 include/asm-x86_64/delay.h |    5 ++++-
 2 files changed, 8 insertions(+), 2 deletions(-)

17 years ago[PATCH] x86-64: Make x86_64 udelay() round up instead of down.
Paolo 'Blaisorblade' Giarrusso [Thu, 7 Dec 2006 01:14:07 +0000 (02:14 +0100)]
[PATCH] x86-64: Make x86_64 udelay() round up instead of down.

Port two patches from i386 to x86_64 delay.c to make sure all rounding is done
upward instead of downward.

There is no sign in commit messages that the mismatch was done on purpose, and
"delay() guarantees sleeping at least for the specified time" is still a valid
rule IMHO.

The original x86 patches are both from pre-GIT era, i.e.:

"[PATCH] round up  in __udelay()" in commit
54c7e1f5cc6771ff644d7bc21a2b829308bd126f

"[PATCH] add 1 in __const_udelay()" in commit
42c77a9801b8877d8b90f65f75db758822a0bccc

(both commits are from converted BK repository to x86_64).

AK: fixed gcc warning

linux/arch/x86_64/lib/delay.c:43: warning: suggest parentheses around + or - inside shift
(did this actually work?)

Signed-off-by: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] Calgary: allow compiling Calgary in but not using it by default
Muli Ben-Yehuda [Thu, 7 Dec 2006 01:14:07 +0000 (02:14 +0100)]
[PATCH] Calgary: allow compiling Calgary in but not using it by default

This patch makes it possible to compile Calgary in but not use it by
default. In this mode, use 'iommu=calgary' to activate it.

Signed-off-by: Muli Ben-Yehuda <muli@il.ibm.com>
Signed-off-by: Jon Mason <jdmason@kudzu.us>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] Calgary: check BBAR ioremap success when ioremapping
Muli Ben-Yehuda [Thu, 7 Dec 2006 01:14:06 +0000 (02:14 +0100)]
[PATCH] Calgary: check BBAR ioremap success when ioremapping

This patch cleans up the previous "Use BIOS supplied BBAR information"
patch. Mostly stylistic clenaups, but also check for ioremap failure
when we ioremap the BBAR rather than when trying to use it.

Signed-off-by: Muli Ben-Yehuda <muli@il.ibm.com>
Signed-off-by: Jon Mason <jdmason@kudzu.us>
Signed-off-by: Andi Kleen <ak@suse.de>
Acked-by: Laurent Vivier <Laurent.Vivier@bull.net>
17 years ago[PATCH] Calgary: use BIOS supplied BBARs and topology information
Laurent Vivier [Thu, 7 Dec 2006 01:14:06 +0000 (02:14 +0100)]
[PATCH] Calgary: use BIOS supplied BBARs and topology information

Find the BBAR register address of each Calgary using the "Extended
BIOS Data Area" rather than calculating it ourselves. Also get the bus
topology (what PHB each bus is on) from Calgary rather than
calculating it ourselves.

This patch fixes http://bugzilla.kernel.org/show_bug.cgi?id=7407.

Signed-off-by: Laurent Vivier <Laurent.Vivier@bull.net>
Signed-off-by: Muli Ben-Yehuda <muli@il.ibm.com>
Signed-off-by: Jon Mason <jdmason@kudzu.us>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] calgary: phb_shift can be int
Muli Ben-Yehuda [Thu, 7 Dec 2006 01:14:06 +0000 (02:14 +0100)]
[PATCH] calgary: phb_shift can be int

Signed-off-by: Muli Ben-Yehuda <muli@il.ibm.com>
Signed-off-by: Jon Mason <jdmason@kudzu.us>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: Move memory map printing and other code to e820.c
bibo,mao [Thu, 7 Dec 2006 01:14:06 +0000 (02:14 +0100)]
[PATCH] i386: Move memory map printing and other code to e820.c

This patch moves e820 memory map print and memmap boot param
parsing function from setup.c to e820.c, also adds limit_regions
and print_memory_map declaration in header file.

Signed-off-by: bibo,mao <bibo.mao@intel.com>
Signed-off-by: Andi Kleen <ak@suse.de>
 arch/i386/kernel/e820.c  |  152 +++++++++++++++++++++++++++
 arch/i386/kernel/setup.c |  158 ---------------------------------
 include/asm-i386/e820.h  |    2
 arch/i386/kernel/e820.c  |  152 ++++++++++++++++++++++++++++++++++++++++++++++
 arch/i386/kernel/setup.c |  153 -----------------------------------------------
 include/asm-i386/e820.h  |    2
 3 files changed, 155 insertions(+), 152 deletions(-)

17 years ago[PATCH] i386: Move e820/efi memmap walking code to e820.c
bibo,mao [Thu, 7 Dec 2006 01:14:06 +0000 (02:14 +0100)]
[PATCH] i386: Move e820/efi memmap walking code to e820.c

This patch moves e820/efi memmap table walking function from
setup.c to e820.c, also this patch adds extern declaration in
header file.

Signed-off-by: bibo,mao <bibo.mao@intel.com>
Signed-off-by: Andi Kleen <ak@suse.de>
 arch/i386/kernel/e820.c  |  115 +++++++++++++++++++++++++++++++++
 arch/i386/kernel/setup.c |  118 -----------------------------------
 include/asm-i386/e820.h  |    2
 arch/i386/kernel/e820.c  |  115 +++++++++++++++++++++++++++++++++++++++++++++
 arch/i386/kernel/setup.c |  118 -----------------------------------------------
 include/asm-i386/e820.h  |    2
 3 files changed, 117 insertions(+), 118 deletions(-)

17 years ago[PATCH] i386: Move find_max_pfn function to e820.c
bibo,mao [Thu, 7 Dec 2006 01:14:06 +0000 (02:14 +0100)]
[PATCH] i386: Move find_max_pfn function to e820.c

Move more code from setup.c into e820.c

Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: create e820.c for e820 map sanitize and copy function
bibo,mao [Thu, 7 Dec 2006 01:14:06 +0000 (02:14 +0100)]
[PATCH] i386: create e820.c for e820 map sanitize and copy function

This patch moves bios e820 map sanitize and copy function from
setup.c to e820.c

Signed-off-by: bibo,mao <bibo.mao@intel.com>
Signed-off-by: Andi Kleen <ak@suse.de>
 arch/i386/kernel/e820.c  |  252 +++++++++++++++++++++++++++++++++++++++++++++++
 arch/i386/kernel/setup.c |  240 --------------------------------------------
 2 files changed, 252 insertions(+), 240 deletions(-)

17 years ago[PATCH] i386: i386 create e820.c to handle standard io/mem resources
bibo,mao [Thu, 7 Dec 2006 01:14:06 +0000 (02:14 +0100)]
[PATCH] i386: i386 create e820.c to handle standard io/mem resources

This patch creates new file named e820.c to hanle standard io/mem
resources, moving request_standard_resources function from setup.c
to e820.c. Also this patch modifies Makfile to compile file e820.c.

Signed-off-by: bibo,mao <bibo.mao@intel.com>
Signed-off-by: Andi Kleen <ak@suse.de>
 Makefile |    2
 arch/i386/kernel/Makefile |    2
 arch/i386/kernel/e820.c   |  289 ++++++++++++++++++++++++++++++++++++++++++++++
 arch/i386/kernel/setup.c  |  276 -------------------------------------------
 3 files changed, 293 insertions(+), 274 deletions(-)

17 years ago[PATCH] x86-64: Support -mregparm arguments for signals with SA_SIGINFO in compat...
Albert Cahalan [Thu, 7 Dec 2006 01:14:06 +0000 (02:14 +0100)]
[PATCH] x86-64: Support -mregparm arguments for signals with SA_SIGINFO in compat mode

The recent change to make x86_64 support i386 binaries compiled
with -mregparm=3 only covered signal handlers without SA_SIGINFO.
(the 3-arg "real-time" ones)

To be compatible with i386, both types should be supported.

Signed-off-by: Albert Cahalan <acahalan@gmail.com>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] x86-64: Try multiple timer variants in check_timer
Andi Kleen [Thu, 7 Dec 2006 01:14:06 +0000 (02:14 +0100)]
[PATCH] x86-64: Try multiple timer variants in check_timer

Instead of adding all kinds of more quirks try various timer
routing variants in check_timer.

In particular this tries to handle quirks from:
- Nvidia NF2-4 reference BIOS: wrong timer override
- Asus: Wrong timer override but no HPET table
- ATI: require timer disabled in 8259
- Some boards: require timer enabled in 8259

We just try many of the the known variants in the hopefully right order
in check_timer.

Trying pin 0/2 on Nvidia suggested by Tim Hockin.

TBD Experimental. Needs a lot of testing

Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: Use probe_kernel_address instead of __get_user in fault paths
Andi Kleen [Thu, 7 Dec 2006 01:14:06 +0000 (02:14 +0100)]
[PATCH] i386: Use probe_kernel_address instead of __get_user in fault paths

Makes the intention of the code cleaner to read and avoids
a potential deadlock on mmap_sem. Also change the types of
the arguments to not include __user because they're really
not user addresses.

Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] x86-64: Use probe_kernel_address in arch/x86_64/*
Andi Kleen [Thu, 7 Dec 2006 01:14:06 +0000 (02:14 +0100)]
[PATCH] x86-64: Use probe_kernel_address in arch/x86_64/*

Instead of open coded __get_user

Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] Generic: Move __user cast into probe_kernel_address
Andi Kleen [Thu, 7 Dec 2006 01:14:05 +0000 (02:14 +0100)]
[PATCH] Generic: Move __user cast into probe_kernel_address

Caller of probe_kernel_address shouldn't need to know that
pka is internally implemented with __get_user. So move the
__user cast into pka.

Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] x86-64: Extend clear_irq_vector
Yinghai Lu [Thu, 7 Dec 2006 01:14:05 +0000 (02:14 +0100)]
[PATCH] x86-64: Extend clear_irq_vector

Clear the irq releated entries in irq_vector, irq_domain and vector_irq
instead of clearing irq_vector only. So when new irq is created, it
could reuse that vector. (actually is the second loop scanning from
FIRST_DEVICE_VECTOR+8). This could avoid the vectors are used up
with enough module inserting and removing

Cc: Eric W. Biedierman <ebiederm@xmission.com>
Cc: Muli Ben-Yehuda <muli@il.ibm.com>
Signed-off-By: Yinghai Lu <yinghai.lu@amd.com>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: Use CLFLUSH instead of WBINVD in change_page_attr
Andi Kleen [Thu, 7 Dec 2006 01:14:05 +0000 (02:14 +0100)]
[PATCH] i386: Use CLFLUSH instead of WBINVD in change_page_attr

CLFLUSH is a lot faster than WBINVD so try to use that.

Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: Retrieve CLFLUSH size from CPUID
Andi Kleen [Thu, 7 Dec 2006 01:14:05 +0000 (02:14 +0100)]
[PATCH] i386: Retrieve CLFLUSH size from CPUID

Also report it in /proc/cpuinfo similar to x86-64.

Needed for followon patch

Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] x86-64: Speed and clean up cache flushing in change_page_attr
Andi Kleen [Thu, 7 Dec 2006 01:14:05 +0000 (02:14 +0100)]
[PATCH] x86-64: Speed and clean up cache flushing in change_page_attr

CLFLUSH is a lot faster than WBINVD so avoid the later if at all
possible.

Always pass the complete list of pages to other CPUs to cut down
the number of IPIs.

Minor other cleanup and sync with i386 version.

Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: Fix entry.S code with !CONFIG_VM86
Joe Korty [Thu, 7 Dec 2006 01:14:04 +0000 (02:14 +0100)]
[PATCH] i386: Fix entry.S code with !CONFIG_VM86

The entry.S code at work_notifysig is surely wrong.  It drops into unrelated
code if the branch to work_notifysig_v86 is taken, and CONFIG_VM86=n.

[PATCH] Make vm86 support optional
tree 9b5daef5280800a0006343a17f63072658d91a1d
pushed to git Jan 8, 2006, and first appears in 2.6.16

The 'fix' here is to also compile out the vm86 test & branch when
CONFIG_VM86=n.

Signed-off-by: Joe Korty <joe.korty@ccur.com>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] x86-64: Extract segment descriptor definitions for use outside
Avi Kivity [Thu, 7 Dec 2006 01:14:04 +0000 (02:14 +0100)]
[PATCH] x86-64: Extract segment descriptor definitions for use outside

Code that wants to use struct desc_struct cannot do so on i386 because
desc.h contains other code that will only compile on x86_64.

So extract the structure definitions into a asm-x86_64/desc_defs.h.

Signed-off-by: Avi Kivity <avi@qumranet.com>
Signed-off-by: Andi Kleen <ak@suse.de>
 include/asm-x86_64/desc.h      |   53 -------------------------------
 include/asm-x86_64/desc_defs.h |   69 +++++++++++++++++++++++++++++++++++++++++
 2 files changed, 70 insertions(+), 52 deletions(-)

17 years ago[PATCH] i386: Mark CONFIG_RELOCATABLE EXPERIMENTAL
Vivek Goyal [Thu, 7 Dec 2006 01:14:04 +0000 (02:14 +0100)]
[PATCH] i386: Mark CONFIG_RELOCATABLE EXPERIMENTAL

Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: extend bzImage protocol for relocatable protected mode kernel
Vivek Goyal [Thu, 7 Dec 2006 01:14:04 +0000 (02:14 +0100)]
[PATCH] i386: extend bzImage protocol for relocatable protected mode kernel

Extend bzImage protocol to enable bootloaders to load a completely relocatable
bzImage.  Now protected mode component of kernel is also relocatable and a
boot-loader can load the protected mode component at a differnt physical
address than 1MB.  (If kernel was built with CONFIG_RELOCATABLE)

Kexec can make use of it to load this kernel at a different physical address
to capture kernel crash dumps.

Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] i386: Implement CONFIG_PHYSICAL_ALIGN
Vivek Goyal [Thu, 7 Dec 2006 01:14:04 +0000 (02:14 +0100)]
[PATCH] i386: Implement CONFIG_PHYSICAL_ALIGN

o Now CONFIG_PHYSICAL_START is being replaced with CONFIG_PHYSICAL_ALIGN.
  Hardcoding the kernel physical start value creates a problem in relocatable
  kernel context due to boot loader limitations. For ex, if somebody
  compiles a relocatable kernel to be run from address 4MB, but this kernel
  will run from location 1MB as grub loads the kernel at physical address
  1MB. Kernel thinks that I am a relocatable kernel and I should run from
  the address I have been loaded at. So somebody wanting to run kernel
  from 4MB alignment location (for improved performance regions) can't do
  that.

o Hence, Eric proposed that probably CONFIG_PHYSICAL_ALIGN will make
  more sense in relocatable kernel context. At run time kernel will move
  itself to a physical addr location which meets user specified alignment
  restrictions.

Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: Warn upon absolute relocations being present
Vivek Goyal [Thu, 7 Dec 2006 01:14:04 +0000 (02:14 +0100)]
[PATCH] i386: Warn upon absolute relocations being present

o Relocations generated w.r.t absolute symbols are not processed as by
  definition, absolute symbols are not to be relocated. Explicitly warn
  user about absolutions relocations present at compile time.

o These relocations get introduced either due to linker optimizations or
  some programming oversights.

o Also create a list of symbols which have been audited to be safe and
  don't emit warnings for these.

Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: Relocatable kernel support
Eric W. Biederman [Thu, 7 Dec 2006 01:14:04 +0000 (02:14 +0100)]
[PATCH] i386: Relocatable kernel support

This patch modifies the i386 kernel so that if CONFIG_RELOCATABLE is
selected it will be able to be loaded at any 4K aligned address below
1G.  The technique used is to compile the decompressor with -fPIC and
modify it so the decompressor is fully relocatable.  For the main
kernel relocations are generated.  Resulting in a kernel that is relocatable
with no runtime overhead and no need to modify the source code.

A reserved 32bit word in the parameters has been assigned
to serve as a stack so we figure out where are running.

Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] relocatable kernel: Kallsyms generate relocatable symbols
Eric W. Biederman [Thu, 7 Dec 2006 01:14:04 +0000 (02:14 +0100)]
[PATCH] relocatable kernel: Kallsyms generate relocatable symbols

Print the addresses of non-absolute symbols relative to _text
so that ld will generate relocations.  Allowing a relocatable
kernel to relocate them.  We can't actually use the symbol names
because kallsyms includes static symbols that are not exported
from their object files.

Add the _text symbol definitions to the architectures which don't
define it otherwise linker will fail.

Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: CONFIG_PHYSICAL_START cleanup
Eric W. Biederman [Thu, 7 Dec 2006 01:14:04 +0000 (02:14 +0100)]
[PATCH] i386: CONFIG_PHYSICAL_START cleanup

Defining __PHYSICAL_START and __KERNEL_START in asm-i386/page.h works but
it triggers a full kernel rebuild for the silliest of reasons.  This
modifies the users to directly use CONFIG_PHYSICAL_START and linux/config.h
which prevents the full rebuild problem, which makes the code much
more maintainer and hopefully user friendly.

Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: Reserve kernel memory starting from _text
Eric W. Biederman [Thu, 7 Dec 2006 01:14:03 +0000 (02:14 +0100)]
[PATCH] i386: Reserve kernel memory starting from _text

Currently when we are reserving the memory the kernel text
resides in we start at __PHYSICAL_START which happens to be
correct but not very obvious.  In addition when we start relocating
the kernel __PHYSICAL_START is the wrong value, as it is an
absolute symbol that does not get relocated.

By starting the reservation at __pa_symbol(_text)
the code is clearer and will be correct when relocated.

Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: define __pa_symbol()
Eric W. Biederman [Thu, 7 Dec 2006 01:14:03 +0000 (02:14 +0100)]
[PATCH] i386: define __pa_symbol()

On x86_64 we have to be careful with calculating the physical
address of kernel symbols.  Both because of compiler odditities
and because the symbols live in a different range of the virtual
address space.

Having a defintition of __pa_symbol that works on both x86_64 and
i386 simplifies writing code that works for both x86_64 and
i386 that has these kinds of dependencies.

So this patch adds the trivial i386 __pa_symbol definition.

Added assembly magic similar to RELOC_HIDE as suggested by Andi Kleen.
Just picked it up from x86_64.

Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: Add comment for align to vmlinux.lds
Vivek Goyal [Thu, 7 Dec 2006 01:14:03 +0000 (02:14 +0100)]
[PATCH] i386: Add comment for align to vmlinux.lds

Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: Distinguish absolute symbols
Vivek Goyal [Thu, 7 Dec 2006 01:14:03 +0000 (02:14 +0100)]
[PATCH] i386: Distinguish absolute symbols

Ld knows about 2 kinds of symbols,  absolute and section
relative.  Section relative symbols symbols change value
when a section is moved and absolute symbols do not.

Currently in the linker script we have several labels
marking the beginning and ending of sections that
are outside of sections, making them absolute symbols.
Having a mixture of absolute and section relative
symbols refereing to the same data is currently harmless
but it is confusing.

This must be done carefully as newer revs of ld do not place
symbols that appear in sections without data and instead
ld makes those symbols global :(

My ultimate goal is to build a relocatable kernel.  The
safest and least intrusive technique is to generate
relocation entries so the kernel can be relocated at load
time.  The only penalty would be an increase in the size
of the kernel binary.  The problem is that if absolute and
relocatable symbols are not properly specified absolute symbols
will be relocated or section relative symbols won't be, which
is fatal.

The practical motivation is that when generating kernels that
will run from a reserved area for analyzing what caused
a kernel panic, it is simpler if you don't need to hard code
the physical memory location they will run at, especially
for the distributions.

[AK: and merged:]

o Also put a message so that in future people can be aware of it and
  avoid introducing absolute symbols.

Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] x86-64: Implement compat code for SIOCSIFHWBROADCAST
Andi Kleen [Thu, 7 Dec 2006 01:14:03 +0000 (02:14 +0100)]
[PATCH] x86-64: Implement compat code for SIOCSIFHWBROADCAST

This network ioctl wasn't handled before.

Reported by Alexandra.Kossovsky@oktetlabs.ru (Alexandra Kossovsky)
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] x86: Mention PCI instead of RAM in NMI parity error message
Andi Kleen [Thu, 7 Dec 2006 01:14:03 +0000 (02:14 +0100)]
[PATCH] x86: Mention PCI instead of RAM in NMI parity error message

On modern systems RAM errors don't cause NMIs, but it's usually
caused by PCI SERR. Mention PCI instead of RAM in the printk.

Reported by r_hayashi@ctc-g.co.jp (Ryutaro Hayashi)

Cc: r_hayashi@ctc-g.co.jp
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] x86: remove last two pci_find offenders in the core code
Alan Cox [Thu, 7 Dec 2006 01:14:03 +0000 (02:14 +0100)]
[PATCH] x86: remove last two pci_find offenders in the core code

Resending as I believe the discussion about them established they were
correct.

Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] x86: Don't use nested idle loops
Andi Kleen [Thu, 7 Dec 2006 01:14:03 +0000 (02:14 +0100)]
[PATCH] x86: Don't use nested idle loops

Currently the idle loop has two nested loops -- one high level
in cpu_idle and in some low level idle functions another one.

Looping in the low level idle functions breaks the idle notifiers
because interrupts waking up sleep states need to execute
exit_idle() which is only in cpu_idle().

So don't do that, only loop in cpu_idle(). This only removes
code.

In some cases e.g. poll_idle the idle loop is a little longer
now because cpu_idle checks more things. I hope that isn't a problem
ACPI idle doesn't change behaviour because it never looped anyways.

Cc: len.brown@intel.com
Cc: eranian@hpl.hp.com
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: PDA: Fix math emulator for new pt_regs
Andi Kleen [Thu, 7 Dec 2006 01:14:03 +0000 (02:14 +0100)]
[PATCH] i386: PDA: Fix math emulator for new pt_regs

This patch fixes the math emulator, which had not been adjusted
to match the changed struct pt_regs.

AK: extracted from larger patch by Jeremy.
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: Store the interrupt regs pointer in the PDA
Jeremy Fitzhardinge [Thu, 7 Dec 2006 01:14:03 +0000 (02:14 +0100)]
[PATCH] i386: Store the interrupt regs pointer in the PDA

Signed-off-by: Jeremy Fitzhardinge <jeremy@goop.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: Implement "current" with the PDA
Jeremy Fitzhardinge [Thu, 7 Dec 2006 01:14:03 +0000 (02:14 +0100)]
[PATCH] i386: Implement "current" with the PDA

Use the pcurrent field in the PDA to implement the "current" macro.  This ends
up compiling down to a single instruction to get the current task.

Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Chuck Ebbert <76306.1226@compuserve.com>
Cc: Zachary Amsden <zach@vmware.com>
Cc: Jan Beulich <jbeulich@novell.com>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] i386: Implement smp_processor_id() with the PDA
Jeremy Fitzhardinge [Thu, 7 Dec 2006 01:14:03 +0000 (02:14 +0100)]
[PATCH] i386: Implement smp_processor_id() with the PDA

Use the cpu_number in the PDA to implement raw_smp_processor_id.  This is a
little simpler than using thread_info, though the cpu field in thread_info
cannot be removed since it is used for things other than getting the current
CPU in common code.

Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Chuck Ebbert <76306.1226@compuserve.com>
Cc: Zachary Amsden <zach@vmware.com>
Cc: Jan Beulich <jbeulich@novell.com>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] i386: Update sys_vm86 to cope with changed pt_regs and %gs usage
Jeremy Fitzhardinge [Thu, 7 Dec 2006 01:14:03 +0000 (02:14 +0100)]
[PATCH] i386: Update sys_vm86 to cope with changed pt_regs and %gs usage

sys_vm86 uses a struct kernel_vm86_regs, which is identical to pt_regs, but
adds an extra space for all the segment registers.  Previously this structure
was completely independent, so changes in pt_regs had to be reflected in
kernel_vm86_regs.  This changes just embeds pt_regs in kernel_vm86_regs, and
makes the appropriate changes to vm86.c to deal with the new naming.

Also, since %gs is dealt with differently in the kernel, this change adjusts
vm86.c to reflect this.

While making these changes, I also cleaned up some frankly bizarre code which
was added when auditing was added to sys_vm86.

Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Chuck Ebbert <76306.1226@compuserve.com>
Cc: Zachary Amsden <zach@vmware.com>
Cc: Jan Beulich <jbeulich@novell.com>
Cc: Andi Kleen <ak@suse.de>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: Jason Baron <jbaron@redhat.com>
Cc: Chris Wright <chrisw@sous-sol.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] i386: Fix places where using %gs changes the usermode ABI
Jeremy Fitzhardinge [Thu, 7 Dec 2006 01:14:02 +0000 (02:14 +0100)]
[PATCH] i386: Fix places where using %gs changes the usermode ABI

There are a few places where the change in struct pt_regs and the use of %gs
affect the userspace ABI.  These are primarily debugging interfaces where
thread state can be inspected or extracted.

Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Chuck Ebbert <76306.1226@compuserve.com>
Cc: Zachary Amsden <zach@vmware.com>
Cc: Jan Beulich <jbeulich@novell.com>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] i386: Use %gs as the PDA base-segment in the kernel
Jeremy Fitzhardinge [Thu, 7 Dec 2006 01:14:02 +0000 (02:14 +0100)]
[PATCH] i386: Use %gs as the PDA base-segment in the kernel

This patch is the meat of the PDA change.  This patch makes several related
changes:

1: Most significantly, %gs is now used in the kernel.  This means that on
   entry, the old value of %gs is saved away, and it is reloaded with
   __KERNEL_PDA.

2: entry.S constructs the stack in the shape of struct pt_regs, and this
   is passed around the kernel so that the process's saved register
   state can be accessed.

   Unfortunately struct pt_regs doesn't currently have space for %gs
   (or %fs). This patch extends pt_regs to add space for gs (no space
   is allocated for %fs, since it won't be used, and it would just
   complicate the code in entry.S to work around the space).

3: Because %gs is now saved on the stack like %ds, %es and the integer
   registers, there are a number of places where it no longer needs to
   be handled specially; namely context switch, and saving/restoring the
   register state in a signal context.

4: And since kernel threads run in kernel space and call normal kernel
   code, they need to be created with their %gs == __KERNEL_PDA.

Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Chuck Ebbert <76306.1226@compuserve.com>
Cc: Zachary Amsden <zach@vmware.com>
Cc: Jan Beulich <jbeulich@novell.com>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] i386: Initialize the per-CPU data area
Jeremy Fitzhardinge [Thu, 7 Dec 2006 01:14:02 +0000 (02:14 +0100)]
[PATCH] i386: Initialize the per-CPU data area

When a CPU is brought up, a PDA and GDT are allocated for it.  The GDT's
__KERNEL_PDA entry is pointed to the allocated PDA memory, so that all
references using this segment descriptor will refer to the PDA.

This patch rearranges CPU initialization a bit, so that the GDT/PDA are set up
as early as possible in cpu_init().  Also for secondary CPUs, GDT+PDA are
preallocated and initialized so all the secondary CPU needs to do is set up
the ldt and load %gs.  This will be important once smp_processor_id() and
current use the PDA.

In all cases, the PDA is set up in head.S, before a CPU starts running C code,
so the PDA is always available.

Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Chuck Ebbert <76306.1226@compuserve.com>
Cc: Zachary Amsden <zach@vmware.com>
Cc: Jan Beulich <jbeulich@novell.com>
Cc: Andi Kleen <ak@suse.de>
Cc: James Bottomley <James.Bottomley@SteelEye.com>
Cc: Matt Tolentino <matthew.e.tolentino@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] i386: Basic definitions for i386-pda
Jeremy Fitzhardinge [Thu, 7 Dec 2006 01:14:02 +0000 (02:14 +0100)]
[PATCH] i386: Basic definitions for i386-pda

This patch has the basic definitions of struct i386_pda, and the segment
selector in the GDT.

asm-i386/pda.h is more or less a direct copy of asm-x86_64/pda.h.  The most
interesting difference is the use of _proxy_pda, which is used to give gcc a
model for the actual memory operations on the real pda structure.  No actual
reference is ever made to _proxy_pda, so it is never defined.

Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Chuck Ebbert <76306.1226@compuserve.com>
Cc: Zachary Amsden <zach@vmware.com>
Cc: Jan Beulich <jbeulich@novell.com>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] i386: Use asm-offsets for the offsets of registers into the pt_regs struct
Jeremy Fitzhardinge [Thu, 7 Dec 2006 01:14:02 +0000 (02:14 +0100)]
[PATCH] i386: Use asm-offsets for the offsets of registers into the pt_regs struct

Use asm-offsets for the offsets of registers into the pt_regs struct, rather
than having hard-coded constants

I left the constants in the comments of entry.S because they're useful for
reference; the code in entry.S is very dependent on the layout of pt_regs,
even when using asm-offsets.

Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Keith Owens <kaos@ocs.com.au>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] x86-64: miscellaneous entry.S adjustments
Jan Beulich [Thu, 7 Dec 2006 01:14:02 +0000 (02:14 +0100)]
[PATCH] x86-64: miscellaneous entry.S adjustments

This patch:
- makes ret_from_sys_call no longer global (all external users were
  previously switched to use int_ret_from_sys_call)
- adjusts placement of a CFI_{REMEMBER,RESTORE}_STATE pair to better
  fit logic flow
- eliminates an unnecessary pair of CFI_{REMEMBER,RESTORE}_STATE
- glues together function- and unwinder-wise the previously separate
  system_call and int_ret_from_sys_call function fragments

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] x86-64: dump_trace() atomicity fix
Andrew Morton [Thu, 7 Dec 2006 01:14:02 +0000 (02:14 +0100)]
[PATCH] x86-64: dump_trace() atomicity fix

Fix

BUG: using smp_processor_id() in preemptible [00000001] code:

in backtracer on preemptible debug kernels.

Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: add Intel Core related PMU MSRs
Stephane Eranian [Thu, 7 Dec 2006 01:14:02 +0000 (02:14 +0100)]
[PATCH] i386: add Intel Core related PMU MSRs

- add Intel Precise-Event Based sampling (PEBS) related MSR
- add Intel Data Save (DS) Area related MSR
- add Intel Core microarchitecure performance counter MSRs

Signed-off-by: stephane eranian <eranian@hpl.hp.com>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] x86-64: x86-64 add Intel Core related PMU MSRs definitions
Stephane Eranian [Thu, 7 Dec 2006 01:14:02 +0000 (02:14 +0100)]
[PATCH] x86-64: x86-64 add Intel Core related PMU MSRs definitions

Add o the x86-64 tree a bunch of MSRs related to performance
monitoring for the processors based on Intel Core microarchitecture.
It also adds some architectural MSRs for PEBS. A similar patch for i386 will
follow.

changelog:
- add Intel Precise-Event Based sampling (PEBS) related MSR
- add Intel Data Save (DS) Area related MSR
- add Intel Core microarchitecure performance counter MSRs

Signed-off-by: stephane eranian <eranian@hpl.hp.com>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: add missing iounmap in i386 hpet clocksource code
Amol Lad [Thu, 7 Dec 2006 01:14:02 +0000 (02:14 +0100)]
[PATCH] i386: add missing iounmap in i386 hpet clocksource code

ioremap must be balanced by an iounmap and failing to do so can result
in a memory leak.

Tested (compilation only):
- using allmodconfig
- making sure the files are compiling without any warning/error due to
new changes

Signed-off-by: Amol Lad <amol@verismonetworks.com>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: Add iounmap in error paths in hpet code
Amol Lad [Thu, 7 Dec 2006 01:14:02 +0000 (02:14 +0100)]
[PATCH] i386: Add iounmap in error paths in hpet code

Signed-off-by: Amol Lad <amol@verismonetworks.com>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] x86-64: Insert Local and IO APIC(s) into resource map
Aaron Durbin [Thu, 7 Dec 2006 01:14:01 +0000 (02:14 +0100)]
[PATCH] x86-64: Insert Local and IO APIC(s) into resource map

Insert the Local APIC and IO APIC(s) into the resource tree.  It allows the
APIC resources to be visible within /proc/iomem.  The patch also takes into
account IO APIC(s) mapped in the PCI space by deferring the insertion until
after PCI has allocated its necessary resources.

Signed-off-by: Aaron Durbin <adurbin@google.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@muc.de>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
17 years ago[PATCH] i386: add sleazy FPU optimization
Chuck Ebbert [Thu, 7 Dec 2006 01:14:01 +0000 (02:14 +0100)]
[PATCH] i386: add sleazy FPU optimization

i386 port of the sLeAZY-fpu feature.  Chuck reports that this gives him a +/-
0.4% improvement on his simple benchmark

x86_64 description follows:

Right now the kernel on x86-64 has a 100% lazy fpu behavior: after *every*
context switch a trap is taken for the first FPU use to restore the FPU
context lazily.  This is of course great for applications that have very
sporadic or no FPU use (since then you avoid doing the expensive save/restore
all the time).  However for very frequent FPU users...  you take an extra trap
every context switch.

The patch below adds a simple heuristic to this code: After 5 consecutive
context switches of FPU use, the lazy behavior is disabled and the context
gets restored every context switch.  If the app indeed uses the FPU, the trap
is avoided.  (the chance of the 6th time slice using FPU after the previous 5
having done so are quite high obviously).

After 256 switches, this is reset and lazy behavior is returned (until there
are 5 consecutive ones again).  The reason for this is to give apps that do
longer bursts of FPU use still the lazy behavior back after some time.

Signed-off-by: Chuck Ebbert <76306.1226@compuserve.com>
Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Andi Kleen <ak@suse.de>
17 years ago[PATCH] i386: espfix cleanup
Stas Sergeev [Thu, 7 Dec 2006 01:14:01 +0000 (02:14 +0100)]
[PATCH] i386: espfix cleanup

Clean up the espfix code:

- Introduced PER_CPU() macro to be used from asm
- Introduced GET_DESC_BASE() macro to be used from asm
- Rewrote the fixup code in asm, as calling a C code with the altered %ss
  appeared to be unsafe
- No longer altering the stack from a .fixup section
- 16bit per-cpu stack is no longer used, instead the stack segment base
  is patched the way so that the high word of the kernel and user %esp
  are the same.
- Added the limit-patching for the espfix segment. (Chuck Ebbert)

[jeremy@goop.org: use the x86 scaling addressing mode rather than shifting]
Signed-off-by: Stas Sergeev <stsp@aknet.ru>
Signed-off-by: Andi Kleen <ak@suse.de>
Acked-by: Zachary Amsden <zach@vmware.com>
Acked-by: Chuck Ebbert <76306.1226@compuserve.com>
Acked-by: Jan Beulich <jbeulich@novell.com>
Cc: Andi Kleen <ak@muc.de>
Signed-off-by: Jeremy Fitzhardinge <jeremy@goop.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>