[POWERPC] ppc: Fix PCIX configuration of Ocotea & Taishan for > 512MB DDR

Change the configuration of the PCIX PCI->PLB inbound memory window
to be 2GB instead of 512kB. The comment already mentioned 2GB, but the
code unfortunately didn't reflect this.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>

diff --git a/arch/ppc/platforms/4xx/ocotea.c b/arch/ppc/platforms/4xx/ocotea.c
index 84e999d..c8017c9 100644 (file)
--- a/arch/ppc/platforms/4xx/ocotea.c
+++ b/arch/ppc/platforms/4xx/ocotea.c
@@ -178,7 +178,7 @@ ocotea_setup_pcix(void)
        /* Setup 2GB PCI->PLB inbound memory window at 0, enable MSIs */
        PCIX_WRITEL(0x00000000, PCIX0_PIM0LAH);
        PCIX_WRITEL(0x00000000, PCIX0_PIM0LAL);
-       PCIX_WRITEL(0xe0000007, PCIX0_PIM0SA);
+       PCIX_WRITEL(0x80000007, PCIX0_PIM0SA);
 
        eieio();
 }

diff --git a/arch/ppc/platforms/4xx/taishan.c b/arch/ppc/platforms/4xx/taishan.c
index bb0253e..5d9af8d 100644 (file)
--- a/arch/ppc/platforms/4xx/taishan.c
+++ b/arch/ppc/platforms/4xx/taishan.c
@@ -235,7 +235,7 @@ taishan_setup_pcix(void)
        /* Setup 2GB PCI->PLB inbound memory window at 0, enable MSIs */
        PCIX_WRITEL(0x00000000, PCIX0_PIM0LAH);
        PCIX_WRITEL(0x00000000, PCIX0_PIM0LAL);
-       PCIX_WRITEL(0xe0000007, PCIX0_PIM0SA);
+       PCIX_WRITEL(0x80000007, PCIX0_PIM0SA);
        PCIX_WRITEL(0xffffffff, PCIX0_PIM0SAH);
 
        iounmap(pcix_reg_base);