[ARM] 3064/1: start using ixp2000_reg_wrb

Patch from Lennert Buytenhek

Switch the users of ixp2000_reg_write that depend on writes being
flushed out of the write buffer by the time that function returns
over to ixp2000_reg_wrb.

When using XCB=101, writes to the same functional unit are still
guaranteed to complete in order, so we only need to protect against:
- reordering of writes to different functional units
- masking an interrupt and then reenabling the IRQ bit in CPSR

Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c
index 01c393c..69c6cf8 100644 (file)
--- a/arch/arm/mach-ixp2000/core.c
+++ b/arch/arm/mach-ixp2000/core.c
@@ -62,7 +62,7 @@ void ixp2000_acquire_slowport(struct slowport_cfg *new_cfg, struct slowport_cfg
        ixp2000_reg_write(IXP2000_SLOWPORT_WTC2, new_cfg->WTC);
        ixp2000_reg_write(IXP2000_SLOWPORT_RTC2, new_cfg->RTC);
        ixp2000_reg_write(IXP2000_SLOWPORT_PCR, new_cfg->PCR);
-       ixp2000_reg_write(IXP2000_SLOWPORT_ADC, new_cfg->ADC);
+       ixp2000_reg_wrb(IXP2000_SLOWPORT_ADC, new_cfg->ADC);
 }
 
 void ixp2000_release_slowport(struct slowport_cfg *old_cfg)
@@ -71,7 +71,7 @@ void ixp2000_release_slowport(struct slowport_cfg *old_cfg)
        ixp2000_reg_write(IXP2000_SLOWPORT_WTC2, old_cfg->WTC);
        ixp2000_reg_write(IXP2000_SLOWPORT_RTC2, old_cfg->RTC);
        ixp2000_reg_write(IXP2000_SLOWPORT_PCR, old_cfg->PCR);
-       ixp2000_reg_write(IXP2000_SLOWPORT_ADC, old_cfg->ADC);
+       ixp2000_reg_wrb(IXP2000_SLOWPORT_ADC, old_cfg->ADC);
 
        spin_unlock_irqrestore(&ixp2000_slowport_lock, 
                                        ixp2000_slowport_irq_flags);
@@ -145,7 +145,7 @@ void __init ixp2000_map_io(void)
        iotable_init(ixp2000_io_desc, ARRAY_SIZE(ixp2000_io_desc));
 
        /* Set slowport to 8-bit mode.  */
-       ixp2000_reg_write(IXP2000_SLOWPORT_FRM, 1);
+       ixp2000_reg_wrb(IXP2000_SLOWPORT_FRM, 1);
 }
 
 
@@ -209,7 +209,7 @@ static int ixp2000_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
        write_seqlock(&xtime_lock);
 
        /* clear timer 1 */
-       ixp2000_reg_write(IXP2000_T1_CLR, 1);
+       ixp2000_reg_wrb(IXP2000_T1_CLR, 1);
 
        while ((next_jiffy_time - *missing_jiffy_timer_csr) > ticks_per_jiffy) {
                timer_tick(regs);
@@ -252,12 +252,12 @@ void __init ixp2000_init_time(unsigned long tick_rate)
 
                ixp2000_reg_write(IXP2000_T4_CLR, 0);
                ixp2000_reg_write(IXP2000_T4_CLD, -1);
-               ixp2000_reg_write(IXP2000_T4_CTL, (1 << 7));
+               ixp2000_reg_wrb(IXP2000_T4_CTL, (1 << 7));
                missing_jiffy_timer_csr = IXP2000_T4_CSR;
        } else {
                ixp2000_reg_write(IXP2000_T2_CLR, 0);
                ixp2000_reg_write(IXP2000_T2_CLD, -1);
-               ixp2000_reg_write(IXP2000_T2_CTL, (1 << 7));
+               ixp2000_reg_wrb(IXP2000_T2_CTL, (1 << 7));
                missing_jiffy_timer_csr = IXP2000_T2_CSR;
        }
        next_jiffy_time = 0xffffffff;
@@ -279,7 +279,7 @@ static void update_gpio_int_csrs(void)
        ixp2000_reg_write(IXP2000_GPIO_FEDR, GPIO_IRQ_falling_edge);
        ixp2000_reg_write(IXP2000_GPIO_REDR, GPIO_IRQ_rising_edge);
        ixp2000_reg_write(IXP2000_GPIO_LSLR, GPIO_IRQ_level_low);
-       ixp2000_reg_write(IXP2000_GPIO_LSHR, GPIO_IRQ_level_high);
+       ixp2000_reg_wrb(IXP2000_GPIO_LSHR, GPIO_IRQ_level_high);
 }
 
 void gpio_line_config(int line, int direction)
@@ -297,9 +297,9 @@ void gpio_line_config(int line, int direction)
                GPIO_IRQ_level_high &= ~(1 << line);
                update_gpio_int_csrs();
 
-               ixp2000_reg_write(IXP2000_GPIO_PDSR, 1 << line);
+               ixp2000_reg_wrb(IXP2000_GPIO_PDSR, 1 << line);
        } else if (direction == GPIO_IN) {
-               ixp2000_reg_write(IXP2000_GPIO_PDCR, 1 << line);
+               ixp2000_reg_wrb(IXP2000_GPIO_PDCR, 1 << line);
        }
        local_irq_restore(flags);
 }
@@ -365,12 +365,12 @@ static void ixp2000_GPIO_irq_mask_ack(unsigned int irq)
 
        ixp2000_reg_write(IXP2000_GPIO_EDSR, (1 << (irq - IRQ_IXP2000_GPIO0)));
        ixp2000_reg_write(IXP2000_GPIO_LDSR, (1 << (irq - IRQ_IXP2000_GPIO0)));
-       ixp2000_reg_write(IXP2000_GPIO_INST, (1 << (irq - IRQ_IXP2000_GPIO0)));
+       ixp2000_reg_wrb(IXP2000_GPIO_INST, (1 << (irq - IRQ_IXP2000_GPIO0)));
 }
 
 static void ixp2000_GPIO_irq_mask(unsigned int irq)
 {
-       ixp2000_reg_write(IXP2000_GPIO_INCR, (1 << (irq - IRQ_IXP2000_GPIO0)));
+       ixp2000_reg_wrb(IXP2000_GPIO_INCR, (1 << (irq - IRQ_IXP2000_GPIO0)));
 }
 
 static void ixp2000_GPIO_irq_unmask(unsigned int irq)
@@ -389,9 +389,9 @@ static void ixp2000_pci_irq_mask(unsigned int irq)
 {
        unsigned long temp = *IXP2000_PCI_XSCALE_INT_ENABLE;
        if (irq == IRQ_IXP2000_PCIA)
-               ixp2000_reg_write(IXP2000_PCI_XSCALE_INT_ENABLE, (temp & ~(1 << 26)));
+               ixp2000_reg_wrb(IXP2000_PCI_XSCALE_INT_ENABLE, (temp & ~(1 << 26)));
        else if (irq == IRQ_IXP2000_PCIB)
-               ixp2000_reg_write(IXP2000_PCI_XSCALE_INT_ENABLE, (temp & ~(1 << 27)));
+               ixp2000_reg_wrb(IXP2000_PCI_XSCALE_INT_ENABLE, (temp & ~(1 << 27)));
 }
 
 static void ixp2000_pci_irq_unmask(unsigned int irq)
@@ -411,7 +411,7 @@ static struct irqchip ixp2000_pci_irq_chip = {
 
 static void ixp2000_irq_mask(unsigned int irq)
 {
-       ixp2000_reg_write(IXP2000_IRQ_ENABLE_CLR, (1 << irq));
+       ixp2000_reg_wrb(IXP2000_IRQ_ENABLE_CLR, (1 << irq));
 }
 
 static void ixp2000_irq_unmask(unsigned int irq)
@@ -443,7 +443,7 @@ void __init ixp2000_init_irq(void)
        ixp2000_reg_write(IXP2000_GPIO_INCR, -1);
 
        /* clear PCI interrupt sources */
-       ixp2000_reg_write(IXP2000_PCI_XSCALE_INT_ENABLE, 0);
+       ixp2000_reg_wrb(IXP2000_PCI_XSCALE_INT_ENABLE, 0);
 
        /*
         * Certain bits in the IRQ status register of the 

diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c
index 8b4a839..00af934 100644 (file)
--- a/arch/arm/mach-ixp2000/ixdp2x00.c
+++ b/arch/arm/mach-ixp2000/ixdp2x00.c
@@ -81,7 +81,7 @@ static void ixdp2x00_irq_mask(unsigned int irq)
 
        dummy = *board_irq_mask;
        dummy |=  IXP2000_BOARD_IRQ_MASK(irq);
-       ixp2000_reg_write(board_irq_mask, dummy);
+       ixp2000_reg_wrb(board_irq_mask, dummy);
 
 #ifdef CONFIG_ARCH_IXDP2400
        if (machine_is_ixdp2400())
@@ -101,7 +101,7 @@ static void ixdp2x00_irq_unmask(unsigned int irq)
 
        dummy = *board_irq_mask;
        dummy &=  ~IXP2000_BOARD_IRQ_MASK(irq);
-       ixp2000_reg_write(board_irq_mask, dummy);
+       ixp2000_reg_wrb(board_irq_mask, dummy);
 
        if (machine_is_ixdp2400()) 
                ixp2000_release_slowport(&old_cfg);

diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c
index fee1d7b..dfaaa2d 100644 (file)
--- a/arch/arm/mach-ixp2000/ixdp2x01.c
+++ b/arch/arm/mach-ixp2000/ixdp2x01.c
@@ -51,7 +51,7 @@
  *************************************************************************/
 static void ixdp2x01_irq_mask(unsigned int irq)
 {
-       ixp2000_reg_write(IXDP2X01_INT_MASK_SET_REG,
+       ixp2000_reg_wrb(IXDP2X01_INT_MASK_SET_REG,
                                IXP2000_BOARD_IRQ_MASK(irq));
 }
 
@@ -114,7 +114,7 @@ void __init ixdp2x01_init_irq(void)
 
        /* Mask all interrupts from CPLD, disable simulation */
        ixp2000_reg_write(IXDP2X01_INT_MASK_SET_REG, 0xffffffff);
-       ixp2000_reg_write(IXDP2X01_INT_SIM_REG, 0);
+       ixp2000_reg_wrb(IXDP2X01_INT_SIM_REG, 0);
 
        for (irq = NR_IXP2000_IRQS; irq < NR_IXDP2X01_IRQS; irq++) {
                if (irq & valid_irq_mask) {
@@ -316,7 +316,7 @@ static struct flash_platform_data ixdp2x01_flash_platform_data = {
 
 static unsigned long ixdp2x01_flash_bank_setup(unsigned long ofs)
 {
-       ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG,
+       ixp2000_reg_wrb(IXDP2X01_CPLD_FLASH_REG,
                ((ofs >> IXDP2X01_FLASH_WINDOW_BITS) | IXDP2X01_CPLD_FLASH_INTERN));
        return (ofs & IXDP2X01_FLASH_WINDOW_MASK);
 }
@@ -363,7 +363,7 @@ static struct platform_device *ixdp2x01_devices[] __initdata = {
 
 static void __init ixdp2x01_init_machine(void)
 {
-       ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG,
+       ixp2000_reg_wrb(IXDP2X01_CPLD_FLASH_REG,
                (IXDP2X01_CPLD_FLASH_BANK_MASK | IXDP2X01_CPLD_FLASH_INTERN));
        
        ixdp2x01_flash_data.nr_banks =

diff --git a/arch/arm/mach-ixp2000/pci.c b/arch/arm/mach-ixp2000/pci.c
index 522205a..d4bf1e1 100644 (file)
--- a/arch/arm/mach-ixp2000/pci.c
+++ b/arch/arm/mach-ixp2000/pci.c
@@ -148,7 +148,7 @@ int ixp2000_pci_abort_handler(unsigned long addr, unsigned int fsr, struct pt_re
        local_irq_save(flags);
        temp = *(IXP2000_PCI_CONTROL);
        if (temp & ((1 << 8) | (1 << 5))) {
-               ixp2000_reg_write(IXP2000_PCI_CONTROL, temp);
+               ixp2000_reg_wrb(IXP2000_PCI_CONTROL, temp);
        }
 
        temp = *(IXP2000_PCI_CMDSTAT);
@@ -178,8 +178,8 @@ clear_master_aborts(void)
 
        local_irq_save(flags);
        temp = *(IXP2000_PCI_CONTROL);
-       if (temp & ((1 << 8) | (1 << 5))) {     
-               ixp2000_reg_write(IXP2000_PCI_CONTROL, temp);
+       if (temp & ((1 << 8) | (1 << 5))) {
+               ixp2000_reg_wrb(IXP2000_PCI_CONTROL, temp);
        }
 
        temp = *(IXP2000_PCI_CMDSTAT);

diff --git a/include/asm-arm/arch-ixp2000/system.h b/include/asm-arm/arch-ixp2000/system.h
index d9d6d9d..ddbbb34 100644 (file)
--- a/include/asm-arm/arch-ixp2000/system.h
+++ b/include/asm-arm/arch-ixp2000/system.h
@@ -26,23 +26,24 @@ static inline void arch_reset(char mode)
         * RedBoot bank.
         */
        if (machine_is_ixdp2401()) {
-               *IXDP2X01_CPLD_FLASH_REG = ((0 >> IXDP2X01_FLASH_WINDOW_BITS)
-                                               | IXDP2X01_CPLD_FLASH_INTERN);
-               *IXDP2X01_CPLD_RESET_REG = 0xffffffff;
+               ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG,
+                                       ((0 >> IXDP2X01_FLASH_WINDOW_BITS)
+                                               | IXDP2X01_CPLD_FLASH_INTERN));
+               ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0xffffffff);
        }
 
        /*
         * On IXDP2801 we need to write this magic sequence to the CPLD
         * to cause a complete reset of the CPU and all external devices
-        * and moves the flash bank register back to 0.
+        * and move the flash bank register back to 0.
         */
        if (machine_is_ixdp2801()) {
                unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG;
+
                reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF);
-               *IXDP2X01_CPLD_RESET_REG = reset_reg;
-               mb();
-               *IXDP2X01_CPLD_RESET_REG = 0x80000000;
+               ixp2000_reg_write(IXDP2X01_CPLD_RESET_REG, reset_reg);
+               ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0x80000000);
        }
 
-       *IXP2000_RESET0 = RSTALL;
+       ixp2000_reg_wrb(IXP2000_RESET0, RSTALL);
 }