[ARM] 4904/1: [AT91] Pass ECC controller to NAND driver

On AT91 processors that include an ECC controller, pass its base
address to the NAND driver via platform_device resources.

Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
index 0c341a4..10f15f3 100644 (file)
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ b/arch/arm/mach-at91/at91cap9_devices.c
@@ -283,10 +283,15 @@ static struct at91_nand_data nand_data;
 #define NAND_BASE      AT91_CHIPSELECT_3
 
 static struct resource nand_resources[] = {
-       {
+       [0] = {
                .start  = NAND_BASE,
                .end    = NAND_BASE + SZ_256M - 1,
                .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = AT91_BASE_SYS + AT91_ECC,
+               .end    = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
+               .flags  = IORESOURCE_MEM,
        }
 };
 

diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index b758e66..d613761 100644 (file)
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -288,10 +288,15 @@ static struct at91_nand_data nand_data;
 #define NAND_BASE      AT91_CHIPSELECT_3
 
 static struct resource nand_resources[] = {
-       {
+       [0] = {
                .start  = NAND_BASE,
                .end    = NAND_BASE + SZ_256M - 1,
                .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = AT91_BASE_SYS + AT91_ECC,
+               .end    = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
+               .flags  = IORESOURCE_MEM,
        }
 };
 

diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index fc14af8..64aab9c 100644 (file)
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -358,10 +358,15 @@ static struct at91_nand_data nand_data;
 #define NAND_BASE      AT91_CHIPSELECT_3
 
 static struct resource nand_resources[] = {
-       {
+       [0] = {
                .start  = NAND_BASE,
                .end    = NAND_BASE + SZ_256M - 1,
                .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = AT91_BASE_SYS + AT91_ECC0,
+               .end    = AT91_BASE_SYS + AT91_ECC0 + SZ_512 - 1,
+               .flags  = IORESOURCE_MEM,
        }
 };
 

diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index fb74b33..2a0abd2 100644 (file)
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -105,10 +105,15 @@ static struct at91_nand_data nand_data;
 #define NAND_BASE      AT91_CHIPSELECT_3
 
 static struct resource nand_resources[] = {
-       {
+       [0] = {
                .start  = NAND_BASE,
                .end    = NAND_BASE + SZ_256M - 1,
                .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = AT91_BASE_SYS + AT91_ECC,
+               .end    = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
+               .flags  = IORESOURCE_MEM,
        }
 };
 

diff --git a/include/asm-arm/arch-at91/at91_ecc.h b/include/asm-arm/arch-at91/at91_ecc.h
index ff93df5..1e5a8ca 100644 (file)
--- a/include/asm-arm/arch-at91/at91_ecc.h
+++ b/include/asm-arm/arch-at91/at91_ecc.h
@@ -13,26 +13,26 @@
 #ifndef AT91_ECC_H
 #define AT91_ECC_H
 
-#define AT91_ECC_CR            (AT91_ECC + 0x00)       /* Control register */
+#define AT91_ECC_CR            0x00                    /* Control register */
 #define                AT91_ECC_RST            (1 << 0)                /* Reset parity */
 
-#define AT91_ECC_MR            (AT91_ECC + 0x04)       /* Mode register */
+#define AT91_ECC_MR            0x04                    /* Mode register */
 #define                AT91_ECC_PAGESIZE       (3 << 0)                /* Page Size */
 #define                        AT91_ECC_PAGESIZE_528           (0)
 #define                        AT91_ECC_PAGESIZE_1056          (1)
 #define                        AT91_ECC_PAGESIZE_2112          (2)
 #define                        AT91_ECC_PAGESIZE_4224          (3)
 
-#define AT91_ECC_SR            (AT91_ECC + 0x08)       /* Status register */
+#define AT91_ECC_SR            0x08                    /* Status register */
 #define                AT91_ECC_RECERR         (1 << 0)                /* Recoverable Error */
 #define                AT91_ECC_ECCERR         (1 << 1)                /* ECC Single Bit Error */
 #define                AT91_ECC_MULERR         (1 << 2)                /* Multiple Errors */
 
-#define AT91_ECC_PR            (AT91_ECC + 0x0c)       /* Parity register */
+#define AT91_ECC_PR            0x0c                    /* Parity register */
 #define                AT91_ECC_BITADDR        (0xf << 0)              /* Bit Error Address */
 #define                AT91_ECC_WORDADDR       (0xfff << 4)            /* Word Error Address */
 
-#define AT91_ECC_NPR           (AT91_ECC + 0x10)       /* NParity register */
+#define AT91_ECC_NPR           0x10                    /* NParity register */
 #define                AT91_ECC_NPARITY        (0xffff << 0)           /* NParity */
 
 #endif