sh: intc - remove redundant irq code for sh03, snapgear and titan

This patch removes redundant board specific interrupt code for boards
using sh775x processors and 4 IRQ lines in "Individual Interrupt Mode"
aka IRLM.

Three boards are affected: sh03, snapgear and titan.

The right way to do this is to use cpu specific code provided by intc.
A nice side effect is that sh03 now compiles, board not BROKEN any more.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index ceceb05..6553325 100644 (file)
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -308,7 +308,7 @@ config SH_MPC1211
 
 config SH_SH03
        bool "Interface CTP/PCI-SH03"
-       depends on CPU_SUBTYPE_SH7751 && BROKEN
+       depends on CPU_SUBTYPE_SH7751
        select CPU_HAS_IPR_IRQ
        select SYS_SUPPORTS_PCI
        help

diff --git a/arch/sh/boards/sh03/setup.c b/arch/sh/boards/sh03/setup.c
index 9c031a8..df96312 100644 (file)
--- a/arch/sh/boards/sh03/setup.c
+++ b/arch/sh/boards/sh03/setup.c
@@ -15,33 +15,9 @@
 #include <asm/sh03/sh03.h>
 #include <asm/addrspace.h>
 
-static struct ipr_data ipr_irq_table[] = {
-       { IRL0_IRQ, 0, IRL0_IPR_POS, IRL0_PRIORITY },
-       { IRL1_IRQ, 0, IRL1_IPR_POS, IRL1_PRIORITY },
-       { IRL2_IRQ, 0, IRL2_IPR_POS, IRL2_PRIORITY },
-       { IRL3_IRQ, 0, IRL3_IPR_POS, IRL3_PRIORITY },
-};
-
-static unsigned long ipr_offsets[] = {
-       INTC_IPRD,
-};
-
-static struct ipr_desc ipr_irq_desc = {
-       .ipr_offsets    = ipr_offsets,
-       .nr_offsets     = ARRAY_SIZE(ipr_offsets),
-
-       .ipr_data       = ipr_irq_table,
-       .nr_irqs        = ARRAY_SIZE(ipr_irq_table),
-
-       .chip = {
-               .name   = "IPR-sh03",
-       },
-};
-
 static void __init init_sh03_IRQ(void)
 {
-       ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
-       register_ipr_controller(&ipr_irq_desc);
+       plat_irq_setup_pins(IRQ_MODE_IRQ);
 }
 
 extern void *cf_io_base;

diff --git a/arch/sh/boards/snapgear/setup.c b/arch/sh/boards/snapgear/setup.c
index 84271d8..2b594f6 100644 (file)
--- a/arch/sh/boards/snapgear/setup.c
+++ b/arch/sh/boards/snapgear/setup.c
@@ -68,37 +68,11 @@ module_init(eraseconfig_init);
  * IRL3 = crypto
  */
 
-static struct ipr_data ipr_irq_table[] = {
-       { IRL0_IRQ, 0, IRL0_IPR_POS, IRL0_PRIORITY },
-       { IRL1_IRQ, 0, IRL1_IPR_POS, IRL1_PRIORITY },
-       { IRL2_IRQ, 0, IRL2_IPR_POS, IRL2_PRIORITY },
-       { IRL3_IRQ, 0, IRL3_IPR_POS, IRL3_PRIORITY },
-};
-
-static unsigned long ipr_offsets[] = {
-       INTC_IPRD,
-};
-
-static struct ipr_desc ipr_irq_desc = {
-       .ipr_offsets    = ipr_offsets,
-       .nr_offsets     = ARRAY_SIZE(ipr_offsets),
-
-       .ipr_data       = ipr_irq_table,
-       .nr_irqs        = ARRAY_SIZE(ipr_irq_table),
-
-       .chip = {
-               .name   = "IPR-snapgear",
-       },
-};
-
 static void __init init_snapgear_IRQ(void)
 {
-       /* enable individual interrupt mode for externals */
-       ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
-
        printk("Setup SnapGear IRQ/IPR ...\n");
-
-       register_ipr_controller(&ipr_irq_desc);
+       /* enable individual interrupt mode for externals */
+       plat_irq_setup_pins(IRQ_MODE_IRQ);
 }
 
 /*

diff --git a/arch/sh/boards/titan/setup.c b/arch/sh/boards/titan/setup.c
index 606d25a..5de3b2a 100644 (file)
--- a/arch/sh/boards/titan/setup.c
+++ b/arch/sh/boards/titan/setup.c
@@ -12,38 +12,10 @@
 #include <asm/titan.h>
 #include <asm/io.h>
 
-static struct ipr_data ipr_irq_table[] = {
-       /* IRQ, IPR idx, shift, prio */
-       { TITAN_IRQ_WAN,   3, 12, 8 },  /* eth0 (WAN) */
-       { TITAN_IRQ_LAN,   3,  8, 8 },  /* eth1 (LAN) */
-       { TITAN_IRQ_MPCIA, 3,  4, 8 },  /* mPCI A (top) */
-       { TITAN_IRQ_USB,   3,  0, 8 },  /* mPCI B (bottom), USB */
-};
-
-static unsigned long ipr_offsets[] = { /* stolen from setup-sh7750.c */
-       0xffd00004UL,   /* 0: IPRA */
-       0xffd00008UL,   /* 1: IPRB */
-       0xffd0000cUL,   /* 2: IPRC */
-       0xffd00010UL,   /* 3: IPRD */
-};
-
-static struct ipr_desc ipr_irq_desc = {
-       .ipr_offsets    = ipr_offsets,
-       .nr_offsets     = ARRAY_SIZE(ipr_offsets),
-
-       .ipr_data       = ipr_irq_table,
-       .nr_irqs        = ARRAY_SIZE(ipr_irq_table),
-
-       .chip = {
-               .name   = "IPR-titan",
-       },
-};
 static void __init init_titan_irq(void)
 {
        /* enable individual interrupt mode for externals */
-       ipr_irq_enable_irlm();
-       /* register ipr irqs */
-       register_ipr_controller(&ipr_irq_desc);
+       plat_irq_setup_pins(IRQ_MODE_IRQ);
 }
 
 static struct sh_machine_vector mv_titan __initmv = {

diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index f2286de..e313be2 100644 (file)
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -282,13 +282,19 @@ void __init plat_irq_setup(void)
 #define INTC_ICR       0xffd00000UL
 #define INTC_ICR_IRLM   (1<<7)
 
-/* enable individual interrupt mode for external interupts */
-void __init ipr_irq_enable_irlm(void)
+void __init plat_irq_setup_pins(int mode)
 {
 #if defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7091)
        BUG(); /* impossible to mask interrupts on SH7750 and SH7091 */
+       return;
 #endif
-       register_intc_controller(&intc_desc_irlm);
 
-       ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
+       switch (mode) {
+       case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */
+               ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
+               register_intc_controller(&intc_desc_irlm);
+               break;
+       default:
+               BUG();
+       }
 }

diff --git a/include/asm-sh/hw_irq.h b/include/asm-sh/hw_irq.h
index 921ddec..8f5bf98 100644 (file)
--- a/include/asm-sh/hw_irq.h
+++ b/include/asm-sh/hw_irq.h
@@ -41,11 +41,6 @@ struct ipr_desc {
 
 void register_ipr_controller(struct ipr_desc *);
 
-/*
- * Enable individual interrupt mode for external IPR IRQs.
- */
-void __init ipr_irq_enable_irlm(void);
-
 typedef unsigned char intc_enum;
 
 struct intc_vect {

diff --git a/include/asm-sh/sh03/io.h b/include/asm-sh/sh03/io.h
index 4ff1eb9..c39c785 100644 (file)
--- a/include/asm-sh/sh03/io.h
+++ b/include/asm-sh/sh03/io.h
@@ -11,22 +11,13 @@
 
 #include <linux/time.h>
 
-#define INTC_IPRD      0xffd00010UL
-
 #define IRL0_IRQ       2
-#define IRL0_IPR_POS   3
 #define IRL0_PRIORITY  13
-
 #define IRL1_IRQ       5
-#define IRL1_IPR_POS   2
 #define IRL1_PRIORITY  10
-
 #define IRL2_IRQ       8
-#define IRL2_IPR_POS   1
 #define IRL2_PRIORITY  7
-
 #define IRL3_IRQ       11
-#define IRL3_IPR_POS   0
 #define IRL3_PRIORITY  4
 
 void heartbeat_sh03(void);

diff --git a/include/asm-sh/snapgear.h b/include/asm-sh/snapgear.h
index 3554e3a..042d95f 100644 (file)
--- a/include/asm-sh/snapgear.h
+++ b/include/asm-sh/snapgear.h
@@ -19,20 +19,16 @@
  * is the interrupt :-)
  */
 
-#define IRL0_IRQ               2
-#define IRL0_IPR_POS   3
+#define IRL0_IRQ       2
 #define IRL0_PRIORITY  13
 
-#define IRL1_IRQ               5
-#define IRL1_IPR_POS   2
+#define IRL1_IRQ       5
 #define IRL1_PRIORITY  10
 
-#define IRL2_IRQ               8
-#define IRL2_IPR_POS   1
+#define IRL2_IRQ       8
 #define IRL2_PRIORITY  7
 
-#define IRL3_IRQ               11
-#define IRL3_IPR_POS   0
+#define IRL3_IRQ       11
 #define IRL3_PRIORITY  4
 #endif