sh: More tidying for large base pages.

There were a few more things that needed fixing up, namely THREAD_SIZE
and the TLB miss handler where certain PTRS_PER_PGD == PTRS_PER_PTE
assumptions were being made.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 4f38912..04cbc88 100644 (file)
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -596,6 +596,8 @@ menu "Boot options"
 config ZERO_PAGE_OFFSET
        hex "Zero page offset"
        default "0x00004000" if SH_MPC1211 || SH_SH03
+       default "0x00010000" if PAGE_SIZE_64KB
+       default "0x00002000" if PAGE_SIZE_8KB
        default "0x00001000"
        help
          This sets the default offset of zero page.

diff --git a/arch/sh/kernel/cpu/sh3/entry.S b/arch/sh/kernel/cpu/sh3/entry.S
index 014ac37..1c52035 100644 (file)
--- a/arch/sh/kernel/cpu/sh3/entry.S
+++ b/arch/sh/kernel/cpu/sh3/entry.S
@@ -332,12 +332,6 @@ general_exception:
 !
 !
 
-/* This code makes some assumptions to improve performance.
- * Make sure they are stil true. */
-#if PTRS_PER_PGD != PTRS_PER_PTE
-#error PGD and PTE sizes don't match
-#endif
-
 /* gas doesn't flag impossible values for mov #immediate as an error */
 #if (_PAGE_PRESENT >> 2) > 0x7f
 #error cannot load PAGE_PRESENT as an immediate
@@ -399,6 +393,7 @@ tlb_miss:
 
        bt      20f                     ! 110 BR
 
+       mov.w   3f, k3                  !  8 LS (latency=2)     (PTRS_PER_PTE-1) << 2
        and     k3, k0                  !  78 EX
        mov.w   5f, k4                  !   8 LS (latency=2)    _PAGE_PRESENT
 
@@ -491,8 +486,9 @@ tlb_miss:
        .align 5
        ! Once cache line if possible...
 1:     .long   swapper_pg_dir
+3:     .short  (PTRS_PER_PTE-1) << 2
 4:     .short  (PTRS_PER_PGD-1) << 2
-5:     .short  _PAGE_PRESENT
+5:     .long   _PAGE_PRESENT
 7:     .long   _PAGE_FLAGS_HARDWARE_MASK
 8:     .long   MMU_PTEH
 #ifdef COUNT_EXCEPTIONS

diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h
index 036ca28..eba1418 100644 (file)
--- a/include/asm-sh/pgtable.h
+++ b/include/asm-sh/pgtable.h
@@ -47,13 +47,13 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
 #define PGDIR_MASK     (~(PGDIR_SIZE-1))
 
 /* Entries per level */
-#define PTRS_PER_PTE   (PAGE_SIZE / 4)
+#define PTRS_PER_PTE   (PAGE_SIZE / (1 << PTE_MAGNITUDE))
 #define PTRS_PER_PGD   (PAGE_SIZE / 4)
 
 #define USER_PTRS_PER_PGD      (TASK_SIZE/PGDIR_SIZE)
 #define FIRST_USER_ADDRESS     0
 
-#define PTE_PHYS_MASK  0x1ffff000
+#define PTE_PHYS_MASK          (0x20000000 - PAGE_SIZE)
 
 /*
  * First 1MB map is used by fixed purpose.

diff --git a/include/asm-sh/thread_info.h b/include/asm-sh/thread_info.h
index 879f741..279e70a 100644 (file)
--- a/include/asm-sh/thread_info.h
+++ b/include/asm-sh/thread_info.h
@@ -32,12 +32,20 @@ struct thread_info {
 
 #define PREEMPT_ACTIVE         0x10000000
 
-#ifdef CONFIG_4KSTACKS
-#define THREAD_SIZE            (PAGE_SIZE)
+#if defined(CONFIG_4KSTACKS)
+#define THREAD_SIZE_ORDER      (0)
+#elif defined(CONFIG_PAGE_SIZE_4KB)
+#define THREAD_SIZE_ORDER      (1)
+#elif defined(CONFIG_PAGE_SIZE_8KB)
+#define THREAD_SIZE_ORDER      (1)
+#elif defined(CONFIG_PAGE_SIZE_64KB)
+#define THREAD_SIZE_ORDER      (0)
 #else
-#define THREAD_SIZE            (PAGE_SIZE * 2)
+#error "Unknown thread size"
 #endif
-#define STACK_WARN             (THREAD_SIZE / 8)
+
+#define THREAD_SIZE    (PAGE_SIZE << THREAD_SIZE_ORDER)
+#define STACK_WARN     (THREAD_SIZE >> 3)
 
 /*
  * macros/functions for gaining access to the thread information structure