sh: Enable skipping of bss on debug platforms for sh32 also.

This enables the same functionality that sh64 has for sh32. When running
on simulated hardware or via remote memory via the debug interface,
memory is gauranteed to be zero on boot already, and skipping the zeroing
of BSS has measurable boot time benefits.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug
index 834a2d2..eef2fa9 100644 (file)
--- a/arch/sh/Kconfig.debug
+++ b/arch/sh/Kconfig.debug
@@ -98,6 +98,18 @@ config IRQSTACKS
          for handling hard and soft interrupts.  This can help avoid
          overflowing the process kernel stacks.
 
+config SH_NO_BSS_INIT
+       bool "Avoid zeroing BSS (to speed-up startup on suitable platforms)"
+       depends on DEBUG_KERNEL
+       default n
+       help
+         If running in painfully slow environments, such as an RTL
+         simulation or from remote memory via SHdebug, where the memory
+         can already be gauranteed to ber zeroed on boot, say Y.
+
+         For all other cases, say N. If this option seems perplexing, or
+         you aren't sure, say N.
+
 config MORE_COMPILE_OPTIONS
        bool "Add any additional compile options"
        help
@@ -125,9 +137,6 @@ config SH_ALPHANUMERIC
        bool "Enable debug outputs to on-board alphanumeric display"
        depends on SH_CAYMAN
 
-config SH_NO_BSS_INIT
-       bool "Avoid zeroing BSS (to speed-up startup on suitable platforms)"
-
 endif
 
 endmenu

diff --git a/arch/sh/kernel/head_32.S b/arch/sh/kernel/head_32.S
index ae0a382..788605f 100644 (file)
--- a/arch/sh/kernel/head_32.S
+++ b/arch/sh/kernel/head_32.S
@@ -80,8 +80,14 @@ ENTRY(_stext)
        mov.l   7f, r0
        ldc     r0, r7_bank     ! ... and initial thread_info
 #endif
-       
-       !                       Clear BSS area
+
+#ifndef CONFIG_SH_NO_BSS_INIT
+       /*
+        * Don't clear BSS if running on slow platforms such as an RTL simulation,
+        * remote memory via SHdebug link, etc.  For these the memory can be guaranteed
+        * to be all zero on boot anyway.
+        */
+                               ! Clear BSS area
 #ifdef CONFIG_SMP      
        mov.l   3f, r0
        cmp/eq  #0, r0          ! skip clear if set to zero
@@ -97,6 +103,8 @@ ENTRY(_stext)
         mov.l  r0,@-r2
 
 10:            
+#endif
+
        !                       Additional CPU initialization
        mov.l   6f, r0
        jsr     @r0