sh: pci: Kill off platform-specific multi-window mappings.
authorPaul Mundt <lethal@linux-sh.org>
Fri, 17 Apr 2009 08:21:36 +0000 (17:21 +0900)
committerPaul Mundt <lethal@linux-sh.org>
Fri, 17 Apr 2009 08:21:36 +0000 (17:21 +0900)
Commit 68b42d1b548be1840aff7122fdebeb804daf0fa3 ("sh: sh7785lcr: Map
whole PCI address space.") changed around the semantics of how various
chip-selects are made accessible to PCI. Now that there is a single
large mapping covering from CS0-CS6, there is no longer any need to
do multi-window mapping. Subsequently, all of the differing
implementations can be consolidated in to pci-sh7780.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
arch/sh/boards/mach-se/7780/irq.c
arch/sh/drivers/pci/ops-r7780rp.c
arch/sh/drivers/pci/ops-sdk7780.c
arch/sh/drivers/pci/ops-se7780.c
arch/sh/drivers/pci/ops-sh7785lcr.c
arch/sh/drivers/pci/pci-sh7780.c
arch/sh/drivers/pci/pci-sh7780.h

index 44b61a5..b8d43b6 100644 (file)
@@ -49,4 +49,21 @@ void __init init_se7780_IRQ(void)
 
        /* ICR1: detect low level(for 2ndcut) */
        ctrl_outl(0xAAAA0000, INTC_ICR1);
+
+       /*
+        * FPGA PCISEL register initialize
+        *
+        *  CPU  || SLOT1 | SLOT2 | S-ATA | USB
+        *  -------------------------------------
+        *  INTA || INTA  | INTD  |  --   | INTB
+        *  -------------------------------------
+        *  INTB || INTB  | INTA  |  --   | INTC
+        *  -------------------------------------
+        *  INTC || INTC  | INTB  | INTA  |  --
+        *  -------------------------------------
+        *  INTD || INTD  | INTC  |  --   | INTA
+        *  -------------------------------------
+        */
+       ctrl_outw(0x0013, FPGA_PCI_INTSEL1);
+       ctrl_outw(0xE402, FPGA_PCI_INTSEL2);
 }
index 044525d..4ea136e 100644 (file)
@@ -25,20 +25,3 @@ int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
 {
        return irq_tab[slot];
 }
-
-static struct sh4_pci_address_map sh7780_pci_map = {
-       .window0        = {
-               .base   = SH7780_CS2_BASE_ADDR,
-               .size   = 0x04000000,
-       },
-
-       .window1        = {
-               .base   = SH7780_CS3_BASE_ADDR,
-               .size   = 0x04000000,
-       },
-};
-
-int __init pcibios_init_platform(void)
-{
-       return sh7780_pcic_init(&sh7780_pci_map);
-}
index 570fd71..1d9a91b 100644 (file)
@@ -33,20 +33,3 @@ int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
 {
        return sdk7780_irq_tab[pin-1][slot];
 }
-
-static struct sh4_pci_address_map sdk7780_pci_map = {
-       .window0        = {
-               .base   = SH7780_CS2_BASE_ADDR,
-               .size   = 0x04000000,
-       },
-       .window1        = {
-               .base   = SH7780_CS3_BASE_ADDR,
-               .size   = 0x04000000,
-       },
-};
-
-int __init pcibios_init_platform(void)
-{
-       printk(KERN_INFO "SH7780 PCI: Finished initializing PCI controller\n");
-       return sh7780_pcic_init(&sdk7780_pci_map);
-}
index 8b09415..6c088cc 100644 (file)
@@ -40,34 +40,3 @@ int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
 {
        return se7780_irq_tab[pin-1][slot];
 }
-
-static struct sh4_pci_address_map se7780_pci_map = {
-       .window0        = {
-               .base   = SH7780_CS2_BASE_ADDR,
-               .size   = 0x04000000,
-       },
-};
-
-int __init pcibios_init_platform(void)
-{
-       printk("SH7780 PCI: Finished initialization of the PCI controller\n");
-
-       /*
-        * FPGA PCISEL register initialize
-        *
-        *  CPU  || SLOT1 | SLOT2 | S-ATA | USB
-        *  -------------------------------------
-        *  INTA || INTA  | INTD  |  --   | INTB
-        *  -------------------------------------
-        *  INTB || INTB  | INTA  |  --   | INTC
-        *  -------------------------------------
-        *  INTC || INTC  | INTB  | INTA  |  --
-        *  -------------------------------------
-        *  INTD || INTD  | INTC  |  --   | INTA
-        *  -------------------------------------
-        */
-       ctrl_outw(0x0013, FPGA_PCI_INTSEL1);
-       ctrl_outw(0xE402, FPGA_PCI_INTSEL2);
-
-       return sh7780_pcic_init(&se7780_pci_map);
-}
index bac46b5..0fe423e 100644 (file)
@@ -25,20 +25,3 @@ int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
 {
        return irq_tab[slot];
 }
-
-static struct sh4_pci_address_map sh7785_pci_map = {
-       .window0        = {
-#if defined(CONFIG_32BIT)
-               .base   = SH7780_32BIT_DDR_BASE_ADDR,
-               .size   = 0x40000000,
-#else
-               .base   = SH7780_CS0_BASE_ADDR,
-               .size   = 0x20000000,
-#endif
-       },
-};
-
-int __init pcibios_init_platform(void)
-{
-       return sh7780_pcic_init(&sh7785_pci_map);
-}
index eb217dd..07c5529 100644 (file)
@@ -90,7 +90,19 @@ struct pci_channel board_pci_channels[] = {
        { NULL, NULL, NULL, 0, 0 },
 };
 
-int __init sh7780_pcic_init(struct sh4_pci_address_map *map)
+static struct sh4_pci_address_map sh7780_pci_map = {
+       .window0        = {
+#if defined(CONFIG_32BIT)
+               .base   = SH7780_32BIT_DDR_BASE_ADDR,
+               .size   = 0x40000000,
+#else
+               .base   = SH7780_CS0_BASE_ADDR,
+               .size   = 0x20000000,
+#endif
+       },
+};
+
+int __init pcibios_init_platform(void)
 {
        struct pci_channel *chan = &board_pci_channels[0];
        u32 word;
@@ -114,14 +126,10 @@ int __init sh7780_pcic_init(struct sh4_pci_address_map *map)
        /* Set IO and Mem windows to local address
         * Make PCI and local address the same for easy 1 to 1 mapping
         */
-       pci_write_reg(chan, map->window0.size - 0xfffff, SH4_PCILSR0);
-       pci_write_reg(chan, map->window1.size - 0xfffff, SH4_PCILSR1);
+       pci_write_reg(chan, sh7780_pci_map.window0.size - 0xfffff, SH4_PCILSR0);
        /* Set the values on window 0 PCI config registers */
-       pci_write_reg(chan, map->window0.base, SH4_PCILAR0);
-       pci_write_reg(chan, map->window0.base, SH7780_PCIMBAR0);
-       /* Set the values on window 1 PCI config registers */
-       pci_write_reg(chan, map->window1.base, SH4_PCILAR1);
-       pci_write_reg(chan, map->window1.base, SH7780_PCIMBAR1);
+       pci_write_reg(chan, sh7780_pci_map.window0.base, SH4_PCILAR0);
+       pci_write_reg(chan, sh7780_pci_map.window0.base, SH7780_PCIMBAR0);
 
        /* Apply any last-minute PCIC fixups */
        pci_fixup_pcic(chan);
index 7a4f8a8..4b65d4b 100644 (file)
 
 #define SH7780_32BIT_DDR_BASE_ADDR     0x40000000
 
-struct sh4_pci_address_map;
-
-/* arch/sh/drivers/pci/pci-sh7780.c */
-int sh7780_pcic_init(struct sh4_pci_address_map *map);
-
 #endif /* _PCI_SH7780_H_ */