I can't explain this, except that it makes my display correct.
Signed-off-by: Eric Anholt <eric@anholt.net>
intel_wait_for_vblank(dev);
intel_wait_for_vblank(dev);
- if (HAS_PCH_SPLIT(dev)) {
+ if (IS_IRONLAKE(dev)) {
/* enable address swizzle for tiling buffer */
temp = I915_READ(DISP_ARB_CTL);
I915_WRITE(DISP_ARB_CTL, temp | DISP_TILE_SURFACE_SWIZZLING);
/* enable address swizzle for tiling buffer */
temp = I915_READ(DISP_ARB_CTL);
I915_WRITE(DISP_ARB_CTL, temp | DISP_TILE_SURFACE_SWIZZLING);