documentation: move mtrr.txt to Doc/x86/ subdir

Move mtrr.txt to the Documentation/x86/ subdirectory.
Add 00-INDEX to the Documentation/x86/ subdirectory.

Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com>
Cc: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

diff --git a/Documentation/00-INDEX b/Documentation/00-INDEX
index 1977fab..661b6cc 100644 (file)
--- a/Documentation/00-INDEX
+++ b/Documentation/00-INDEX
@@ -253,8 +253,6 @@ mono.txt
        - how to execute Mono-based .NET binaries with the help of BINFMT_MISC.
 moxa-smartio
        - file with info on installing/using Moxa multiport serial driver.
        - how to execute Mono-based .NET binaries with the help of BINFMT_MISC.
 moxa-smartio
        - file with info on installing/using Moxa multiport serial driver.

-mtrr.txt
-       - how to use PPro Memory Type Range Registers to increase performance.

 mutex-design.txt
        - info on the generic mutex subsystem.
 namespaces/
 mutex-design.txt
        - info on the generic mutex subsystem.
 namespaces/

diff --git a/Documentation/x86/00-INDEX b/Documentation/x86/00-INDEX
new file mode 100644 (file)
index 0000000..dbe3377
--- /dev/null
+++ b/Documentation/x86/00-INDEX
@@ -0,0 +1,4 @@
+00-INDEX
+       - this file
+mtrr.txt
+       - how to use x86 Memory Type Range Registers to increase performance

diff --git a/Documentation/mtrr.txt b/Documentation/x86/mtrr.txt
similarity index 99%
rename from Documentation/mtrr.txt
rename to Documentation/x86/mtrr.txt
index c39ac39..cc071dc 100644 (file)
--- a/Documentation/mtrr.txt
+++ b/Documentation/x86/mtrr.txt
@@ -18,7 +18,7 @@ Richard Gooch
   The AMD K6-2 (stepping 8 and above) and K6-3 processors have two
   MTRRs. These are supported.  The AMD Athlon family provide 8 Intel
   style MTRRs.
   The AMD K6-2 (stepping 8 and above) and K6-3 processors have two
   MTRRs. These are supported.  The AMD Athlon family provide 8 Intel
   style MTRRs.

-  
+

   The Centaur C6 (WinChip) has 8 MCRs, allowing write-combining. These
   are supported.
 
   The Centaur C6 (WinChip) has 8 MCRs, allowing write-combining. These
   are supported.
 


@@ -87,7 +87,7 @@ reg00: base=0x00000000 (   0MB), size=  64MB: write-back, count=1
 reg01: base=0xfb000000 (4016MB), size=  16MB: write-combining, count=1
 reg02: base=0xfb000000 (4016MB), size=   4kB: uncachable, count=1
 
 reg01: base=0xfb000000 (4016MB), size=  16MB: write-combining, count=1
 reg02: base=0xfb000000 (4016MB), size=   4kB: uncachable, count=1
 

-Some cards (especially Voodoo Graphics boards) need this 4 kB area 
+Some cards (especially Voodoo Graphics boards) need this 4 kB area

 excluded from the beginning of the region because it is used for
 registers.
 
 excluded from the beginning of the region because it is used for
 registers.
 

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 03980cb..06f9354 100644 (file)
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1131,7 +1131,7 @@ config MTRR
          You can safely say Y even if your machine doesn't have MTRRs, you'll
          just add about 9 KB to your kernel.
 
          You can safely say Y even if your machine doesn't have MTRRs, you'll
          just add about 9 KB to your kernel.
 

-         See <file:Documentation/mtrr.txt> for more information.
+         See <file:Documentation/x86/mtrr.txt> for more information.

 
 config MTRR_SANITIZER
        bool
 
 config MTRR_SANITIZER
        bool