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(parent: d75d9e7) | patch
OMAP3 SRAM: clear the SDRC PWRENA bit during SDRC frequency change
authorPaul Walmsley <paul@pwsan.com>
Tue, 12 May 2009 23:27:09 +0000 (17:27 -0600)
committerpaul <paul@twilight.(none)>
Tue, 12 May 2009 23:27:09 +0000 (17:27 -0600)
commitfa0406a8d8c3a4a302085ccd031d999161405f70
treebc37051ba47599b871a0f438070821f8c4bbf0eatree | snapshot
parentd75d9e73cd59127a4d926a2bf5e9cdcc90f033d6commit | diff
OMAP3 SRAM: clear the SDRC PWRENA bit during SDRC frequency change

Clear the SDRC_POWER.PWRENA bit before putting the SDRAM into self-refresh
mode.  This prevents the SDRC from attempting to power off the SDRAM,
which can cause the system to hang.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
arch/arm/mach-omap2/sram34xx.S diff | blob | history
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