x86: align per-cpu section to configured cache bytes
authorZach Brown <zach.brown@oracle.com>
Fri, 27 Jan 2006 22:02:47 +0000 (14:02 -0800)
committerSam Ravnborg <sam@mars.ravnborg.org>
Sun, 19 Feb 2006 08:51:19 +0000 (09:51 +0100)
commit379b5441aeb895fe55b877a8a9c187e8728f774c
tree67916a0f7d8a9a7d1ce186c81ac4f4481e6cc23e
parent8e70c45887a6bbe40393342ea5b426b0dd836dff
x86: align per-cpu section to configured cache bytes

This matches the fix for a bug seen on x86-64.  Test booted on old hardware
that had 32 byte cachelines to begin with.

Signed-off-by: Zach Brown <zach.brown@oracle.com>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
arch/i386/kernel/vmlinux.lds.S