X-Git-Url: http://ftp.safe.ca/?a=blobdiff_plain;f=lib%2Fiomap.c;h=d32229385151657397709988acd392208c8d83f9;hb=b054b747a694927879c94dd11af54d04346aed7d;hp=5e74390852b0dfc1d7d48ef42158160f7ea9a89c;hpb=1da177e4c3f41524e886b7f1b8a0c1fc7321cac2;p=safe%2Fjmp%2Flinux-2.6 diff --git a/lib/iomap.c b/lib/iomap.c index 5e74390..d322293 100644 --- a/lib/iomap.c +++ b/lib/iomap.c @@ -4,8 +4,9 @@ * (C) Copyright 2004 Linus Torvalds */ #include +#include + #include -#include /* * Read/write from/to an (offsettable) iomem cookie. It might be a PIO @@ -34,53 +35,105 @@ #define PIO_RESERVED 0x40000UL #endif +static void bad_io_access(unsigned long port, const char *access) +{ + static int count = 10; + if (count) { + count--; + WARN(1, KERN_ERR "Bad IO access at port %#lx (%s)\n", port, access); + } +} + /* * Ugly macros are a way of life. */ -#define VERIFY_PIO(port) BUG_ON((port & ~PIO_MASK) != PIO_OFFSET) - #define IO_COND(addr, is_pio, is_mmio) do { \ unsigned long port = (unsigned long __force)addr; \ - if (port < PIO_RESERVED) { \ - VERIFY_PIO(port); \ + if (port >= PIO_RESERVED) { \ + is_mmio; \ + } else if (port > PIO_OFFSET) { \ port &= PIO_MASK; \ is_pio; \ - } else { \ - is_mmio; \ - } \ + } else \ + bad_io_access(port, #is_pio ); \ } while (0) -unsigned int fastcall ioread8(void __iomem *addr) +#ifndef pio_read16be +#define pio_read16be(port) swab16(inw(port)) +#define pio_read32be(port) swab32(inl(port)) +#endif + +#ifndef mmio_read16be +#define mmio_read16be(addr) be16_to_cpu(__raw_readw(addr)) +#define mmio_read32be(addr) be32_to_cpu(__raw_readl(addr)) +#endif + +unsigned int ioread8(void __iomem *addr) { IO_COND(addr, return inb(port), return readb(addr)); + return 0xff; } -unsigned int fastcall ioread16(void __iomem *addr) +unsigned int ioread16(void __iomem *addr) { IO_COND(addr, return inw(port), return readw(addr)); + return 0xffff; +} +unsigned int ioread16be(void __iomem *addr) +{ + IO_COND(addr, return pio_read16be(port), return mmio_read16be(addr)); + return 0xffff; } -unsigned int fastcall ioread32(void __iomem *addr) +unsigned int ioread32(void __iomem *addr) { IO_COND(addr, return inl(port), return readl(addr)); + return 0xffffffff; +} +unsigned int ioread32be(void __iomem *addr) +{ + IO_COND(addr, return pio_read32be(port), return mmio_read32be(addr)); + return 0xffffffff; } EXPORT_SYMBOL(ioread8); EXPORT_SYMBOL(ioread16); +EXPORT_SYMBOL(ioread16be); EXPORT_SYMBOL(ioread32); +EXPORT_SYMBOL(ioread32be); + +#ifndef pio_write16be +#define pio_write16be(val,port) outw(swab16(val),port) +#define pio_write32be(val,port) outl(swab32(val),port) +#endif -void fastcall iowrite8(u8 val, void __iomem *addr) +#ifndef mmio_write16be +#define mmio_write16be(val,port) __raw_writew(be16_to_cpu(val),port) +#define mmio_write32be(val,port) __raw_writel(be32_to_cpu(val),port) +#endif + +void iowrite8(u8 val, void __iomem *addr) { IO_COND(addr, outb(val,port), writeb(val, addr)); } -void fastcall iowrite16(u16 val, void __iomem *addr) +void iowrite16(u16 val, void __iomem *addr) { IO_COND(addr, outw(val,port), writew(val, addr)); } -void fastcall iowrite32(u32 val, void __iomem *addr) +void iowrite16be(u16 val, void __iomem *addr) +{ + IO_COND(addr, pio_write16be(val,port), mmio_write16be(val, addr)); +} +void iowrite32(u32 val, void __iomem *addr) { IO_COND(addr, outl(val,port), writel(val, addr)); } +void iowrite32be(u32 val, void __iomem *addr) +{ + IO_COND(addr, pio_write32be(val,port), mmio_write32be(val, addr)); +} EXPORT_SYMBOL(iowrite8); EXPORT_SYMBOL(iowrite16); +EXPORT_SYMBOL(iowrite16be); EXPORT_SYMBOL(iowrite32); +EXPORT_SYMBOL(iowrite32be); /* * These are the "repeat MMIO read/write" functions. @@ -88,6 +141,7 @@ EXPORT_SYMBOL(iowrite32); * convert to CPU byte order. We write in "IO byte * order" (we also don't have IO barriers). */ +#ifndef mmio_insb static inline void mmio_insb(void __iomem *addr, u8 *dst, int count) { while (--count >= 0) { @@ -112,7 +166,9 @@ static inline void mmio_insl(void __iomem *addr, u32 *dst, int count) dst++; } } +#endif +#ifndef mmio_outsb static inline void mmio_outsb(void __iomem *addr, const u8 *src, int count) { while (--count >= 0) { @@ -134,16 +190,17 @@ static inline void mmio_outsl(void __iomem *addr, const u32 *src, int count) src++; } } +#endif -void fastcall ioread8_rep(void __iomem *addr, void *dst, unsigned long count) +void ioread8_rep(void __iomem *addr, void *dst, unsigned long count) { IO_COND(addr, insb(port,dst,count), mmio_insb(addr, dst, count)); } -void fastcall ioread16_rep(void __iomem *addr, void *dst, unsigned long count) +void ioread16_rep(void __iomem *addr, void *dst, unsigned long count) { IO_COND(addr, insw(port,dst,count), mmio_insw(addr, dst, count)); } -void fastcall ioread32_rep(void __iomem *addr, void *dst, unsigned long count) +void ioread32_rep(void __iomem *addr, void *dst, unsigned long count) { IO_COND(addr, insl(port,dst,count), mmio_insl(addr, dst, count)); } @@ -151,15 +208,15 @@ EXPORT_SYMBOL(ioread8_rep); EXPORT_SYMBOL(ioread16_rep); EXPORT_SYMBOL(ioread32_rep); -void fastcall iowrite8_rep(void __iomem *addr, const void *src, unsigned long count) +void iowrite8_rep(void __iomem *addr, const void *src, unsigned long count) { IO_COND(addr, outsb(port, src, count), mmio_outsb(addr, src, count)); } -void fastcall iowrite16_rep(void __iomem *addr, const void *src, unsigned long count) +void iowrite16_rep(void __iomem *addr, const void *src, unsigned long count) { IO_COND(addr, outsw(port, src, count), mmio_outsw(addr, src, count)); } -void fastcall iowrite32_rep(void __iomem *addr, const void *src, unsigned long count) +void iowrite32_rep(void __iomem *addr, const void *src, unsigned long count) { IO_COND(addr, outsl(port, src,count), mmio_outsl(addr, src, count)); } @@ -182,11 +239,24 @@ void ioport_unmap(void __iomem *addr) EXPORT_SYMBOL(ioport_map); EXPORT_SYMBOL(ioport_unmap); -/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */ +/** + * pci_iomap - create a virtual mapping cookie for a PCI BAR + * @dev: PCI device that owns the BAR + * @bar: BAR number + * @maxlen: length of the memory to map + * + * Using this function you will get a __iomem address to your device BAR. + * You can access it using ioread*() and iowrite*(). These functions hide + * the details if this is a MMIO or PIO address space and will just do what + * you expect from them in the correct way. + * + * @maxlen specifies the maximum length to map. If you want to get access to + * the complete BAR without checking for its length first, pass %0 here. + * */ void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) { - unsigned long start = pci_resource_start(dev, bar); - unsigned long len = pci_resource_len(dev, bar); + resource_size_t start = pci_resource_start(dev, bar); + resource_size_t len = pci_resource_len(dev, bar); unsigned long flags = pci_resource_flags(dev, bar); if (!len || !start)