X-Git-Url: http://ftp.safe.ca/?a=blobdiff_plain;f=drivers%2Fserial%2Famba-pl010.c;h=58a4879c7e48806ade2ae0e3a48223c2a92e03f4;hb=f69fb9c39868463f6b0b8306824341bd5610250b;hp=679e678c7e6a158e0b6e25aaf5ef383cae346f08;hpb=2d93486c6c110cf81db720359b4ec20de9c91450;p=safe%2Fjmp%2Flinux-2.6 diff --git a/drivers/serial/amba-pl010.c b/drivers/serial/amba-pl010.c index 679e678..58a4879 100644 --- a/drivers/serial/amba-pl010.c +++ b/drivers/serial/amba-pl010.c @@ -22,8 +22,6 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * - * $Id: amba.c,v 1.41 2002/07/28 10:03:27 rmk Exp $ - * * This is a generic driver for ARM AMBA-type serial ports. They * have a lot of 16550-like features, but are not register compatible. * Note that although they do have CTS, DCD and DSR inputs, they do @@ -31,7 +29,6 @@ * required, these have to be supplied via some other means (eg, GPIO) * and hooked into this driver. */ -#include #if defined(CONFIG_SERIAL_AMBA_PL010_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) #define SUPPORT_SYSRQ @@ -47,13 +44,13 @@ #include #include #include +#include +#include +#include #include -#include -#include -#include -#define UART_NR 2 +#define UART_NR 8 #define SERIAL_AMBA_MAJOR 204 #define SERIAL_AMBA_MINOR 16 @@ -61,131 +58,96 @@ #define AMBA_ISR_PASS_LIMIT 256 -/* - * Access macros for the AMBA UARTs - */ -#define UART_GET_INT_STATUS(p) readb((p)->membase + UART010_IIR) -#define UART_PUT_ICR(p, c) writel((c), (p)->membase + UART010_ICR) -#define UART_GET_FR(p) readb((p)->membase + UART01x_FR) -#define UART_GET_CHAR(p) readb((p)->membase + UART01x_DR) -#define UART_PUT_CHAR(p, c) writel((c), (p)->membase + UART01x_DR) -#define UART_GET_RSR(p) readb((p)->membase + UART01x_RSR) -#define UART_GET_CR(p) readb((p)->membase + UART010_CR) -#define UART_PUT_CR(p,c) writel((c), (p)->membase + UART010_CR) -#define UART_GET_LCRL(p) readb((p)->membase + UART010_LCRL) -#define UART_PUT_LCRL(p,c) writel((c), (p)->membase + UART010_LCRL) -#define UART_GET_LCRM(p) readb((p)->membase + UART010_LCRM) -#define UART_PUT_LCRM(p,c) writel((c), (p)->membase + UART010_LCRM) -#define UART_GET_LCRH(p) readb((p)->membase + UART010_LCRH) -#define UART_PUT_LCRH(p,c) writel((c), (p)->membase + UART010_LCRH) #define UART_RX_DATA(s) (((s) & UART01x_FR_RXFE) == 0) #define UART_TX_READY(s) (((s) & UART01x_FR_TXFF) == 0) -#define UART_TX_EMPTY(p) ((UART_GET_FR(p) & UART01x_FR_TMSK) == 0) -#define UART_DUMMY_RSR_RX /*256*/0 +#define UART_DUMMY_RSR_RX 256 #define UART_PORT_SIZE 64 /* - * On the Integrator platform, the port RTS and DTR are provided by - * bits in the following SC_CTRLS register bits: - * RTS DTR - * UART0 7 6 - * UART1 5 4 - */ -#define SC_CTRLC (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLC_OFFSET) -#define SC_CTRLS (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLS_OFFSET) - -/* * We wrap our port structure around the generic uart_port. */ struct uart_amba_port { struct uart_port port; - unsigned int dtr_mask; - unsigned int rts_mask; + struct clk *clk; + struct amba_device *dev; + struct amba_pl010_data *data; unsigned int old_status; }; static void pl010_stop_tx(struct uart_port *port) { + struct uart_amba_port *uap = (struct uart_amba_port *)port; unsigned int cr; - cr = UART_GET_CR(port); + cr = readb(uap->port.membase + UART010_CR); cr &= ~UART010_CR_TIE; - UART_PUT_CR(port, cr); + writel(cr, uap->port.membase + UART010_CR); } static void pl010_start_tx(struct uart_port *port) { + struct uart_amba_port *uap = (struct uart_amba_port *)port; unsigned int cr; - cr = UART_GET_CR(port); + cr = readb(uap->port.membase + UART010_CR); cr |= UART010_CR_TIE; - UART_PUT_CR(port, cr); + writel(cr, uap->port.membase + UART010_CR); } static void pl010_stop_rx(struct uart_port *port) { + struct uart_amba_port *uap = (struct uart_amba_port *)port; unsigned int cr; - cr = UART_GET_CR(port); + cr = readb(uap->port.membase + UART010_CR); cr &= ~(UART010_CR_RIE | UART010_CR_RTIE); - UART_PUT_CR(port, cr); + writel(cr, uap->port.membase + UART010_CR); } static void pl010_enable_ms(struct uart_port *port) { + struct uart_amba_port *uap = (struct uart_amba_port *)port; unsigned int cr; - cr = UART_GET_CR(port); + cr = readb(uap->port.membase + UART010_CR); cr |= UART010_CR_MSIE; - UART_PUT_CR(port, cr); + writel(cr, uap->port.membase + UART010_CR); } -static void -#ifdef SUPPORT_SYSRQ -pl010_rx_chars(struct uart_port *port, struct pt_regs *regs) -#else -pl010_rx_chars(struct uart_port *port) -#endif +static void pl010_rx_chars(struct uart_amba_port *uap) { - struct tty_struct *tty = port->info->tty; + struct tty_struct *tty = uap->port.info->port.tty; unsigned int status, ch, flag, rsr, max_count = 256; - status = UART_GET_FR(port); + status = readb(uap->port.membase + UART01x_FR); while (UART_RX_DATA(status) && max_count--) { - if (tty->flip.count >= TTY_FLIPBUF_SIZE) { - if (tty->low_latency) - tty_flip_buffer_push(tty); - /* - * If this failed then we will throw away the - * bytes but must do so to clear interrupts. - */ - } - - ch = UART_GET_CHAR(port); + ch = readb(uap->port.membase + UART01x_DR); flag = TTY_NORMAL; - port->icount.rx++; + uap->port.icount.rx++; /* * Note that the error handling code is * out of the main execution path */ - rsr = UART_GET_RSR(port) | UART_DUMMY_RSR_RX; + rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX; if (unlikely(rsr & UART01x_RSR_ANY)) { + writel(0, uap->port.membase + UART01x_ECR); + if (rsr & UART01x_RSR_BE) { rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE); - port->icount.brk++; - if (uart_handle_break(port)) + uap->port.icount.brk++; + if (uart_handle_break(&uap->port)) goto ignore_char; } else if (rsr & UART01x_RSR_PE) - port->icount.parity++; + uap->port.icount.parity++; else if (rsr & UART01x_RSR_FE) - port->icount.frame++; + uap->port.icount.frame++; if (rsr & UART01x_RSR_OE) - port->icount.overrun++; + uap->port.icount.overrun++; - rsr &= port->read_status_mask; + rsr &= uap->port.read_status_mask; if (rsr & UART01x_RSR_BE) flag = TTY_BREAK; @@ -195,58 +157,58 @@ pl010_rx_chars(struct uart_port *port) flag = TTY_FRAME; } - if (uart_handle_sysrq_char(port, ch, regs)) + if (uart_handle_sysrq_char(&uap->port, ch)) goto ignore_char; - uart_insert_char(port, rsr, UART01x_RSR_OE, ch, flag); + uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag); ignore_char: - status = UART_GET_FR(port); + status = readb(uap->port.membase + UART01x_FR); } + spin_unlock(&uap->port.lock); tty_flip_buffer_push(tty); - return; + spin_lock(&uap->port.lock); } -static void pl010_tx_chars(struct uart_port *port) +static void pl010_tx_chars(struct uart_amba_port *uap) { - struct circ_buf *xmit = &port->info->xmit; + struct circ_buf *xmit = &uap->port.info->xmit; int count; - if (port->x_char) { - UART_PUT_CHAR(port, port->x_char); - port->icount.tx++; - port->x_char = 0; + if (uap->port.x_char) { + writel(uap->port.x_char, uap->port.membase + UART01x_DR); + uap->port.icount.tx++; + uap->port.x_char = 0; return; } - if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { - pl010_stop_tx(port); + if (uart_circ_empty(xmit) || uart_tx_stopped(&uap->port)) { + pl010_stop_tx(&uap->port); return; } - count = port->fifosize >> 1; + count = uap->port.fifosize >> 1; do { - UART_PUT_CHAR(port, xmit->buf[xmit->tail]); + writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR); xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); - port->icount.tx++; + uap->port.icount.tx++; if (uart_circ_empty(xmit)) break; } while (--count > 0); if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) - uart_write_wakeup(port); + uart_write_wakeup(&uap->port); if (uart_circ_empty(xmit)) - pl010_stop_tx(port); + pl010_stop_tx(&uap->port); } -static void pl010_modem_status(struct uart_port *port) +static void pl010_modem_status(struct uart_amba_port *uap) { - struct uart_amba_port *uap = (struct uart_amba_port *)port; unsigned int status, delta; - UART_PUT_ICR(&uap->port, 0); + writel(0, uap->port.membase + UART010_ICR); - status = UART_GET_FR(&uap->port) & UART01x_FR_MODEM_ANY; + status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY; delta = status ^ uap->old_status; uap->old_status = status; @@ -266,53 +228,52 @@ static void pl010_modem_status(struct uart_port *port) wake_up_interruptible(&uap->port.info->delta_msr_wait); } -static irqreturn_t pl010_int(int irq, void *dev_id, struct pt_regs *regs) +static irqreturn_t pl010_int(int irq, void *dev_id) { - struct uart_port *port = dev_id; + struct uart_amba_port *uap = dev_id; unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT; int handled = 0; - spin_lock(&port->lock); + spin_lock(&uap->port.lock); - status = UART_GET_INT_STATUS(port); + status = readb(uap->port.membase + UART010_IIR); if (status) { do { if (status & (UART010_IIR_RTIS | UART010_IIR_RIS)) -#ifdef SUPPORT_SYSRQ - pl010_rx_chars(port, regs); -#else - pl010_rx_chars(port); -#endif + pl010_rx_chars(uap); if (status & UART010_IIR_MIS) - pl010_modem_status(port); + pl010_modem_status(uap); if (status & UART010_IIR_TIS) - pl010_tx_chars(port); + pl010_tx_chars(uap); if (pass_counter-- == 0) break; - status = UART_GET_INT_STATUS(port); + status = readb(uap->port.membase + UART010_IIR); } while (status & (UART010_IIR_RTIS | UART010_IIR_RIS | UART010_IIR_TIS)); handled = 1; } - spin_unlock(&port->lock); + spin_unlock(&uap->port.lock); return IRQ_RETVAL(handled); } static unsigned int pl010_tx_empty(struct uart_port *port) { - return UART_GET_FR(port) & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT; + struct uart_amba_port *uap = (struct uart_amba_port *)port; + unsigned int status = readb(uap->port.membase + UART01x_FR); + return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT; } static unsigned int pl010_get_mctrl(struct uart_port *port) { + struct uart_amba_port *uap = (struct uart_amba_port *)port; unsigned int result = 0; unsigned int status; - status = UART_GET_FR(port); + status = readb(uap->port.membase + UART01x_FR); if (status & UART01x_FR_DCD) result |= TIOCM_CAR; if (status & UART01x_FR_DSR) @@ -326,35 +287,25 @@ static unsigned int pl010_get_mctrl(struct uart_port *port) static void pl010_set_mctrl(struct uart_port *port, unsigned int mctrl) { struct uart_amba_port *uap = (struct uart_amba_port *)port; - unsigned int ctrls = 0, ctrlc = 0; - if (mctrl & TIOCM_RTS) - ctrlc |= uap->rts_mask; - else - ctrls |= uap->rts_mask; - - if (mctrl & TIOCM_DTR) - ctrlc |= uap->dtr_mask; - else - ctrls |= uap->dtr_mask; - - __raw_writel(ctrls, SC_CTRLS); - __raw_writel(ctrlc, SC_CTRLC); + if (uap->data) + uap->data->set_mctrl(uap->dev, uap->port.membase, mctrl); } static void pl010_break_ctl(struct uart_port *port, int break_state) { + struct uart_amba_port *uap = (struct uart_amba_port *)port; unsigned long flags; unsigned int lcr_h; - spin_lock_irqsave(&port->lock, flags); - lcr_h = UART_GET_LCRH(port); + spin_lock_irqsave(&uap->port.lock, flags); + lcr_h = readb(uap->port.membase + UART010_LCRH); if (break_state == -1) lcr_h |= UART01x_LCRH_BRK; else lcr_h &= ~UART01x_LCRH_BRK; - UART_PUT_LCRH(port, lcr_h); - spin_unlock_irqrestore(&port->lock, flags); + writel(lcr_h, uap->port.membase + UART010_LCRH); + spin_unlock_irqrestore(&uap->port.lock, flags); } static int pl010_startup(struct uart_port *port) @@ -363,47 +314,70 @@ static int pl010_startup(struct uart_port *port) int retval; /* + * Try to enable the clock producer. + */ + retval = clk_enable(uap->clk); + if (retval) + goto out; + + uap->port.uartclk = clk_get_rate(uap->clk); + + /* * Allocate the IRQ */ - retval = request_irq(port->irq, pl010_int, 0, "uart-pl010", port); + retval = request_irq(uap->port.irq, pl010_int, 0, "uart-pl010", uap); if (retval) - return retval; + goto clk_dis; /* * initialise the old status of the modem signals */ - uap->old_status = UART_GET_FR(port) & UART01x_FR_MODEM_ANY; + uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY; /* * Finally, enable interrupts */ - UART_PUT_CR(port, UART01x_CR_UARTEN | UART010_CR_RIE | - UART010_CR_RTIE); + writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE, + uap->port.membase + UART010_CR); return 0; + + clk_dis: + clk_disable(uap->clk); + out: + return retval; } static void pl010_shutdown(struct uart_port *port) { + struct uart_amba_port *uap = (struct uart_amba_port *)port; + /* * Free the interrupt */ - free_irq(port->irq, port); + free_irq(uap->port.irq, uap); /* * disable all interrupts, disable the port */ - UART_PUT_CR(port, 0); + writel(0, uap->port.membase + UART010_CR); /* disable break condition and fifos */ - UART_PUT_LCRH(port, UART_GET_LCRH(port) & - ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN)); + writel(readb(uap->port.membase + UART010_LCRH) & + ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN), + uap->port.membase + UART010_LCRH); + + /* + * Shut down the clock producer + */ + clk_disable(uap->clk); } static void -pl010_set_termios(struct uart_port *port, struct termios *termios, - struct termios *old) +pl010_set_termios(struct uart_port *port, struct ktermios *termios, + struct ktermios *old) { + struct uart_amba_port *uap = (struct uart_amba_port *)port; unsigned int lcr_h, old_cr; unsigned long flags; unsigned int baud, quot; @@ -411,7 +385,7 @@ pl010_set_termios(struct uart_port *port, struct termios *termios, /* * Ask the core to calculate the divisor for us. */ - baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); + baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16); quot = uart_get_divisor(port, baud); switch (termios->c_cflag & CSIZE) { @@ -435,66 +409,66 @@ pl010_set_termios(struct uart_port *port, struct termios *termios, if (!(termios->c_cflag & PARODD)) lcr_h |= UART01x_LCRH_EPS; } - if (port->fifosize > 1) + if (uap->port.fifosize > 1) lcr_h |= UART01x_LCRH_FEN; - spin_lock_irqsave(&port->lock, flags); + spin_lock_irqsave(&uap->port.lock, flags); /* * Update the per-port timeout. */ uart_update_timeout(port, termios->c_cflag, baud); - port->read_status_mask = UART01x_RSR_OE; + uap->port.read_status_mask = UART01x_RSR_OE; if (termios->c_iflag & INPCK) - port->read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE; + uap->port.read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE; if (termios->c_iflag & (BRKINT | PARMRK)) - port->read_status_mask |= UART01x_RSR_BE; + uap->port.read_status_mask |= UART01x_RSR_BE; /* * Characters to ignore */ - port->ignore_status_mask = 0; + uap->port.ignore_status_mask = 0; if (termios->c_iflag & IGNPAR) - port->ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE; + uap->port.ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE; if (termios->c_iflag & IGNBRK) { - port->ignore_status_mask |= UART01x_RSR_BE; + uap->port.ignore_status_mask |= UART01x_RSR_BE; /* * If we're ignoring parity and break indicators, * ignore overruns too (for real raw support). */ if (termios->c_iflag & IGNPAR) - port->ignore_status_mask |= UART01x_RSR_OE; + uap->port.ignore_status_mask |= UART01x_RSR_OE; } /* * Ignore all characters if CREAD is not set. */ if ((termios->c_cflag & CREAD) == 0) - port->ignore_status_mask |= UART_DUMMY_RSR_RX; + uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX; /* first, disable everything */ - old_cr = UART_GET_CR(port) & ~UART010_CR_MSIE; + old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE; if (UART_ENABLE_MS(port, termios->c_cflag)) old_cr |= UART010_CR_MSIE; - UART_PUT_CR(port, 0); + writel(0, uap->port.membase + UART010_CR); /* Set baud rate */ quot -= 1; - UART_PUT_LCRM(port, ((quot & 0xf00) >> 8)); - UART_PUT_LCRL(port, (quot & 0xff)); + writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM); + writel(quot & 0xff, uap->port.membase + UART010_LCRL); /* * ----------v----------v----------v----------v----- * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L * ----------^----------^----------^----------^----- */ - UART_PUT_LCRH(port, lcr_h); - UART_PUT_CR(port, old_cr); + writel(lcr_h, uap->port.membase + UART010_LCRH); + writel(old_cr, uap->port.membase + UART010_CR); - spin_unlock_irqrestore(&port->lock, flags); + spin_unlock_irqrestore(&uap->port.lock, flags); } static const char *pl010_type(struct uart_port *port) @@ -538,7 +512,7 @@ static int pl010_verify_port(struct uart_port *port, struct serial_struct *ser) int ret = 0; if (ser->type != PORT_UNKNOWN && ser->type != PORT_AMBA) ret = -EINVAL; - if (ser->irq < 0 || ser->irq >= NR_IRQS) + if (ser->irq < 0 || ser->irq >= nr_irqs) ret = -EINVAL; if (ser->baud_base < 9600) ret = -EINVAL; @@ -564,87 +538,58 @@ static struct uart_ops amba_pl010_pops = { .verify_port = pl010_verify_port, }; -static struct uart_amba_port amba_ports[UART_NR] = { - { - .port = { - .membase = (void *)IO_ADDRESS(INTEGRATOR_UART0_BASE), - .mapbase = INTEGRATOR_UART0_BASE, - .iotype = SERIAL_IO_MEM, - .irq = IRQ_UARTINT0, - .uartclk = 14745600, - .fifosize = 16, - .ops = &amba_pl010_pops, - .flags = ASYNC_BOOT_AUTOCONF, - .line = 0, - }, - .dtr_mask = 1 << 5, - .rts_mask = 1 << 4, - }, - { - .port = { - .membase = (void *)IO_ADDRESS(INTEGRATOR_UART1_BASE), - .mapbase = INTEGRATOR_UART1_BASE, - .iotype = SERIAL_IO_MEM, - .irq = IRQ_UARTINT1, - .uartclk = 14745600, - .fifosize = 16, - .ops = &amba_pl010_pops, - .flags = ASYNC_BOOT_AUTOCONF, - .line = 1, - }, - .dtr_mask = 1 << 7, - .rts_mask = 1 << 6, - } -}; +static struct uart_amba_port *amba_ports[UART_NR]; #ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE +static void pl010_console_putchar(struct uart_port *port, int ch) +{ + struct uart_amba_port *uap = (struct uart_amba_port *)port; + unsigned int status; + + do { + status = readb(uap->port.membase + UART01x_FR); + barrier(); + } while (!UART_TX_READY(status)); + writel(ch, uap->port.membase + UART01x_DR); +} + static void pl010_console_write(struct console *co, const char *s, unsigned int count) { - struct uart_port *port = &amba_ports[co->index].port; + struct uart_amba_port *uap = amba_ports[co->index]; unsigned int status, old_cr; - int i; + + clk_enable(uap->clk); /* * First save the CR then disable the interrupts */ - old_cr = UART_GET_CR(port); - UART_PUT_CR(port, UART01x_CR_UARTEN); + old_cr = readb(uap->port.membase + UART010_CR); + writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR); - /* - * Now, do each character - */ - for (i = 0; i < count; i++) { - do { - status = UART_GET_FR(port); - } while (!UART_TX_READY(status)); - UART_PUT_CHAR(port, s[i]); - if (s[i] == '\n') { - do { - status = UART_GET_FR(port); - } while (!UART_TX_READY(status)); - UART_PUT_CHAR(port, '\r'); - } - } + uart_console_write(&uap->port, s, count, pl010_console_putchar); /* * Finally, wait for transmitter to become empty * and restore the TCR */ do { - status = UART_GET_FR(port); + status = readb(uap->port.membase + UART01x_FR); + barrier(); } while (status & UART01x_FR_BUSY); - UART_PUT_CR(port, old_cr); + writel(old_cr, uap->port.membase + UART010_CR); + + clk_disable(uap->clk); } static void __init -pl010_console_get_options(struct uart_port *port, int *baud, +pl010_console_get_options(struct uart_amba_port *uap, int *baud, int *parity, int *bits) { - if (UART_GET_CR(port) & UART01x_CR_UARTEN) { + if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) { unsigned int lcr_h, quot; - lcr_h = UART_GET_LCRH(port); + lcr_h = readb(uap->port.membase + UART010_LCRH); *parity = 'n'; if (lcr_h & UART01x_LCRH_PEN) { @@ -659,14 +604,15 @@ pl010_console_get_options(struct uart_port *port, int *baud, else *bits = 8; - quot = UART_GET_LCRL(port) | UART_GET_LCRM(port) << 8; - *baud = port->uartclk / (16 * (quot + 1)); + quot = readb(uap->port.membase + UART010_LCRL) | + readb(uap->port.membase + UART010_LCRM) << 8; + *baud = uap->port.uartclk / (16 * (quot + 1)); } } static int __init pl010_console_setup(struct console *co, char *options) { - struct uart_port *port; + struct uart_amba_port *uap; int baud = 38400; int bits = 8; int parity = 'n'; @@ -679,14 +625,18 @@ static int __init pl010_console_setup(struct console *co, char *options) */ if (co->index >= UART_NR) co->index = 0; - port = &amba_ports[co->index].port; + uap = amba_ports[co->index]; + if (!uap) + return -ENODEV; + + uap->port.uartclk = clk_get_rate(uap->clk); if (options) uart_parse_options(options, &baud, &parity, &bits, &flow); else - pl010_console_get_options(port, &baud, &parity, &bits); + pl010_console_get_options(uap, &baud, &parity, &bits); - return uart_set_options(port, co, baud, parity, bits, flow); + return uart_set_options(&uap->port, co, baud, parity, bits, flow); } static struct uart_driver amba_reg; @@ -700,24 +650,6 @@ static struct console amba_console = { .data = &amba_reg, }; -static int __init amba_console_init(void) -{ - /* - * All port initializations are done statically - */ - register_console(&amba_console); - return 0; -} -console_initcall(amba_console_init); - -static int __init amba_late_console_init(void) -{ - if (!(amba_console.flags & CON_ENABLED)) - register_console(&amba_console); - return 0; -} -late_initcall(amba_late_console_init); - #define AMBA_CONSOLE &amba_console #else #define AMBA_CONSOLE NULL @@ -733,32 +665,84 @@ static struct uart_driver amba_reg = { .cons = AMBA_CONSOLE, }; -static int pl010_probe(struct amba_device *dev, void *id) +static int pl010_probe(struct amba_device *dev, struct amba_id *id) { - int i; + struct uart_amba_port *uap; + void __iomem *base; + int i, ret; - for (i = 0; i < UART_NR; i++) { - if (amba_ports[i].port.mapbase != dev->res.start) - continue; + for (i = 0; i < ARRAY_SIZE(amba_ports); i++) + if (amba_ports[i] == NULL) + break; - amba_ports[i].port.dev = &dev->dev; - uart_add_one_port(&amba_reg, &amba_ports[i].port); - amba_set_drvdata(dev, &amba_ports[i]); - break; + if (i == ARRAY_SIZE(amba_ports)) { + ret = -EBUSY; + goto out; } - return 0; + uap = kzalloc(sizeof(struct uart_amba_port), GFP_KERNEL); + if (!uap) { + ret = -ENOMEM; + goto out; + } + + base = ioremap(dev->res.start, resource_size(&dev->res)); + if (!base) { + ret = -ENOMEM; + goto free; + } + + uap->clk = clk_get(&dev->dev, NULL); + if (IS_ERR(uap->clk)) { + ret = PTR_ERR(uap->clk); + goto unmap; + } + + uap->port.dev = &dev->dev; + uap->port.mapbase = dev->res.start; + uap->port.membase = base; + uap->port.iotype = UPIO_MEM; + uap->port.irq = dev->irq[0]; + uap->port.fifosize = 16; + uap->port.ops = &amba_pl010_pops; + uap->port.flags = UPF_BOOT_AUTOCONF; + uap->port.line = i; + uap->dev = dev; + uap->data = dev->dev.platform_data; + + amba_ports[i] = uap; + + amba_set_drvdata(dev, uap); + ret = uart_add_one_port(&amba_reg, &uap->port); + if (ret) { + amba_set_drvdata(dev, NULL); + amba_ports[i] = NULL; + clk_put(uap->clk); + unmap: + iounmap(base); + free: + kfree(uap); + } + out: + return ret; } static int pl010_remove(struct amba_device *dev) { struct uart_amba_port *uap = amba_get_drvdata(dev); - - if (uap) - uart_remove_one_port(&amba_reg, &uap->port); + int i; amba_set_drvdata(dev, NULL); + uart_remove_one_port(&amba_reg, &uap->port); + + for (i = 0; i < ARRAY_SIZE(amba_ports); i++) + if (amba_ports[i] == uap) + amba_ports[i] = NULL; + + iounmap(uap->port.membase); + clk_put(uap->clk); + kfree(uap); return 0; } @@ -805,7 +789,7 @@ static int __init pl010_init(void) { int ret; - printk(KERN_INFO "Serial: AMBA driver $Revision: 1.41 $\n"); + printk(KERN_INFO "Serial: AMBA driver\n"); ret = uart_register_driver(&amba_reg); if (ret == 0) { @@ -826,5 +810,5 @@ module_init(pl010_init); module_exit(pl010_exit); MODULE_AUTHOR("ARM Ltd/Deep Blue Solutions Ltd"); -MODULE_DESCRIPTION("ARM AMBA serial port driver $Revision: 1.41 $"); +MODULE_DESCRIPTION("ARM AMBA serial port driver"); MODULE_LICENSE("GPL");