X-Git-Url: http://ftp.safe.ca/?a=blobdiff_plain;f=drivers%2Fnet%2Fgianfar.h;h=2cd94338b5d3a8459649f902cab0f72daa18e653;hb=ec1652af18ef02c7c6ceeabb64f56f16eaf40ae9;hp=220084e53341ddce82122a82489328bd95013bbe;hpb=733482e445ca4450cf41381b1c95e2b8c7145114;p=safe%2Fjmp%2Flinux-2.6 diff --git a/drivers/net/gianfar.h b/drivers/net/gianfar.h index 220084e..2cd9433 100644 --- a/drivers/net/gianfar.h +++ b/drivers/net/gianfar.h @@ -6,7 +6,7 @@ * Based on 8260_io/fcc_enet.c * * Author: Andy Fleming - * Maintainer: Kumar Gala (kumar.gala@freescale.com) + * Maintainer: Kumar Gala * * Copyright (c) 2002-2004 Freescale Semiconductor, Inc. * @@ -22,7 +22,6 @@ #ifndef __GIANFAR_H #define __GIANFAR_H -#include #include #include #include @@ -46,9 +45,6 @@ #include #include #include -#include -#include -#include "gianfar_mii.h" /* The maximum number of packets to be handled in one call of gfar_poll */ #define GFAR_DEV_WEIGHT 64 @@ -79,23 +75,32 @@ extern const char gfar_driver_name[]; extern const char gfar_driver_version[]; /* These need to be powers of 2 for this driver */ -#ifdef CONFIG_GFAR_NAPI #define DEFAULT_TX_RING_SIZE 256 #define DEFAULT_RX_RING_SIZE 256 -#else -#define DEFAULT_TX_RING_SIZE 64 -#define DEFAULT_RX_RING_SIZE 64 -#endif #define GFAR_RX_MAX_RING_SIZE 256 #define GFAR_TX_MAX_RING_SIZE 256 +#define GFAR_MAX_FIFO_THRESHOLD 511 +#define GFAR_MAX_FIFO_STARVE 511 +#define GFAR_MAX_FIFO_STARVE_OFF 511 + #define DEFAULT_RX_BUFFER_SIZE 1536 #define TX_RING_MOD_MASK(size) (size-1) #define RX_RING_MOD_MASK(size) (size-1) #define JUMBO_BUFFER_SIZE 9728 #define JUMBO_FRAME_SIZE 9600 +#define DEFAULT_FIFO_TX_THR 0x100 +#define DEFAULT_FIFO_TX_STARVE 0x40 +#define DEFAULT_FIFO_TX_STARVE_OFF 0x80 +#define DEFAULT_BD_STASH 1 +#define DEFAULT_STASH_LENGTH 96 +#define DEFAULT_STASH_INDEX 0 + +/* The number of Exact Match registers */ +#define GFAR_EM_NUM 15 + /* Latency of interface clock in nanoseconds */ /* Interface clock latency , in this case, means the * time described by a value of 1 in the interrupt @@ -112,16 +117,25 @@ extern const char gfar_driver_version[]; #define DEFAULT_TX_COALESCE 1 #define DEFAULT_TXCOUNT 16 -#define DEFAULT_TXTIME 400 +#define DEFAULT_TXTIME 21 + +#define DEFAULT_RXTIME 21 + +#define DEFAULT_RX_COALESCE 0 +#define DEFAULT_RXCOUNT 0 -#define DEFAULT_RX_COALESCE 1 -#define DEFAULT_RXCOUNT 16 -#define DEFAULT_RXTIME 400 +#define GFAR_SUPPORTED (SUPPORTED_10baseT_Half \ + | SUPPORTED_10baseT_Full \ + | SUPPORTED_100baseT_Half \ + | SUPPORTED_100baseT_Full \ + | SUPPORTED_Autoneg \ + | SUPPORTED_MII) -#define TBIPA_VALUE 0x1f -#define MIIMCFG_INIT_VALUE 0x00000007 -#define MIIMCFG_RESET 0x80000000 -#define MIIMIND_BUSY 0x00000001 +/* TBI register addresses */ +#define MII_TBICON 0x11 + +/* TBICON register bit fields */ +#define TBICON_CLK_SELECT 0x0020 /* MAC register bits */ #define MACCFG1_SOFT_RESET 0x80000000 @@ -144,9 +158,14 @@ extern const char gfar_driver_version[]; #define MACCFG2_GMII 0x00000200 #define MACCFG2_HUGEFRAME 0x00000020 #define MACCFG2_LENGTHCHECK 0x00000010 +#define MACCFG2_MPEN 0x00000008 #define ECNTRL_INIT_SETTINGS 0x00001000 #define ECNTRL_TBI_MODE 0x00000020 +#define ECNTRL_REDUCED_MODE 0x00000010 +#define ECNTRL_R100 0x00000008 +#define ECNTRL_REDUCED_MII_MODE 0x00000004 +#define ECNTRL_SGMII_MODE 0x00000002 #define MRBLR_INIT_SETTINGS DEFAULT_RX_BUFFER_SIZE @@ -171,6 +190,18 @@ extern const char gfar_driver_version[]; #define mk_ic_value(count, time) (IC_ICEN | \ mk_ic_icft(count) | \ mk_ic_ictt(time)) +#define get_icft_value(ic) (((unsigned long)ic & IC_ICFT_MASK) >> \ + IC_ICFT_SHIFT) +#define get_ictt_value(ic) ((unsigned long)ic & IC_ICTT_MASK) + +#define DEFAULT_TXIC mk_ic_value(DEFAULT_TXCOUNT, DEFAULT_TXTIME) +#define DEFAULT_RXIC mk_ic_value(DEFAULT_RXCOUNT, DEFAULT_RXTIME) + +#define skip_bd(bdp, stride, base, ring_size) ({ \ + typeof(bdp) new_bd = (bdp) + (stride); \ + (new_bd >= (base) + (ring_size)) ? (new_bd - (ring_size)) : new_bd; }) + +#define next_bd(bdp, base, ring_size) skip_bd(bdp, 1, base, ring_size) #define RCTRL_PAL_MASK 0x001f0000 #define RCTRL_VLEX 0x00002000 @@ -181,10 +212,14 @@ extern const char gfar_driver_version[]; #define RCTRL_PRSDEP_MASK 0x000000c0 #define RCTRL_PRSDEP_INIT 0x000000c0 #define RCTRL_PROM 0x00000008 -#define RCTRL_CHECKSUMMING (RCTRL_IPCSEN \ - | RCTRL_TUCSEN | RCTRL_PRSDEP_INIT) +#define RCTRL_EMEN 0x00000002 +#define RCTRL_REQ_PARSER (RCTRL_VLEX | RCTRL_IPCSEN | \ + RCTRL_TUCSEN) +#define RCTRL_CHECKSUMMING (RCTRL_IPCSEN | RCTRL_TUCSEN | \ + RCTRL_PRSDEP_INIT) #define RCTRL_EXTHASH (RCTRL_GHTX) #define RCTRL_VLAN (RCTRL_PRSDEP_INIT) +#define RCTRL_PADDING(x) ((x << 16) & RCTRL_PAL_MASK) #define RSTAT_CLEAR_RHALT 0x00800000 @@ -210,18 +245,21 @@ extern const char gfar_driver_version[]; #define IEVENT_CRL 0x00020000 #define IEVENT_XFUN 0x00010000 #define IEVENT_RXB0 0x00008000 +#define IEVENT_MAG 0x00000800 #define IEVENT_GRSC 0x00000100 #define IEVENT_RXF0 0x00000080 #define IEVENT_FIR 0x00000008 #define IEVENT_FIQ 0x00000004 #define IEVENT_DPE 0x00000002 #define IEVENT_PERR 0x00000001 -#define IEVENT_RX_MASK (IEVENT_RXB0 | IEVENT_RXF0) +#define IEVENT_RX_MASK (IEVENT_RXB0 | IEVENT_RXF0 | IEVENT_BSY) #define IEVENT_TX_MASK (IEVENT_TXB | IEVENT_TXF) +#define IEVENT_RTX_MASK (IEVENT_RX_MASK | IEVENT_TX_MASK) #define IEVENT_ERR_MASK \ (IEVENT_RXC | IEVENT_BSY | IEVENT_EBERR | IEVENT_MSRO | \ IEVENT_BABT | IEVENT_TXC | IEVENT_TXE | IEVENT_LC \ - | IEVENT_CRL | IEVENT_XFUN | IEVENT_DPE | IEVENT_PERR) + | IEVENT_CRL | IEVENT_XFUN | IEVENT_DPE | IEVENT_PERR \ + | IEVENT_MAG | IEVENT_BABR) #define IMASK_INIT_CLEAR 0x00000000 #define IMASK_BABR 0x80000000 @@ -239,41 +277,43 @@ extern const char gfar_driver_version[]; #define IMASK_CRL 0x00020000 #define IMASK_XFUN 0x00010000 #define IMASK_RXB0 0x00008000 +#define IMASK_MAG 0x00000800 #define IMASK_GTSC 0x00000100 #define IMASK_RXFEN0 0x00000080 #define IMASK_FIR 0x00000008 #define IMASK_FIQ 0x00000004 #define IMASK_DPE 0x00000002 #define IMASK_PERR 0x00000001 -#define IMASK_RX_DISABLED ~(IMASK_RXFEN0 | IMASK_BSY) #define IMASK_DEFAULT (IMASK_TXEEN | IMASK_TXFEN | IMASK_TXBEN | \ IMASK_RXFEN0 | IMASK_BSY | IMASK_EBERR | IMASK_BABR | \ IMASK_XFUN | IMASK_RXC | IMASK_BABT | IMASK_DPE \ | IMASK_PERR) +#define IMASK_RTX_DISABLED ((~(IMASK_RXFEN0 | IMASK_TXFEN | IMASK_BSY)) \ + & IMASK_DEFAULT) +/* Fifo management */ +#define FIFO_TX_THR_MASK 0x01ff +#define FIFO_TX_STARVE_MASK 0x01ff +#define FIFO_TX_STARVE_OFF_MASK 0x01ff /* Attribute fields */ /* This enables rx snooping for buffers and descriptors */ -#ifdef CONFIG_GFAR_BDSTASH #define ATTR_BDSTASH 0x00000800 -#else -#define ATTR_BDSTASH 0x00000000 -#endif -#ifdef CONFIG_GFAR_BUFSTASH #define ATTR_BUFSTASH 0x00004000 -#define STASH_LENGTH 64 -#else -#define ATTR_BUFSTASH 0x00000000 -#endif #define ATTR_SNOOPING 0x000000c0 -#define ATTR_INIT_SETTINGS (ATTR_SNOOPING \ - | ATTR_BDSTASH | ATTR_BUFSTASH) +#define ATTR_INIT_SETTINGS ATTR_SNOOPING #define ATTRELI_INIT_SETTINGS 0x0 +#define ATTRELI_EL_MASK 0x3fff0000 +#define ATTRELI_EL(x) (x << 16) +#define ATTRELI_EI_MASK 0x00003fff +#define ATTRELI_EI(x) (x) +#define BD_LFLAG(flags) ((flags) << 16) +#define BD_LENGTH_MASK 0x0000ffff /* TxBD status field bits */ #define TXBD_READY 0x8000 @@ -318,6 +358,9 @@ extern const char gfar_driver_version[]; #define RXBD_OVERRUN 0x0002 #define RXBD_TRUNCATED 0x0001 #define RXBD_STATS 0x01ff +#define RXBD_ERR (RXBD_LARGE | RXBD_SHORT | RXBD_NONOCTET \ + | RXBD_CRCERR | RXBD_OVERRUN \ + | RXBD_TRUNCATED) /* Rx FCB status field bits */ #define RXFCB_VLN 0x8000 @@ -328,25 +371,26 @@ extern const char gfar_driver_version[]; #define RXFCB_CTU 0x0400 #define RXFCB_EIP 0x0200 #define RXFCB_ETU 0x0100 +#define RXFCB_CSUM_MASK 0x0f00 #define RXFCB_PERR_MASK 0x000c #define RXFCB_PERR_BADL3 0x0008 +#define GFAR_INT_NAME_MAX IFNAMSIZ + 4 + struct txbd8 { - u16 status; /* Status Fields */ - u16 length; /* Buffer length */ + union { + struct { + u16 status; /* Status Fields */ + u16 length; /* Buffer length */ + }; + u32 lstatus; + }; u32 bufPtr; /* Buffer Pointer */ }; struct txfcb { - u8 vln:1, - ip:1, - ip6:1, - tup:1, - udp:1, - cip:1, - ctu:1, - nph:1; + u8 flags; u8 reserved; u8 l4os; /* Level 4 Header Offset */ u8 l3os; /* Level 3 Header Offset */ @@ -356,20 +400,18 @@ struct txfcb { struct rxbd8 { - u16 status; /* Status Fields */ - u16 length; /* Buffer Length */ + union { + struct { + u16 status; /* Status Fields */ + u16 length; /* Buffer Length */ + }; + u32 lstatus; + }; u32 bufPtr; /* Buffer Pointer */ }; struct rxfcb { - u16 vln:1, - ip:1, - ip6:1, - tup:1, - cip:1, - ctu:1, - eip:1, - etu:1; + u16 flags; u8 rq; /* Receive Queue index */ u8 pro; /* Layer 4 Protocol */ u16 reserved; @@ -644,6 +686,19 @@ struct gfar { }; +/* Flags related to gianfar device features */ +#define FSL_GIANFAR_DEV_HAS_GIGABIT 0x00000001 +#define FSL_GIANFAR_DEV_HAS_COALESCE 0x00000002 +#define FSL_GIANFAR_DEV_HAS_RMON 0x00000004 +#define FSL_GIANFAR_DEV_HAS_MULTI_INTR 0x00000008 +#define FSL_GIANFAR_DEV_HAS_CSUM 0x00000010 +#define FSL_GIANFAR_DEV_HAS_VLAN 0x00000020 +#define FSL_GIANFAR_DEV_HAS_EXTENDED_HASH 0x00000040 +#define FSL_GIANFAR_DEV_HAS_PADDING 0x00000080 +#define FSL_GIANFAR_DEV_HAS_MAGIC_PACKET 0x00000100 +#define FSL_GIANFAR_DEV_HAS_BD_STASHING 0x00000200 +#define FSL_GIANFAR_DEV_HAS_BUF_STASHING 0x00000400 + /* Struct stolen almost completely (and shamelessly) from the FCC enet source * (Ok, that's not so true anymore, but there is a family resemblence) * The GFAR buffer descriptors track the ring buffers. The rx_bd_base @@ -654,54 +709,90 @@ struct gfar { * the buffer descriptor determines the actual condition. */ struct gfar_private { - /* pointers to arrays of skbuffs for tx and rx */ + /* Fields controlled by TX lock */ + spinlock_t txlock; + + /* Pointer to the array of skbuffs */ struct sk_buff ** tx_skbuff; - struct sk_buff ** rx_skbuff; - /* indices pointing to the next free sbk in skb arrays */ + /* next free skb in the array */ u16 skb_curtx; - u16 skb_currx; - /* index of the first skb which hasn't been transmitted - * yet. */ + /* First skb in line to be transmitted */ u16 skb_dirtytx; /* Configuration info for the coalescing features */ unsigned char txcoalescing; - unsigned short txcount; - unsigned short txtime; + unsigned long txic; + + /* Buffer descriptor pointers */ + struct txbd8 *tx_bd_base; /* First tx buffer descriptor */ + struct txbd8 *cur_tx; /* Next free ring entry */ + struct txbd8 *dirty_tx; /* First buffer in line + to be transmitted */ + unsigned int tx_ring_size; + unsigned int num_txbdfree; /* number of TxBDs free */ + + /* RX Locked fields */ + spinlock_t rxlock; + + struct device_node *node; + struct net_device *ndev; + struct of_device *ofdev; + struct napi_struct napi; + + /* skb array and index */ + struct sk_buff ** rx_skbuff; + u16 skb_currx; + + /* RX Coalescing values */ unsigned char rxcoalescing; - unsigned short rxcount; - unsigned short rxtime; + unsigned long rxic; - /* GFAR addresses */ - struct rxbd8 *rx_bd_base; /* Base addresses of Rx and Tx Buffers */ - struct txbd8 *tx_bd_base; + struct rxbd8 *rx_bd_base; /* First Rx buffers */ struct rxbd8 *cur_rx; /* Next free rx ring entry */ - struct txbd8 *cur_tx; /* Next free ring entry */ - struct txbd8 *dirty_tx; /* The Ring entry to be freed. */ - struct gfar *regs; /* Pointer to the GFAR memory mapped Registers */ - u32 *hash_regs[16]; - int hash_width; - struct net_device_stats stats; /* linux network statistics */ - struct gfar_extra_stats extra_stats; - spinlock_t lock; + + /* RX parameters */ + unsigned int rx_ring_size; unsigned int rx_buffer_size; unsigned int rx_stash_size; - unsigned int tx_ring_size; - unsigned int rx_ring_size; + unsigned int rx_stash_index; + + struct sk_buff_head rx_recycle; - unsigned char vlan_enable:1, - rx_csum_enable:1, - extended_hash:1; - unsigned short padding; struct vlan_group *vlgrp; - /* Info structure initialized by board setup code */ + + /* Unprotected fields */ + /* Pointer to the GFAR memory mapped Registers */ + struct gfar __iomem *regs; + + /* Hash registers and their width */ + u32 __iomem *hash_regs[16]; + int hash_width; + + /* global parameters */ + unsigned int fifo_threshold; + unsigned int fifo_starve; + unsigned int fifo_starve_off; + + /* Bitfield update lock */ + spinlock_t bflock; + + phy_interface_t interface; + struct device_node *phy_node; + struct device_node *tbi_node; + u32 device_flags; + unsigned char rx_csum_enable:1, + extended_hash:1, + bd_stash_en:1, + wol_en:1; /* Wake-on-LAN enabled */ + unsigned short padding; + unsigned int interruptTransmit; unsigned int interruptReceive; unsigned int interruptError; - struct gianfar_platform_data *einfo; + /* PHY stuff */ struct phy_device *phydev; struct mii_bus *mii_bus; int oldspeed; @@ -709,28 +800,37 @@ struct gfar_private { int oldlink; uint32_t msg_enable; + + struct work_struct reset_task; + + char int_name_tx[GFAR_INT_NAME_MAX]; + char int_name_rx[GFAR_INT_NAME_MAX]; + char int_name_er[GFAR_INT_NAME_MAX]; + + /* Network Statistics */ + struct gfar_extra_stats extra_stats; }; -extern inline u32 gfar_read(volatile unsigned *addr) +static inline u32 gfar_read(volatile unsigned __iomem *addr) { u32 val; val = in_be32(addr); return val; } -extern inline void gfar_write(volatile unsigned *addr, u32 val) +static inline void gfar_write(volatile unsigned __iomem *addr, u32 val) { out_be32(addr, val); } -extern struct ethtool_ops *gfar_op_array[]; - -extern irqreturn_t gfar_receive(int irq, void *dev_id, struct pt_regs *regs); +extern irqreturn_t gfar_receive(int irq, void *dev_id); extern int startup_gfar(struct net_device *dev); extern void stop_gfar(struct net_device *dev); extern void gfar_halt(struct net_device *dev); extern void gfar_phy_test(struct mii_bus *bus, struct phy_device *phydev, int enable, u32 regnum, u32 read); -void gfar_setup_stashing(struct net_device *dev); +void gfar_init_sysfs(struct net_device *dev); + +extern const struct ethtool_ops gfar_ethtool_ops; #endif /* __GIANFAR_H */