X-Git-Url: http://ftp.safe.ca/?a=blobdiff_plain;f=drivers%2Fmacintosh%2Fsmu.c;h=d86d57af282abde6bca52d369e480ca543651746;hb=f4c0a0fdfae708f7aa438c27a380ed4071294e11;hp=135f22eb1ad4bc8500ddc7a38c3023cac882ed52;hpb=d05c7a80cf39ae7d0f8d0c3e47c93d51fcd393d3;p=safe%2Fjmp%2Flinux-2.6 diff --git a/drivers/macintosh/smu.c b/drivers/macintosh/smu.c index 135f22e..d86d57a 100644 --- a/drivers/macintosh/smu.c +++ b/drivers/macintosh/smu.c @@ -12,7 +12,7 @@ * - maybe add timeout to commands ? * - blocking version of time functions * - polling version of i2c commands (including timer that works with - * interrutps off) + * interrupts off) * - maybe avoid some data copies with i2c by directly using the smu cmd * buffer and a lower level internal interface * - understand SMU -> CPU events and implement reception of them via @@ -85,6 +85,7 @@ struct smu_device { u32 cmd_buf_abs; /* command buffer absolute */ struct list_head cmd_list; struct smu_cmd *cmd_cur; /* pending command */ + int broken_nap; struct list_head cmd_i2c_list; struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */ struct timer_list i2c_timer; @@ -135,6 +136,19 @@ static void smu_start_cmd(void) fend = faddr + smu->cmd_buf->length + 2; flush_inval_dcache_range(faddr, fend); + + /* We also disable NAP mode for the duration of the command + * on U3 based machines. + * This is slightly racy as it can be written back to 1 by a sysctl + * but that never happens in practice. There seem to be an issue with + * U3 based machines such as the iMac G5 where napping for the + * whole duration of the command prevents the SMU from fetching it + * from memory. This might be related to the strange i2c based + * mechanism the SMU uses to access memory. + */ + if (smu->broken_nap) + powersave_nap = 0; + /* This isn't exactly a DMA mapping here, I suspect * the SMU is actually communicating with us via i2c to the * northbridge or the CPU to access RAM. @@ -179,7 +193,7 @@ static irqreturn_t smu_db_intr(int irq, void *arg) /* CPU might have brought back the cache line, so we need * to flush again before peeking at the SMU response. We * flush the entire buffer for now as we haven't read the - * reply lenght (it's only 2 cache lines anyway) + * reply length (it's only 2 cache lines anyway) */ faddr = (unsigned long)smu->cmd_buf; flush_inval_dcache_range(faddr, faddr + 256); @@ -211,6 +225,10 @@ static irqreturn_t smu_db_intr(int irq, void *arg) misc = cmd->misc; mb(); cmd->status = rc; + + /* Re-enable NAP mode */ + if (smu->broken_nap) + powersave_nap = 1; bail: /* Start next command if any */ smu_start_cmd(); @@ -461,16 +479,19 @@ int __init smu_init (void) if (np == NULL) return -ENODEV; - printk(KERN_INFO "SMU driver %s %s\n", VERSION, AUTHOR); + printk(KERN_INFO "SMU: Driver %s %s\n", VERSION, AUTHOR); if (smu_cmdbuf_abs == 0) { printk(KERN_ERR "SMU: Command buffer not allocated !\n"); + of_node_put(np); return -EINVAL; } smu = alloc_bootmem(sizeof(struct smu_device)); - if (smu == NULL) + if (smu == NULL) { + of_node_put(np); return -ENOMEM; + } memset(smu, 0, sizeof(*smu)); spin_lock_init(&smu->lock); @@ -533,6 +554,11 @@ int __init smu_init (void) goto fail; } + /* U3 has an issue with NAP mode when issuing SMU commands */ + smu->broken_nap = pmac_get_uninorth_variant() < 4; + if (smu->broken_nap) + printk(KERN_INFO "SMU: using NAP mode workaround\n"); + sys_ctrler = SYS_CTRLER_SMU; return 0; @@ -606,7 +632,7 @@ static void smu_expose_childs(struct work_struct *unused) struct device_node *np; for (np = NULL; (np = of_get_next_child(smu->of_node, np)) != NULL;) - if (device_is_compatible(np, "smu-sensors")) + if (of_device_is_compatible(np, "smu-sensors")) of_platform_device_create(np, "smu-sensors", &smu->of_dev->dev); } @@ -1053,10 +1079,9 @@ static int smu_open(struct inode *inode, struct file *file) struct smu_private *pp; unsigned long flags; - pp = kmalloc(sizeof(struct smu_private), GFP_KERNEL); + pp = kzalloc(sizeof(struct smu_private), GFP_KERNEL); if (pp == 0) return -ENOMEM; - memset(pp, 0, sizeof(struct smu_private)); spin_lock_init(&pp->lock); pp->mode = smu_file_commands; init_waitqueue_head(&pp->wait); @@ -1259,9 +1284,9 @@ static int smu_release(struct inode *inode, struct file *file) set_current_state(TASK_UNINTERRUPTIBLE); if (pp->cmd.status != 1) break; - spin_lock_irqsave(&pp->lock, flags); - schedule(); spin_unlock_irqrestore(&pp->lock, flags); + schedule(); + spin_lock_irqsave(&pp->lock, flags); } set_current_state(TASK_RUNNING); remove_wait_queue(&pp->wait, &wait);