X-Git-Url: http://ftp.safe.ca/?a=blobdiff_plain;f=drivers%2Fide%2Fpci%2Fhpt366.c;h=e5e64436ffd95eb14f5ede185a75cfad023ef738;hb=b123f56e04c7c112f754f948198d1ea5a80e649d;hp=12685939a813f61f0e30521d2b871f2dd9fb9b1d;hpb=f01393e48c44e30f7c9a36c8b98a07b0232580fe;p=safe%2Fjmp%2Flinux-2.6 diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c index 1268593..e5e6443 100644 --- a/drivers/ide/pci/hpt366.c +++ b/drivers/ide/pci/hpt366.c @@ -1,6 +1,4 @@ /* - * linux/drivers/ide/pci/hpt366.c Version 1.30 Dec 12, 2007 - * * Copyright (C) 1999-2003 Andre Hedrick * Portions Copyright (C) 2001 Sun Microsystems, Inc. * Portions Copyright (C) 2003 Red Hat Inc @@ -123,12 +121,8 @@ #include #include #include -#include -#include -#include #include #include - #include #include #include @@ -136,7 +130,6 @@ #include #include -#include /* various tuning parameters */ #define HPT_RESET_STATE_ENGINE @@ -626,7 +619,8 @@ static int check_in_drive_list(ide_drive_t *drive, const char **list) static u8 hpt3xx_udma_filter(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); - struct hpt_info *info = pci_get_drvdata(hwif->pci_dev); + struct pci_dev *dev = to_pci_dev(hwif->dev); + struct hpt_info *info = pci_get_drvdata(dev); u8 mask = hwif->ultra_mask; switch (info->chip_type) { @@ -665,7 +659,8 @@ static u8 hpt3xx_udma_filter(ide_drive_t *drive) static u8 hpt3xx_mdma_filter(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); - struct hpt_info *info = pci_get_drvdata(hwif->pci_dev); + struct pci_dev *dev = to_pci_dev(hwif->dev); + struct hpt_info *info = pci_get_drvdata(dev); switch (info->chip_type) { case HPT372 : @@ -699,7 +694,7 @@ static u32 get_speed_setting(u8 speed, struct hpt_info *info) static void hpt3xx_set_mode(ide_drive_t *drive, const u8 speed) { - struct pci_dev *dev = HWIF(drive)->pci_dev; + struct pci_dev *dev = to_pci_dev(drive->hwif->dev); struct hpt_info *info = pci_get_drvdata(dev); struct hpt_timings *t = info->timings; u8 itr_addr = 0x40 + (drive->dn * 4); @@ -742,7 +737,7 @@ static void hpt3xx_quirkproc(ide_drive_t *drive) static void hpt3xx_maskproc(ide_drive_t *drive, int mask) { ide_hwif_t *hwif = HWIF(drive); - struct pci_dev *dev = hwif->pci_dev; + struct pci_dev *dev = to_pci_dev(hwif->dev); struct hpt_info *info = pci_get_drvdata(dev); if (drive->quirk_list) { @@ -765,7 +760,7 @@ static void hpt3xx_maskproc(ide_drive_t *drive, int mask) } } else outb(mask ? (drive->ctl | 2) : (drive->ctl & ~2), - IDE_CONTROL_REG); + hwif->io_ports[IDE_CONTROL_OFFSET]); } /* @@ -774,14 +769,14 @@ static void hpt3xx_maskproc(ide_drive_t *drive, int mask) */ static void hpt366_dma_lost_irq(ide_drive_t *drive) { - struct pci_dev *dev = HWIF(drive)->pci_dev; + struct pci_dev *dev = to_pci_dev(drive->hwif->dev); u8 mcr1 = 0, mcr3 = 0, scr1 = 0; pci_read_config_byte(dev, 0x50, &mcr1); pci_read_config_byte(dev, 0x52, &mcr3); pci_read_config_byte(dev, 0x5a, &scr1); printk("%s: (%s) mcr1=0x%02x, mcr3=0x%02x, scr1=0x%02x\n", - drive->name, __FUNCTION__, mcr1, mcr3, scr1); + drive->name, __func__, mcr1, mcr3, scr1); if (scr1 & 0x10) pci_write_config_byte(dev, 0x5a, scr1 & ~0x10); ide_dma_lost_irq(drive); @@ -790,18 +785,20 @@ static void hpt366_dma_lost_irq(ide_drive_t *drive) static void hpt370_clear_engine(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); + struct pci_dev *dev = to_pci_dev(hwif->dev); - pci_write_config_byte(hwif->pci_dev, hwif->select_data, 0x37); + pci_write_config_byte(dev, hwif->select_data, 0x37); udelay(10); } static void hpt370_irq_timeout(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); + struct pci_dev *dev = to_pci_dev(hwif->dev); u16 bfifo = 0; u8 dma_cmd; - pci_read_config_word(hwif->pci_dev, hwif->select_data + 2, &bfifo); + pci_read_config_word(dev, hwif->select_data + 2, &bfifo); printk(KERN_DEBUG "%s: %d bytes in FIFO\n", drive->name, bfifo & 0x1ff); /* get DMA command mode */ @@ -844,10 +841,11 @@ static void hpt370_dma_timeout(ide_drive_t *drive) static int hpt374_ide_dma_test_irq(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); + struct pci_dev *dev = to_pci_dev(hwif->dev); u16 bfifo = 0; u8 dma_stat; - pci_read_config_word(hwif->pci_dev, hwif->select_data + 2, &bfifo); + pci_read_config_word(dev, hwif->select_data + 2, &bfifo); if (bfifo & 0x1FF) { // printk("%s: %d bytes in FIFO\n", drive->name, bfifo); return 0; @@ -860,14 +858,14 @@ static int hpt374_ide_dma_test_irq(ide_drive_t *drive) if (!drive->waiting_for_dma) printk(KERN_WARNING "%s: (%s) called while not waiting\n", - drive->name, __FUNCTION__); + drive->name, __func__); return 0; } static int hpt374_ide_dma_end(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); - struct pci_dev *dev = hwif->pci_dev; + struct pci_dev *dev = to_pci_dev(hwif->dev); u8 mcr = 0, mcr_addr = hwif->select_data; u8 bwsr = 0, mask = hwif->channel ? 0x02 : 0x01; @@ -931,64 +929,6 @@ static void hpt3xxn_rw_disk(ide_drive_t *drive, struct request *rq) hpt3xxn_set_clock(HWIF(drive), rq_data_dir(rq) ? 0x23 : 0x21); } -/* - * Set/get power state for a drive. - * NOTE: affects both drives on each channel. - * - * When we turn the power back on, we need to re-initialize things. - */ -#define TRISTATE_BIT 0x8000 - -static int hpt3xx_busproc(ide_drive_t *drive, int state) -{ - ide_hwif_t *hwif = HWIF(drive); - struct pci_dev *dev = hwif->pci_dev; - u8 mcr_addr = hwif->select_data + 2; - u8 resetmask = hwif->channel ? 0x80 : 0x40; - u8 bsr2 = 0; - u16 mcr = 0; - - hwif->bus_state = state; - - /* Grab the status. */ - pci_read_config_word(dev, mcr_addr, &mcr); - pci_read_config_byte(dev, 0x59, &bsr2); - - /* - * Set the state. We don't set it if we don't need to do so. - * Make sure that the drive knows that it has failed if it's off. - */ - switch (state) { - case BUSSTATE_ON: - if (!(bsr2 & resetmask)) - return 0; - hwif->drives[0].failures = hwif->drives[1].failures = 0; - - pci_write_config_byte(dev, 0x59, bsr2 & ~resetmask); - pci_write_config_word(dev, mcr_addr, mcr & ~TRISTATE_BIT); - return 0; - case BUSSTATE_OFF: - if ((bsr2 & resetmask) && !(mcr & TRISTATE_BIT)) - return 0; - mcr &= ~TRISTATE_BIT; - break; - case BUSSTATE_TRISTATE: - if ((bsr2 & resetmask) && (mcr & TRISTATE_BIT)) - return 0; - mcr |= TRISTATE_BIT; - break; - default: - return -EINVAL; - } - - hwif->drives[0].failures = hwif->drives[0].max_failures + 1; - hwif->drives[1].failures = hwif->drives[1].max_failures + 1; - - pci_write_config_word(dev, mcr_addr, mcr); - pci_write_config_byte(dev, 0x59, bsr2 | resetmask); - return 0; -} - /** * hpt37x_calibrate_dpll - calibrate the DPLL * @dev: PCI device @@ -1276,28 +1216,61 @@ static unsigned int __devinit init_chipset_hpt366(struct pci_dev *dev, const cha return dev->irq; } +static u8 __devinit hpt3xx_cable_detect(ide_hwif_t *hwif) +{ + struct pci_dev *dev = to_pci_dev(hwif->dev); + struct hpt_info *info = pci_get_drvdata(dev); + u8 chip_type = info->chip_type; + u8 scr1 = 0, ata66 = hwif->channel ? 0x01 : 0x02; + + /* + * The HPT37x uses the CBLID pins as outputs for MA15/MA16 + * address lines to access an external EEPROM. To read valid + * cable detect state the pins must be enabled as inputs. + */ + if (chip_type == HPT374 && (PCI_FUNC(dev->devfn) & 1)) { + /* + * HPT374 PCI function 1 + * - set bit 15 of reg 0x52 to enable TCBLID as input + * - set bit 15 of reg 0x56 to enable FCBLID as input + */ + u8 mcr_addr = hwif->select_data + 2; + u16 mcr; + + pci_read_config_word(dev, mcr_addr, &mcr); + pci_write_config_word(dev, mcr_addr, (mcr | 0x8000)); + /* now read cable id register */ + pci_read_config_byte(dev, 0x5a, &scr1); + pci_write_config_word(dev, mcr_addr, mcr); + } else if (chip_type >= HPT370) { + /* + * HPT370/372 and 374 pcifn 0 + * - clear bit 0 of reg 0x5b to enable P/SCBLID as inputs + */ + u8 scr2 = 0; + + pci_read_config_byte(dev, 0x5b, &scr2); + pci_write_config_byte(dev, 0x5b, (scr2 & ~1)); + /* now read cable id register */ + pci_read_config_byte(dev, 0x5a, &scr1); + pci_write_config_byte(dev, 0x5b, scr2); + } else + pci_read_config_byte(dev, 0x5a, &scr1); + + return (scr1 & ata66) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; +} + static void __devinit init_hwif_hpt366(ide_hwif_t *hwif) { - struct pci_dev *dev = hwif->pci_dev; + struct pci_dev *dev = to_pci_dev(hwif->dev); struct hpt_info *info = pci_get_drvdata(dev); int serialize = HPT_SERIALIZE_IO; - u8 scr1 = 0, ata66 = hwif->channel ? 0x01 : 0x02; u8 chip_type = info->chip_type; u8 new_mcr, old_mcr = 0; /* Cache the channel's MISC. control registers' offset */ hwif->select_data = hwif->channel ? 0x54 : 0x50; - hwif->set_pio_mode = &hpt3xx_set_pio_mode; - hwif->set_dma_mode = &hpt3xx_set_mode; - - hwif->quirkproc = &hpt3xx_quirkproc; - hwif->maskproc = &hpt3xx_maskproc; - hwif->busproc = &hpt3xx_busproc; - - hwif->udma_filter = &hpt3xx_udma_filter; - hwif->mdma_filter = &hpt3xx_mdma_filter; - /* * HPT3xxN chips have some complications: * @@ -1343,43 +1316,6 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif) if (hwif->dma_base == 0) return; - /* - * The HPT37x uses the CBLID pins as outputs for MA15/MA16 - * address lines to access an external EEPROM. To read valid - * cable detect state the pins must be enabled as inputs. - */ - if (chip_type == HPT374 && (PCI_FUNC(dev->devfn) & 1)) { - /* - * HPT374 PCI function 1 - * - set bit 15 of reg 0x52 to enable TCBLID as input - * - set bit 15 of reg 0x56 to enable FCBLID as input - */ - u8 mcr_addr = hwif->select_data + 2; - u16 mcr; - - pci_read_config_word (dev, mcr_addr, &mcr); - pci_write_config_word(dev, mcr_addr, (mcr | 0x8000)); - /* now read cable id register */ - pci_read_config_byte (dev, 0x5a, &scr1); - pci_write_config_word(dev, mcr_addr, mcr); - } else if (chip_type >= HPT370) { - /* - * HPT370/372 and 374 pcifn 0 - * - clear bit 0 of reg 0x5b to enable P/SCBLID as inputs - */ - u8 scr2 = 0; - - pci_read_config_byte (dev, 0x5b, &scr2); - pci_write_config_byte(dev, 0x5b, (scr2 & ~1)); - /* now read cable id register */ - pci_read_config_byte (dev, 0x5a, &scr1); - pci_write_config_byte(dev, 0x5b, scr2); - } else - pci_read_config_byte (dev, 0x5a, &scr1); - - if (hwif->cbl != ATA_CBL_PATA40_SHORT) - hwif->cbl = (scr1 & ata66) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; - if (chip_type >= HPT374) { hwif->ide_dma_test_irq = &hpt374_ide_dma_test_irq; hwif->ide_dma_end = &hpt374_ide_dma_end; @@ -1391,14 +1327,17 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif) hwif->dma_lost_irq = &hpt366_dma_lost_irq; } -static void __devinit init_dma_hpt366(ide_hwif_t *hwif, unsigned long dmabase) +static int __devinit init_dma_hpt366(ide_hwif_t *hwif, + const struct ide_port_info *d) { - struct pci_dev *dev = hwif->pci_dev; - u8 masterdma = 0, slavedma = 0; - u8 dma_new = 0, dma_old = 0; - unsigned long flags; + struct pci_dev *dev = to_pci_dev(hwif->dev); + unsigned long flags, base = ide_pci_dma_base(hwif, d); + u8 dma_old, dma_new, masterdma = 0, slavedma = 0; + + if (base == 0 || ide_pci_set_master(dev, d->name) < 0) + return -1; - dma_old = inb(dmabase + 2); + dma_old = inb(base + 2); local_irq_save(flags); @@ -1409,11 +1348,21 @@ static void __devinit init_dma_hpt366(ide_hwif_t *hwif, unsigned long dmabase) if (masterdma & 0x30) dma_new |= 0x20; if ( slavedma & 0x30) dma_new |= 0x40; if (dma_new != dma_old) - outb(dma_new, dmabase + 2); + outb(dma_new, base + 2); local_irq_restore(flags); - ide_setup_dma(hwif, dmabase, 8); + printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n", + hwif->name, base, base + 7); + + hwif->extra_base = base + (hwif->channel ? 8 : 16); + + if (ide_allocate_dma_engine(hwif)) + return -1; + + ide_setup_dma(hwif, base); + + return 0; } static void __devinit hpt374_init(struct pci_dev *dev, struct pci_dev *dev2) @@ -1469,6 +1418,16 @@ static int __devinit hpt36x_init(struct pci_dev *dev, struct pci_dev *dev2) IDE_HFLAG_ABUSE_SET_DMA_MODE | \ IDE_HFLAG_OFF_BOARD) +static const struct ide_port_ops hpt3xx_port_ops = { + .set_pio_mode = hpt3xx_set_pio_mode, + .set_dma_mode = hpt3xx_set_mode, + .quirkproc = hpt3xx_quirkproc, + .maskproc = hpt3xx_maskproc, + .mdma_filter = hpt3xx_mdma_filter, + .udma_filter = hpt3xx_udma_filter, + .cable_detect = hpt3xx_cable_detect, +}; + static const struct ide_port_info hpt366_chipsets[] __devinitdata = { { /* 0 */ .name = "HPT36x", @@ -1482,7 +1441,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = { * Bit 4 is for the primary channel, bit 5 for the secondary. */ .enablebits = {{0x50,0x10,0x10}, {0x54,0x04,0x04}}, - .extra = 240, + .port_ops = &hpt3xx_port_ops, .host_flags = IDE_HFLAGS_HPT3XX | IDE_HFLAG_SINGLE, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, @@ -1492,7 +1451,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = { .init_hwif = init_hwif_hpt366, .init_dma = init_dma_hpt366, .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, - .extra = 240, + .port_ops = &hpt3xx_port_ops, .host_flags = IDE_HFLAGS_HPT3XX, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, @@ -1502,7 +1461,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = { .init_hwif = init_hwif_hpt366, .init_dma = init_dma_hpt366, .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, - .extra = 240, + .port_ops = &hpt3xx_port_ops, .host_flags = IDE_HFLAGS_HPT3XX, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, @@ -1512,7 +1471,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = { .init_hwif = init_hwif_hpt366, .init_dma = init_dma_hpt366, .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, - .extra = 240, + .port_ops = &hpt3xx_port_ops, .host_flags = IDE_HFLAGS_HPT3XX, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, @@ -1523,7 +1482,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = { .init_dma = init_dma_hpt366, .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, .udma_mask = ATA_UDMA5, - .extra = 240, + .port_ops = &hpt3xx_port_ops, .host_flags = IDE_HFLAGS_HPT3XX, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, @@ -1533,7 +1492,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = { .init_hwif = init_hwif_hpt366, .init_dma = init_dma_hpt366, .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, - .extra = 240, + .port_ops = &hpt3xx_port_ops, .host_flags = IDE_HFLAGS_HPT3XX, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, @@ -1564,10 +1523,12 @@ static int __devinit hpt366_init_one(struct pci_dev *dev, const struct pci_devic if (rev < 3) info = &hpt36x; else { - static const struct hpt_info *hpt37x_info[] = - { &hpt370, &hpt370a, &hpt372, &hpt372n }; - - info = hpt37x_info[min_t(u8, rev, 6) - 3]; + switch (min_t(u8, rev, 6)) { + case 3: info = &hpt370; break; + case 4: info = &hpt370a; break; + case 5: info = &hpt372; break; + case 6: info = &hpt372n; break; + } idx++; } break; @@ -1608,7 +1569,7 @@ static int __devinit hpt366_init_one(struct pci_dev *dev, const struct pci_devic hpt374_init(dev, dev2); else { if (hpt36x_init(dev, dev2)) - d.host_flags |= IDE_HFLAG_BOOTABLE; + d.host_flags &= ~IDE_HFLAG_NON_BOOTABLE; } ret = ide_setup_pci_devices(dev, dev2, &d); @@ -1620,7 +1581,7 @@ static int __devinit hpt366_init_one(struct pci_dev *dev, const struct pci_devic return ide_setup_pci_device(dev, &d); } -static const struct pci_device_id hpt366_pci_tbl[] = { +static const struct pci_device_id hpt366_pci_tbl[] __devinitconst = { { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT366), 0 }, { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT372), 1 }, { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT302), 2 },