X-Git-Url: http://ftp.safe.ca/?a=blobdiff_plain;f=drivers%2Fata%2Fpata_hpt366.c;h=f2b83eabc7c7cd2bb59ba198df4f5c85b7b20355;hb=2d5e94d7ca315f859a0eee1366838e8ad34dd7b2;hp=e54a0c51681d69890445b2005efda433b13d5f69;hpb=669a5db411d85a14f86cd92bc16bf7ab5b8aa235;p=safe%2Fjmp%2Flinux-2.6 diff --git a/drivers/ata/pata_hpt366.c b/drivers/ata/pata_hpt366.c index e54a0c5..f2b83ea 100644 --- a/drivers/ata/pata_hpt366.c +++ b/drivers/ata/pata_hpt366.c @@ -27,7 +27,7 @@ #include #define DRV_NAME "pata_hpt366" -#define DRV_VERSION "0.5" +#define DRV_VERSION "0.6.2" struct hpt_clock { u8 xfer_speed; @@ -151,24 +151,14 @@ static const char *bad_ata66_3[] = { static int hpt_dma_blacklisted(const struct ata_device *dev, char *modestr, const char *list[]) { - unsigned char model_num[40]; - char *s; - unsigned int len; + unsigned char model_num[ATA_ID_PROD_LEN + 1]; int i = 0; - ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS, sizeof(model_num)); - s = &model_num[0]; - len = strnlen(s, sizeof(model_num)); + ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num)); - /* ATAPI specifies that empty space is blank-filled; remove blanks */ - while ((len > 0) && (s[len - 1] == ' ')) { - len--; - s[len] = 0; - } - - while(list[i] != NULL) { - if (!strncmp(list[i], s, len)) { - printk(KERN_WARNING DRV_NAME ": %s is not supported for %s.\n", + while (list[i] != NULL) { + if (!strcmp(list[i], model_num)) { + printk(KERN_WARNING DRV_NAME ": %s is not supported for %s.\n", modestr, list[i]); return 1; } @@ -179,23 +169,22 @@ static int hpt_dma_blacklisted(const struct ata_device *dev, char *modestr, cons /** * hpt366_filter - mode selection filter - * @ap: ATA interface * @adev: ATA device * * Block UDMA on devices that cause trouble with this controller. */ - -static unsigned long hpt366_filter(const struct ata_port *ap, struct ata_device *adev, unsigned long mask) + +static unsigned long hpt366_filter(struct ata_device *adev, unsigned long mask) { if (adev->class == ATA_DEV_ATA) { if (hpt_dma_blacklisted(adev, "UDMA", bad_ata33)) mask &= ~ATA_MASK_UDMA; if (hpt_dma_blacklisted(adev, "UDMA3", bad_ata66_3)) - mask &= ~(0x07 << ATA_SHIFT_UDMA); + mask &= ~(0xF8 << ATA_SHIFT_UDMA); if (hpt_dma_blacklisted(adev, "UDMA4", bad_ata66_4)) - mask &= ~(0x0F << ATA_SHIFT_UDMA); + mask &= ~(0xF0 << ATA_SHIFT_UDMA); } - return ata_pci_default_filter(ap, adev, mask); + return ata_bmdma_mode_filter(adev, mask); } /** @@ -206,11 +195,11 @@ static unsigned long hpt366_filter(const struct ata_port *ap, struct ata_device * Return the 32bit register programming information for this channel * that matches the speed provided. */ - + static u32 hpt36x_find_mode(struct ata_port *ap, int speed) { struct hpt_clock *clocks = ap->host->private_data; - + while(clocks->xfer_speed) { if (clocks->xfer_speed == speed) return clocks->timing; @@ -219,30 +208,16 @@ static u32 hpt36x_find_mode(struct ata_port *ap, int speed) BUG(); return 0xffffffffU; /* silence compiler warning */ } - -static int hpt36x_pre_reset(struct ata_port *ap) + +static int hpt36x_cable_detect(struct ata_port *ap) { u8 ata66; struct pci_dev *pdev = to_pci_dev(ap->host->dev); - + pci_read_config_byte(pdev, 0x5A, &ata66); if (ata66 & (1 << ap->port_no)) - ap->cbl = ATA_CBL_PATA40; - else - ap->cbl = ATA_CBL_PATA80; - return ata_std_prereset(ap); -} - -/** - * hpt36x_error_handler - reset the hpt36x bus - * @ap: ATA port to reset - * - * Perform the reset handling for the 366/368 - */ - -static void hpt36x_error_handler(struct ata_port *ap) -{ - ata_bmdma_drive_eh(ap, hpt36x_pre_reset, ata_std_softreset, NULL, ata_std_postreset); + return ATA_CBL_PATA40; + return ATA_CBL_PATA80; } /** @@ -250,9 +225,9 @@ static void hpt36x_error_handler(struct ata_port *ap) * @ap: ATA interface * @adev: device on the interface * - * Perform PIO mode setup. + * Perform PIO mode setup. */ - + static void hpt366_set_piomode(struct ata_port *ap, struct ata_device *adev) { struct pci_dev *pdev = to_pci_dev(ap->host->dev); @@ -263,14 +238,14 @@ static void hpt366_set_piomode(struct ata_port *ap, struct ata_device *adev) addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); addr2 = 0x51 + 4 * ap->port_no; - + /* Fast interrupt prediction disable, hold off interrupt disable */ pci_read_config_byte(pdev, addr2, &fast); if (fast & 0x80) { fast &= ~0x80; pci_write_config_byte(pdev, addr2, fast); } - + pci_read_config_dword(pdev, addr1, ®); mode = hpt36x_find_mode(ap, adev->pio_mode); mode &= ~0x8000000; /* No FIFO in PIO */ @@ -287,7 +262,7 @@ static void hpt366_set_piomode(struct ata_port *ap, struct ata_device *adev) * Set up the channel for MWDMA or UDMA modes. Much the same as with * PIO, load the mode number and then set MWDMA or UDMA flag. */ - + static void hpt366_set_dmamode(struct ata_port *ap, struct ata_device *adev) { struct pci_dev *pdev = to_pci_dev(ap->host->dev); @@ -298,14 +273,14 @@ static void hpt366_set_dmamode(struct ata_port *ap, struct ata_device *adev) addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); addr2 = 0x51 + 4 * ap->port_no; - + /* Fast interrupt prediction disable, hold off interrupt disable */ pci_read_config_byte(pdev, addr2, &fast); if (fast & 0x80) { fast &= ~0x80; pci_write_config_byte(pdev, addr2, fast); } - + pci_read_config_dword(pdev, addr1, ®); mode = hpt36x_find_mode(ap, adev->dma_mode); mode |= 0x8000000; /* FIFO in MWDMA or UDMA */ @@ -315,61 +290,41 @@ static void hpt366_set_dmamode(struct ata_port *ap, struct ata_device *adev) } static struct scsi_host_template hpt36x_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .max_sectors = ATA_MAX_SECTORS, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; /* * Configuration for HPT366/68 */ - + static struct ata_port_operations hpt366_port_ops = { - .port_disable = ata_port_disable, + .inherits = &ata_bmdma_port_ops, + .cable_detect = hpt36x_cable_detect, + .mode_filter = hpt366_filter, .set_piomode = hpt366_set_piomode, .set_dmamode = hpt366_set_dmamode, - .mode_filter = hpt366_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = hpt36x_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .eng_timeout = ata_eng_timeout, - .data_xfer = ata_pio_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - - .port_start = ata_port_start, - .port_stop = ata_port_stop, - .host_stop = ata_host_stop -}; +}; + +/** + * hpt36x_init_chipset - common chip setup + * @dev: PCI device + * + * Perform the chip setup work that must be done at both init and + * resume time + */ + +static void hpt36x_init_chipset(struct pci_dev *dev) +{ + u8 drive_fast; + pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, (L1_CACHE_BYTES / 4)); + pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x78); + pci_write_config_byte(dev, PCI_MIN_GNT, 0x08); + pci_write_config_byte(dev, PCI_MAX_LAT, 0x08); + + pci_read_config_byte(dev, 0x51, &drive_fast); + if (drive_fast & 0x80) + pci_write_config_byte(dev, 0x51, drive_fast & ~0x80); +} /** * hpt36x_init_one - Initialise an HPT366/368 @@ -391,69 +346,85 @@ static struct ata_port_operations hpt366_port_ops = { * HPT37x/30x 4 (HPT366) 3+ Other driver * */ - + static int hpt36x_init_one(struct pci_dev *dev, const struct pci_device_id *id) { - static struct ata_port_info info_hpt366 = { - .sht = &hpt36x_sht, - .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, + static const struct ata_port_info info_hpt366 = { + .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, - .udma_mask = 0x1f, + .udma_mask = ATA_UDMA4, .port_ops = &hpt366_port_ops }; - struct ata_port_info *port_info[2] = {&info_hpt366, &info_hpt366}; + const struct ata_port_info *ppi[] = { &info_hpt366, NULL }; + void *hpriv = NULL; u32 class_rev; u32 reg1; - u8 drive_fast; + int rc; + + rc = pcim_enable_device(dev); + if (rc) + return rc; pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); class_rev &= 0xFF; - + /* May be a later chip in disguise. Check */ /* Newer chips are not in the HPT36x driver. Ignore them */ if (class_rev > 2) return -ENODEV; - pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, (L1_CACHE_BYTES / 4)); - pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x78); - pci_write_config_byte(dev, PCI_MIN_GNT, 0x08); - pci_write_config_byte(dev, PCI_MAX_LAT, 0x08); - - pci_read_config_byte(dev, 0x51, &drive_fast); - if (drive_fast & 0x80) - pci_write_config_byte(dev, 0x51, drive_fast & ~0x80); + hpt36x_init_chipset(dev); pci_read_config_dword(dev, 0x40, ®1); - + /* PCI clocking determines the ATA timing values to use */ /* info_hpt366 is safe against re-entry so we can scribble on it */ - switch(reg1 & 0x700) { + switch((reg1 & 0x700) >> 8) { case 5: - info_hpt366.private_data = &hpt366_40; + hpriv = &hpt366_40; break; case 9: - info_hpt366.private_data = &hpt366_25; + hpriv = &hpt366_25; break; default: - info_hpt366.private_data = &hpt366_33; + hpriv = &hpt366_33; break; } /* Now kick off ATA set up */ - return ata_pci_init_one(dev, port_info, 2); + return ata_pci_sff_init_one(dev, ppi, &hpt36x_sht, hpriv); } -static struct pci_device_id hpt36x[] = { - { PCI_DEVICE(PCI_VENDOR_ID_TTI, PCI_DEVICE_ID_TTI_HPT366), }, - { 0, }, +#ifdef CONFIG_PM +static int hpt36x_reinit_one(struct pci_dev *dev) +{ + struct ata_host *host = dev_get_drvdata(&dev->dev); + int rc; + + rc = ata_pci_device_do_resume(dev); + if (rc) + return rc; + hpt36x_init_chipset(dev); + ata_host_resume(host); + return 0; +} +#endif + +static const struct pci_device_id hpt36x[] = { + { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT366), }, + { }, }; static struct pci_driver hpt36x_pci_driver = { - .name = DRV_NAME, + .name = DRV_NAME, .id_table = hpt36x, .probe = hpt36x_init_one, - .remove = ata_pci_remove_one + .remove = ata_pci_remove_one, +#ifdef CONFIG_PM + .suspend = ata_pci_device_suspend, + .resume = hpt36x_reinit_one, +#endif }; static int __init hpt36x_init(void) @@ -461,13 +432,11 @@ static int __init hpt36x_init(void) return pci_register_driver(&hpt36x_pci_driver); } - static void __exit hpt36x_exit(void) { pci_unregister_driver(&hpt36x_pci_driver); } - MODULE_AUTHOR("Alan Cox"); MODULE_DESCRIPTION("low-level driver for the Highpoint HPT366/368"); MODULE_LICENSE("GPL");