X-Git-Url: http://ftp.safe.ca/?a=blobdiff_plain;f=arch%2Fmips%2FKconfig;h=9d839a9c4b1a10f62b9f938e7ed013509a04178d;hb=8bfa79fcb81d2bdb043f60ab4171704467808b55;hp=8ac03cfcb2d2fa58eeef9ae32d7162b189a13a57;hpb=0ae12797581a25832aea7011192d023a348ae5ab;p=safe%2Fjmp%2Flinux-2.6 diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 8ac03cf..9d839a9 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -4,233 +4,184 @@ config MIPS # Horrible source of confusion. Die, die, die ... select EMBEDDED -# shouldn't it be per-subarchitecture? -config ARCH_MAY_HAVE_PC_FDC - bool - default y - mainmenu "Linux/MIPS Kernel Configuration" -source "init/Kconfig" - -config CPU_MIPS32 - bool - default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 - -config CPU_MIPS64 - bool - default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 - -config CPU_MIPSR1 - bool - default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 - -config CPU_MIPSR2 - bool - default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 - -config SYS_SUPPORTS_32BIT_KERNEL - bool -config SYS_SUPPORTS_64BIT_KERNEL - bool -config CPU_SUPPORTS_32BIT_KERNEL - bool -config CPU_SUPPORTS_64BIT_KERNEL - bool - -menu "Kernel type" - -choice - - prompt "Kernel code model" - help - You should only select this option if you have a workload that - actually benefits from 64-bit processing or if your machine has - large memory. You will only be presented a single option in this - menu if your system does not support both 32-bit and 64-bit kernels. - -config 32BIT - bool "32-bit kernel" - depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL - select TRAD_SIGNALS - help - Select this option if you want to build a 32-bit kernel. - -config 64BIT - bool "64-bit kernel" - depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL - help - Select this option if you want to build a 64-bit kernel. - -endchoice - -endmenu - menu "Machine selection" -config MACH_JAZZ - bool "Support for the Jazz family of machines" - select ARC - select ARC32 - select GENERIC_ISA_DMA - select I8259 - select ISA - select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL - help - This a family of machines based on the MIPS R4030 chipset which was - used by several vendors to build RISC/os and Windows NT workstations. - Members include the Acer PICA, MIPS Magnum 4000, MIPS Millenium and - Olivetti M700-10 workstations. +choice + prompt "System type" + default SGI_IP22 -config ACER_PICA_61 - bool "Support for Acer PICA 1 chipset (EXPERIMENTAL)" - depends on MACH_JAZZ && EXPERIMENTAL +config MIPS_MTX1 + bool "4G Systems MTX-1 board" select DMA_NONCOHERENT - help - This is a machine with a R4400 133/150 MHz CPU. To compile a Linux - kernel that runs on these, say Y here. For details about Linux on - the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at - . + select HW_HAS_PCI + select RESOURCES_64BIT if PCI + select SOC_AU1500 + select SYS_HAS_CPU_MIPS32_R1 + select SYS_SUPPORTS_LITTLE_ENDIAN -config MIPS_MAGNUM_4000 - bool "Support for MIPS Magnum 4000" - depends on MACH_JAZZ +config MIPS_BOSPORUS + bool "AMD Alchemy Bosporus board" + select SOC_AU1500 select DMA_NONCOHERENT - help - This is a machine with a R4000 100 MHz CPU. To compile a Linux - kernel that runs on these, say Y here. For details about Linux on - the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at - . + select SYS_HAS_CPU_MIPS32_R1 + select SYS_SUPPORTS_LITTLE_ENDIAN -config OLIVETTI_M700 - bool "Support for Olivetti M700-10" - depends on MACH_JAZZ +config MIPS_PB1000 + bool "AMD Alchemy PB1000 board" + select SOC_AU1000 select DMA_NONCOHERENT - help - This is a machine with a R4000 100 MHz CPU. To compile a Linux - kernel that runs on these, say Y here. For details about Linux on - the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at - . - -config MACH_VR41XX - bool "Support for NEC VR4100 series based machines" - select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL + select HW_HAS_PCI + select RESOURCES_64BIT if PCI + select SWAP_IO_SPACE + select SYS_HAS_CPU_MIPS32_R1 + select SYS_SUPPORTS_LITTLE_ENDIAN -config NEC_CMBVR4133 - bool "Support for NEC CMB-VR4133" - depends on MACH_VR41XX - select CPU_VR41XX +config MIPS_PB1100 + bool "AMD Alchemy PB1100 board" + select SOC_AU1100 select DMA_NONCOHERENT - select IRQ_CPU select HW_HAS_PCI + select RESOURCES_64BIT if PCI + select SWAP_IO_SPACE + select SYS_HAS_CPU_MIPS32_R1 + select SYS_SUPPORTS_LITTLE_ENDIAN -config ROCKHOPPER - bool "Support for Rockhopper baseboard" - depends on NEC_CMBVR4133 - select I8259 - select HAVE_STD_PC_SERIAL_PORT +config MIPS_PB1500 + bool "AMD Alchemy PB1500 board" + select SOC_AU1500 + select DMA_NONCOHERENT + select HW_HAS_PCI + select RESOURCES_64BIT if PCI + select SYS_HAS_CPU_MIPS32_R1 + select SYS_SUPPORTS_LITTLE_ENDIAN -config CASIO_E55 - bool "Support for CASIO CASSIOPEIA E-10/15/55/65" - depends on MACH_VR41XX - select CPU_LITTLE_ENDIAN +config MIPS_PB1550 + bool "AMD Alchemy PB1550 board" + select SOC_AU1550 select DMA_NONCOHERENT - select IRQ_CPU - select ISA + select HW_HAS_PCI + select MIPS_DISABLE_OBSOLETE_IDE + select RESOURCES_64BIT if PCI + select SYS_HAS_CPU_MIPS32_R1 + select SYS_SUPPORTS_LITTLE_ENDIAN -config IBM_WORKPAD - bool "Support for IBM WorkPad z50" - depends on MACH_VR41XX - select CPU_LITTLE_ENDIAN +config MIPS_PB1200 + bool "AMD Alchemy PB1200 board" + select SOC_AU1200 select DMA_NONCOHERENT - select IRQ_CPU - select ISA + select MIPS_DISABLE_OBSOLETE_IDE + select RESOURCES_64BIT if PCI + select SYS_HAS_CPU_MIPS32_R1 + select SYS_SUPPORTS_LITTLE_ENDIAN -config TANBAC_TB022X - bool "Support for TANBAC VR4131 multichip module and TANBAC VR4131DIMM" - depends on MACH_VR41XX - select CPU_LITTLE_ENDIAN +config MIPS_DB1000 + bool "AMD Alchemy DB1000 board" + select SOC_AU1000 select DMA_NONCOHERENT - select IRQ_CPU select HW_HAS_PCI - help - The TANBAC VR4131 multichip module(TB0225) and - the TANBAC VR4131DIMM(TB0229) are MIPS-based platforms - manufactured by TANBAC. - Please refer to - about VR4131 multichip module and VR4131DIMM. - -config TANBAC_TB0226 - bool "Support for TANBAC Mbase(TB0226)" - depends on TANBAC_TB022X - select GPIO_VR41XX - help - The TANBAC Mbase(TB0226) is a MIPS-based platform manufactured by TANBAC. - Please refer to about Mbase. - -config TANBAC_TB0287 - bool "Support for TANBAC Mini-ITX DIMM base(TB0287)" - depends on TANBAC_TB022X - help - The TANBAC Mini-ITX DIMM base(TB0287) is a MIPS-based platform manufactured by TANBAC. - Please refer to about Mini-ITX DIMM base. + select RESOURCES_64BIT if PCI + select SYS_HAS_CPU_MIPS32_R1 + select SYS_SUPPORTS_LITTLE_ENDIAN -config VICTOR_MPC30X - bool "Support for Victor MP-C303/304" - depends on MACH_VR41XX - select CPU_LITTLE_ENDIAN +config MIPS_DB1100 + bool "AMD Alchemy DB1100 board" + select SOC_AU1100 select DMA_NONCOHERENT - select IRQ_CPU - select HW_HAS_PCI + select SYS_HAS_CPU_MIPS32_R1 + select SYS_SUPPORTS_LITTLE_ENDIAN -config ZAO_CAPCELLA - bool "Support for ZAO Networks Capcella" - depends on MACH_VR41XX - select CPU_LITTLE_ENDIAN +config MIPS_DB1500 + bool "AMD Alchemy DB1500 board" + select SOC_AU1500 select DMA_NONCOHERENT - select IRQ_CPU select HW_HAS_PCI + select MIPS_DISABLE_OBSOLETE_IDE + select RESOURCES_64BIT if PCI + select SYS_HAS_CPU_MIPS32_R1 + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_LITTLE_ENDIAN -config PCI_VR41XX - bool "Add PCI control unit support of NEC VR4100 series" - depends on MACH_VR41XX && HW_HAS_PCI - default y - select PCI +config MIPS_DB1550 + bool "AMD Alchemy DB1550 board" + select SOC_AU1550 + select HW_HAS_PCI + select DMA_NONCOHERENT + select MIPS_DISABLE_OBSOLETE_IDE + select RESOURCES_64BIT if PCI + select SYS_HAS_CPU_MIPS32_R1 + select SYS_SUPPORTS_LITTLE_ENDIAN -config VRC4173 - tristate "Add NEC VRC4173 companion chip support" - depends on MACH_VR41XX && PCI_VR41XX - ---help--- - The NEC VRC4173 is a companion chip for NEC VR4122/VR4131. +config MIPS_DB1200 + bool "AMD Alchemy DB1200 board" + select SOC_AU1200 + select DMA_COHERENT + select MIPS_DISABLE_OBSOLETE_IDE + select SYS_HAS_CPU_MIPS32_R1 + select SYS_SUPPORTS_LITTLE_ENDIAN -config TOSHIBA_JMR3927 - bool "Support for Toshiba JMR-TX3927 board" +config MIPS_MIRAGE + bool "AMD Alchemy Mirage board" select DMA_NONCOHERENT + select SOC_AU1500 + select SYS_HAS_CPU_MIPS32_R1 + select SYS_SUPPORTS_LITTLE_ENDIAN + +config BASLER_EXCITE + bool "Basler eXcite smart camera support" + select DMA_COHERENT select HW_HAS_PCI - select SWAP_IO_SPACE + select IRQ_CPU + select IRQ_CPU_RM7K + select IRQ_CPU_RM9K + select MIPS_RM9122 + select SYS_HAS_CPU_RM9000 select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_64BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + help + The eXcite is a smart camera platform manufactured by + Basler Vision Technologies AG + +config BASLER_EXCITE_PROTOTYPE + bool "Support for pre-release units" + depends on BASLER_EXCITE + default n + help + Pre-series (prototype) units are different from later ones in + some ways. Select this option if you have one of these. Please + note that a kernel built with this option selected will not be + able to run on normal units. config MIPS_COBALT - bool "Support for Cobalt Server" - depends on EXPERIMENTAL + bool "Cobalt Server" select DMA_NONCOHERENT select HW_HAS_PCI select I8259 select IRQ_CPU + select MIPS_GT64111 + select SYS_HAS_CPU_NEVADA select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL + select SYS_SUPPORTS_LITTLE_ENDIAN + select GENERIC_HARDIRQS_NO__DO_IRQ config MACH_DECSTATION - bool "Support for DECstations" + bool "DECstations" select BOOT_ELF32 select DMA_NONCOHERENT select EARLY_PRINTK select IRQ_CPU + select SYS_HAS_CPU_R3000 + select SYS_HAS_CPU_R4X00 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL - ---help--- + select SYS_SUPPORTS_LITTLE_ENDIAN + select SYS_SUPPORTS_128HZ + select SYS_SUPPORTS_256HZ + select SYS_SUPPORTS_1024HZ + help This enables support for DEC's MIPS based workstations. For details see the Linux/MIPS FAQ on and the DECstation porting pages on . @@ -246,14 +197,15 @@ config MACH_DECSTATION otherwise choose R3000. config MIPS_EV64120 - bool "Support for Galileo EV64120 Evaluation board (EXPERIMENTAL)" + bool "Galileo EV64120 Evaluation board (EXPERIMENTAL)" depends on EXPERIMENTAL select DMA_NONCOHERENT - select IRQ_CPU select HW_HAS_PCI select MIPS_GT64120 + select SYS_HAS_CPU_R5000 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN help This is an evaluation board based on the Galileo GT-64120 single-chip system controller that contains a MIPS R5000 compatible @@ -261,176 +213,186 @@ config MIPS_EV64120 . Say Y here if you wish to build a kernel for this platform. -config EVB_PCI1 - bool "Enable Second PCI (PCI1)" - depends on MIPS_EV64120 - -config MIPS_EV96100 - bool "Support for Galileo EV96100 Evaluation board (EXPERIMENTAL)" - depends on EXPERIMENTAL - select DMA_NONCOHERENT - select HW_HAS_PCI - select IRQ_CPU - select MIPS_GT96100 - select RM7000_CPU_SCACHE - select SWAP_IO_SPACE - select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_64BIT_KERNEL - help - This is an evaluation board based on the Galileo GT-96100 LAN/WAN - communications controllers containing a MIPS R5000 compatible core - running at 83MHz. Their website is . Say Y - here if you wish to build a kernel for this platform. - -config MIPS_IVR - bool "Support for Globespan IVR board" - select DMA_NONCOHERENT - select HW_HAS_PCI +config MACH_JAZZ + bool "Jazz family of machines" + select ARC + select ARC32 + select ARCH_MAY_HAVE_PC_FDC + select GENERIC_ISA_DMA + select I8253 + select I8259 + select ISA + select SYS_HAS_CPU_R4X00 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL + select SYS_SUPPORTS_100HZ + select GENERIC_HARDIRQS_NO__DO_IRQ help - This is an evaluation board built by Globespan to showcase thir - iVR (Internet Video Recorder) design. It utilizes a QED RM5231 - R5000 MIPS core. More information can be found out their website - located at . Say Y here if you wish to - build a kernel for this platform. + This a family of machines based on the MIPS R4030 chipset which was + used by several vendors to build RISC/os and Windows NT workstations. + Members include the Acer PICA, MIPS Magnum 4000, MIPS Millenium and + Olivetti M700-10 workstations. config LASAT - bool "Support for LASAT Networks platforms" + bool "LASAT Networks platforms" select DMA_NONCOHERENT select HW_HAS_PCI select MIPS_GT64120 + select MIPS_NILE4 select R5000_CPU_SCACHE + select SYS_HAS_CPU_R5000 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL - -config PICVUE - tristate "PICVUE LCD display driver" - depends on LASAT - -config PICVUE_PROC - tristate "PICVUE LCD display driver /proc interface" - depends on PICVUE - -config DS1603 - bool "DS1603 RTC driver" - depends on LASAT - -config LASAT_SYSCTL - bool "LASAT sysctl interface" - depends on LASAT - -config MIPS_ITE8172 - bool "Support for ITE 8172G board" - select DMA_NONCOHERENT - select HW_HAS_PCI - select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL - help - Ths is an evaluation board made by ITE - with ATX form factor that utilizes a MIPS R5000 to work with its - ITE8172G companion internet appliance chip. The MIPS core can be - either a NEC Vr5432 or QED RM5231. Say Y here if you wish to build - a kernel for this platform. - -config IT8172_REVC - bool "Support for older IT8172 (Rev C)" - depends on MIPS_ITE8172 - help - Say Y here to support the older, Revision C version of the Integrated - Technology Express, Inc. ITE8172 SBC. Vendor page at - ; picture of the - board at . + select SYS_SUPPORTS_LITTLE_ENDIAN + select GENERIC_HARDIRQS_NO__DO_IRQ config MIPS_ATLAS - bool "Support for MIPS Atlas board" + bool "MIPS Atlas board" select BOOT_ELF32 select DMA_NONCOHERENT + select IRQ_CPU select HW_HAS_PCI + select MIPS_BOARDS_GEN + select MIPS_BONITO64 select MIPS_GT64120 + select MIPS_MSC select RM7000_CPU_SCACHE select SWAP_IO_SPACE + select SYS_HAS_CPU_MIPS32_R1 + select SYS_HAS_CPU_MIPS32_R2 + select SYS_HAS_CPU_MIPS64_R1 + select SYS_HAS_CPU_NEVADA + select SYS_HAS_CPU_RM7000 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_LITTLE_ENDIAN + select SYS_SUPPORTS_MULTITHREADING if EXPERIMENTAL + select GENERIC_HARDIRQS_NO__DO_IRQ help This enables support for the MIPS Technologies Atlas evaluation board. config MIPS_MALTA - bool "Support for MIPS Malta board" + bool "MIPS Malta board" + select ARCH_MAY_HAVE_PC_FDC select BOOT_ELF32 select HAVE_STD_PC_SERIAL_PORT select DMA_NONCOHERENT - select IRQ_CPU select GENERIC_ISA_DMA + select IRQ_CPU select HW_HAS_PCI select I8259 + select MIPS_BOARDS_GEN + select MIPS_BONITO64 + select MIPS_CPU_SCACHE select MIPS_GT64120 + select MIPS_MSC select SWAP_IO_SPACE + select SYS_HAS_CPU_MIPS32_R1 + select SYS_HAS_CPU_MIPS32_R2 + select SYS_HAS_CPU_MIPS64_R1 + select SYS_HAS_CPU_NEVADA + select SYS_HAS_CPU_RM7000 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_LITTLE_ENDIAN + select SYS_SUPPORTS_MULTITHREADING help This enables support for the MIPS Technologies Malta evaluation board. config MIPS_SEAD - bool "Support for MIPS SEAD board (EXPERIMENTAL)" + bool "MIPS SEAD board (EXPERIMENTAL)" depends on EXPERIMENTAL select IRQ_CPU select DMA_NONCOHERENT + select MIPS_BOARDS_GEN + select SYS_HAS_CPU_MIPS32_R1 + select SYS_HAS_CPU_MIPS32_R2 + select SYS_HAS_CPU_MIPS64_R1 select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_64BIT_KERNEL + select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_LITTLE_ENDIAN help This enables support for the MIPS Technologies SEAD evaluation board. -config MOMENCO_OCELOT - bool "Support for Momentum Ocelot board" +config WR_PPMC + bool "Wind River PPMC board" + select IRQ_CPU + select BOOT_ELF32 select DMA_NONCOHERENT select HW_HAS_PCI - select IRQ_CPU - select IRQ_CPU_RM7K select MIPS_GT64120 - select RM7000_CPU_SCACHE select SWAP_IO_SPACE + select SYS_HAS_CPU_MIPS32_R1 + select SYS_HAS_CPU_MIPS32_R2 + select SYS_HAS_CPU_MIPS64_R1 + select SYS_HAS_CPU_NEVADA + select SYS_HAS_CPU_RM7000 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_LITTLE_ENDIAN help - The Ocelot is a MIPS-based Single Board Computer (SBC) made by - Momentum Computer . + This enables support for the Wind River MIPS32 4KC PPMC evaluation + board, which is based on GT64120 bridge chip. -config MOMENCO_OCELOT_G - bool "Support for Momentum Ocelot-G board" +config MIPS_SIM + bool 'MIPS simulator (MIPSsim)' + select DMA_NONCOHERENT + select IRQ_CPU + select SYS_HAS_CPU_MIPS32_R1 + select SYS_HAS_CPU_MIPS32_R2 + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_LITTLE_ENDIAN + help + This option enables support for MIPS Technologies MIPSsim software + emulator. + +config MOMENCO_JAGUAR_ATX + bool "Momentum Jaguar board" + select BOOT_ELF32 select DMA_NONCOHERENT select HW_HAS_PCI select IRQ_CPU select IRQ_CPU_RM7K + select IRQ_MV64340 + select LIMITED_DMA select PCI_MARVELL select RM7000_CPU_SCACHE select SWAP_IO_SPACE + select SYS_HAS_CPU_RM9000 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN help - The Ocelot is a MIPS-based Single Board Computer (SBC) made by + The Jaguar ATX is a MIPS-based Single Board Computer (SBC) made by Momentum Computer . -config MOMENCO_OCELOT_C - bool "Support for Momentum Ocelot-C board" +config MOMENCO_OCELOT + bool "Momentum Ocelot board" select DMA_NONCOHERENT select HW_HAS_PCI select IRQ_CPU - select IRQ_MV64340 - select PCI_MARVELL + select IRQ_CPU_RM7K + select MIPS_GT64120 select RM7000_CPU_SCACHE select SWAP_IO_SPACE + select SYS_HAS_CPU_RM7000 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN help The Ocelot is a MIPS-based Single Board Computer (SBC) made by Momentum Computer . config MOMENCO_OCELOT_3 - bool "Support for Momentum Ocelot-3 board" + bool "Momentum Ocelot-3 board" select BOOT_ELF32 select DMA_NONCOHERENT select HW_HAS_PCI @@ -440,106 +402,81 @@ config MOMENCO_OCELOT_3 select PCI_MARVELL select RM7000_CPU_SCACHE select SWAP_IO_SPACE + select SYS_HAS_CPU_RM9000 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN help The Ocelot-3 is based off Discovery III System Controller and PMC-Sierra Rm79000 core. -config MOMENCO_JAGUAR_ATX - bool "Support for Momentum Jaguar board" - select BOOT_ELF32 +config MOMENCO_OCELOT_C + bool "Momentum Ocelot-C board" select DMA_NONCOHERENT select HW_HAS_PCI select IRQ_CPU - select IRQ_CPU_RM7K select IRQ_MV64340 - select LIMITED_DMA select PCI_MARVELL select RM7000_CPU_SCACHE select SWAP_IO_SPACE + select SYS_HAS_CPU_RM7000 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + select GENERIC_HARDIRQS_NO__DO_IRQ help - The Jaguar ATX is a MIPS-based Single Board Computer (SBC) made by + The Ocelot is a MIPS-based Single Board Computer (SBC) made by Momentum Computer . -config JAGUAR_DMALOW - bool "Low DMA Mode" - depends on MOMENCO_JAGUAR_ATX - help - Select to Y if jump JP5 is set on your board, N otherwise. Normally - the jumper is set, so if you feel unsafe, just say Y. - -config PMC_YOSEMITE - bool "Support for PMC-Sierra Yosemite eval board" - select DMA_COHERENT +config MOMENCO_OCELOT_G + bool "Momentum Ocelot-G board" + select DMA_NONCOHERENT select HW_HAS_PCI select IRQ_CPU select IRQ_CPU_RM7K - select IRQ_CPU_RM9K + select PCI_MARVELL + select RM7000_CPU_SCACHE select SWAP_IO_SPACE + select SYS_HAS_CPU_RM7000 select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_64BIT_KERNEL + select SYS_SUPPORTS_64BIT_KERNEL if BROKEN + select SYS_SUPPORTS_BIG_ENDIAN help - Yosemite is an evaluation board for the RM9000x2 processor - manufactured by PMC-Sierra + The Ocelot is a MIPS-based Single Board Computer (SBC) made by + Momentum Computer . -config HYPERTRANSPORT - bool "Hypertransport Support for PMC-Sierra Yosemite" - depends on PMC_YOSEMITE +config MIPS_XXS1500 + bool "MyCable XXS1500 board" + select DMA_NONCOHERENT + select SOC_AU1500 + select SYS_SUPPORTS_LITTLE_ENDIAN config PNX8550_V2PCI - bool "Support for Philips PNX8550 based Viper2-PCI board" + bool "Philips PNX8550 based Viper2-PCI board" select PNX8550 select SYS_SUPPORTS_LITTLE_ENDIAN config PNX8550_JBS - bool "Support for Philips PNX8550 based JBS board" + bool "Philips PNX8550 based JBS board" select PNX8550 select SYS_SUPPORTS_LITTLE_ENDIAN -config DDB5074 - bool "Support for NEC DDB Vrc-5074 (EXPERIMENTAL)" - depends on EXPERIMENTAL - select DMA_NONCOHERENT - select HAVE_STD_PC_SERIAL_PORT - select HW_HAS_PCI - select IRQ_CPU - select I8259 - select ISA - select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_64BIT_KERNEL - help - This enables support for the VR5000-based NEC DDB Vrc-5074 - evaluation board. - -config DDB5476 - bool "Support for NEC DDB Vrc-5476" - select DMA_NONCOHERENT - select HAVE_STD_PC_SERIAL_PORT - select HW_HAS_PCI - select IRQ_CPU - select I8259 - select ISA - select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL - help - This enables support for the R5432-based NEC DDB Vrc-5476 - evaluation board. - - Features : kernel debugging, serial terminal, NFS root fs, on-board - ether port USB, AC97, PCI, PCI VGA card & framebuffer console, - IDE controller, PS2 keyboard, PS2 mouse, etc. +config PNX8550_STB810 + bool "Support for Philips PNX8550 based STB810 board" + select PNX8550 + select SYS_SUPPORTS_LITTLE_ENDIAN config DDB5477 - bool "Support for NEC DDB Vrc-5477" + bool "NEC DDB Vrc-5477" + select DDB5XXX_COMMON select DMA_NONCOHERENT select HW_HAS_PCI select I8259 select IRQ_CPU + select SYS_HAS_CPU_R5432 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL + select SYS_SUPPORTS_LITTLE_ENDIAN help This enables support for the R5432-based NEC DDB Vrc-5477, or Rockhopper/SolutionGear boards with R5432/R5500 CPUs. @@ -547,115 +484,112 @@ config DDB5477 Features : kernel debugging, serial terminal, NFS root fs, on-board ether port USB, AC97, PCI, etc. -config DDB5477_BUS_FREQUENCY - int "bus frequency (in kHZ, 0 for auto-detect)" - depends on DDB5477 - default 0 +config MACH_VR41XX + bool "NEC VR41XX-based machines" + select SYS_HAS_CPU_VR41XX + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL + select GENERIC_HARDIRQS_NO__DO_IRQ + +config PMC_YOSEMITE + bool "PMC-Sierra Yosemite eval board" + select DMA_COHERENT + select HW_HAS_PCI + select IRQ_CPU + select IRQ_CPU_RM7K + select IRQ_CPU_RM9K + select SWAP_IO_SPACE + select SYS_HAS_CPU_RM9000 + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_64BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_HIGHMEM + select SYS_SUPPORTS_SMP + help + Yosemite is an evaluation board for the RM9000x2 processor + manufactured by PMC-Sierra. config QEMU - bool "Support for Qemu" + bool "Qemu" select DMA_COHERENT select GENERIC_ISA_DMA select HAVE_STD_PC_SERIAL_PORT + select I8253 select I8259 select ISA select SWAP_IO_SPACE + select SYS_HAS_CPU_MIPS32_R1 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_LITTLE_ENDIAN + select ARCH_SPARSEMEM_ENABLE + select GENERIC_HARDIRQS_NO__DO_IRQ + help + Qemu is a software emulator which among other architectures also + can simulate a MIPS32 4Kc system. This patch adds support for the + system architecture that currently is being simulated by Qemu. It + will eventually be removed again when Qemu has the capability to + simulate actual MIPS hardware platforms. More information on Qemu + can be found at http://www.linux-mips.org/wiki/Qemu. + +config MARKEINS + bool "Support for NEC EMMA2RH Mark-eins" + select DMA_NONCOHERENT + select HW_HAS_PCI + select IRQ_CPU + select SWAP_IO_SPACE + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_LITTLE_ENDIAN + select SYS_HAS_CPU_R5000 help - Qemu is a software emulator which among other architectures also - can simulate a MIPS32 4Kc system. This patch adds support for the - system architecture that currently is being simulated by Qemu. It - will eventually be removed again when Qemu has the capability to - simulate actual MIPS hardware platforms. More information on Qemu - can be found at http://www.linux-mips.org/wiki/Qemu. + This enables support for the R5432-based NEC Mark-eins + boards with R5500 CPU. config SGI_IP22 - bool "Support for SGI IP22 (Indy/Indigo2)" + bool "SGI IP22 (Indy/Indigo2)" select ARC select ARC32 select BOOT_ELF32 select DMA_NONCOHERENT + select HW_HAS_EISA select IP22_CPU_SCACHE select IRQ_CPU + select GENERIC_ISA_DMA_SUPPORT_BROKEN select SWAP_IO_SPACE + select SYS_HAS_CPU_R4X00 + select SYS_HAS_CPU_R5000 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN help This are the SGI Indy, Challenge S and Indigo2, as well as certain OEM variants like the Tandem CMN B006S. To compile a Linux kernel that runs on these, say Y here. config SGI_IP27 - bool "Support for SGI IP27 (Origin200/2000)" + bool "SGI IP27 (Origin200/2000)" select ARC select ARC64 + select BOOT_ELF64 select DMA_IP27 + select EARLY_PRINTK select HW_HAS_PCI + select NR_CPUS_DEFAULT_64 select PCI_DOMAINS + select SYS_HAS_CPU_R10000 select SYS_SUPPORTS_64BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_NUMA + select SYS_SUPPORTS_SMP + select GENERIC_HARDIRQS_NO__DO_IRQ help This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics workstations. To compile a Linux kernel that runs on these, say Y here. -#config SGI_SN0_XXL -# bool "IP27 XXL" -# depends on SGI_IP27 -# This options adds support for userspace processes upto 16TB size. -# Normally the limit is just .5TB. - -config SGI_SN0_N_MODE - bool "IP27 N-Mode" - depends on SGI_IP27 - help - The nodes of Origin 200, Origin 2000 and Onyx 2 systems can be - configured in either N-Modes which allows for more nodes or M-Mode - which allows for more memory. Your system is most probably - running in M-Mode, so you should say N here. - -config ARCH_DISCONTIGMEM_ENABLE - bool - default y if SGI_IP27 - help - Say Y to upport efficient handling of discontiguous physical memory, - for architectures which are either NUMA (Non-Uniform Memory Access) - or have huge holes in the physical address space for other reasons. - See for more. - -config NUMA - bool "NUMA Support" - depends on SGI_IP27 - help - Say Y to compile the kernel to support NUMA (Non-Uniform Memory - Access). This option is for configuring high-end multiprocessor - server machines. If in doubt, say N. - -config MAPPED_KERNEL - bool "Mapped kernel support" - depends on SGI_IP27 - help - Change the way a Linux kernel is loaded into memory on a MIPS64 - machine. This is required in order to support text replication and - NUMA. If you need to understand it, read the source code. - -config REPLICATE_KTEXT - bool "Kernel text replication support" - depends on SGI_IP27 - help - Say Y here to enable replicating the kernel text across multiple - nodes in a NUMA cluster. This trades memory for speed. - -config REPLICATE_EXHANDLERS - bool "Exception handler replication support" - depends on SGI_IP27 - help - Say Y here to enable replicating the kernel exception handlers - across multiple nodes in a NUMA cluster. This trades memory for - speed. - config SGI_IP32 - bool "Support for SGI IP32 (O2) (EXPERIMENTAL)" + bool "SGI IP32 (O2) (EXPERIMENTAL)" depends on EXPERIMENTAL select ARC select ARC32 @@ -663,200 +597,220 @@ config SGI_IP32 select OWN_DMA select DMA_IP32 select DMA_NONCOHERENT - select HAS_TXX9_SERIAL select HW_HAS_PCI select R5000_CPU_SCACHE select RM7000_CPU_SCACHE + select SYS_HAS_CPU_R5000 + select SYS_HAS_CPU_R10000 if BROKEN + select SYS_HAS_CPU_RM7000 + select SYS_HAS_CPU_NEVADA select SYS_SUPPORTS_64BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN help If you want this kernel to run on SGI O2 workstation, say Y here. -config SOC_AU1200 - bool - select SOC_AU1X00 - -config SOC_AU1X00 - bool "Support for AMD/Alchemy Au1X00 SOCs" - select SYS_SUPPORTS_32BIT_KERNEL - -choice - prompt "Au1X00 SOC Type" - depends on SOC_AU1X00 - help - Say Y here to enable support for one of three AMD/Alchemy - SOCs. For additional documentation see www.amd.com. - -config SOC_AU1000 - bool "SOC_AU1000" -config SOC_AU1100 - bool "SOC_AU1100" -config SOC_AU1500 - bool "SOC_AU1500" -config SOC_AU1550 - bool "SOC_AU1550" - -config TOSHIBA_RBTX4938 - bool "Support for Toshiba RBTX4938 board" - select HAVE_STD_PC_SERIAL_PORT - select DMA_NONCOHERENT - select GENERIC_ISA_DMA - select HAS_TXX9_SERIAL - select HW_HAS_PCI - select I8259 - select ISA +config SIBYTE_BIGSUR + bool "Sibyte BCM91480B-BigSur" + select BOOT_ELF32 + select DMA_COHERENT + select NR_CPUS_DEFAULT_4 + select PCI_DOMAINS + select SIBYTE_BCM1x80 select SWAP_IO_SPACE - select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_LITTLE_ENDIAN + select SYS_HAS_CPU_SB1 select SYS_SUPPORTS_BIG_ENDIAN - select TOSHIBA_BOARDS - help - This Toshiba board is based on the TX4938 processor. Say Y here to - support this machine type - -endchoice - -choice - prompt "AMD/Alchemy Au1x00 board support" - depends on SOC_AU1X00 - help - These are evaluation boards built by AMD/Alchemy to - showcase their Au1X00 Internet Edge Processors. The SOC design - is based on the MIPS32 architecture running at 266/400/500MHz - with many integrated peripherals. Further information can be - found at their website, . Say Y here if you - wish to build a kernel for this platform. + select SYS_SUPPORTS_LITTLE_ENDIAN -config MIPS_PB1000 - bool "PB1000 board" - depends on SOC_AU1000 - select DMA_NONCOHERENT - select HW_HAS_PCI +config SIBYTE_SWARM + bool "Sibyte BCM91250A-SWARM" + select BOOT_ELF32 + select DMA_COHERENT + select NR_CPUS_DEFAULT_2 + select SIBYTE_SB1250 select SWAP_IO_SPACE + select SYS_HAS_CPU_SB1 + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_HIGHMEM + select SYS_SUPPORTS_LITTLE_ENDIAN -config MIPS_PB1100 - bool "PB1100 board" - depends on SOC_AU1100 - select DMA_NONCOHERENT - select HW_HAS_PCI +config SIBYTE_SENTOSA + bool "Sibyte BCM91250E-Sentosa" + depends on EXPERIMENTAL + select BOOT_ELF32 + select DMA_COHERENT + select NR_CPUS_DEFAULT_2 + select SIBYTE_SB1250 select SWAP_IO_SPACE + select SYS_HAS_CPU_SB1 + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_LITTLE_ENDIAN -config MIPS_PB1500 - bool "PB1500 board" - depends on SOC_AU1500 - select DMA_NONCOHERENT - select HW_HAS_PCI - -config MIPS_PB1550 - bool "PB1550 board" - depends on SOC_AU1550 +config SIBYTE_RHONE + bool "Sibyte BCM91125E-Rhone" + depends on EXPERIMENTAL + select BOOT_ELF32 select DMA_COHERENT - select HW_HAS_PCI - select MIPS_DISABLE_OBSOLETE_IDE - -config MIPS_PB1200 - bool "AMD Alchemy PB1200 board" - select SOC_AU1200 - select DMA_NONCOHERENT - select MIPS_DISABLE_OBSOLETE_IDE + select SIBYTE_BCM1125H + select SWAP_IO_SPACE + select SYS_HAS_CPU_SB1 select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_LITTLE_ENDIAN -config MIPS_DB1000 - bool "DB1000 board" - depends on SOC_AU1000 - select DMA_NONCOHERENT - select HW_HAS_PCI - -config MIPS_DB1100 - bool "DB1100 board" - depends on SOC_AU1100 - select DMA_NONCOHERENT - -config MIPS_DB1500 - bool "DB1500 board" - depends on SOC_AU1500 - select DMA_NONCOHERENT - select HW_HAS_PCI - select MIPS_DISABLE_OBSOLETE_IDE - -config MIPS_DB1550 - bool "DB1550 board" - depends on SOC_AU1550 - select HW_HAS_PCI - select DMA_NONCOHERENT - select MIPS_DISABLE_OBSOLETE_IDE - -config MIPS_BOSPORUS - bool "Bosporus board" - depends on SOC_AU1500 - select DMA_NONCOHERENT - -config MIPS_DB1200 - bool "AMD Alchemy DB1200 board" - select SOC_AU1200 - select DMA_NONCOHERENT - select MIPS_DISABLE_OBSOLETE_IDE +config SIBYTE_CARMEL + bool "Sibyte BCM91120x-Carmel" + depends on EXPERIMENTAL + select BOOT_ELF32 + select DMA_COHERENT + select SIBYTE_BCM1120 + select SWAP_IO_SPACE + select SYS_HAS_CPU_SB1 + select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_LITTLE_ENDIAN -config MIPS_MIRAGE - bool "Mirage board" - depends on SOC_AU1500 - select DMA_NONCOHERENT +config SIBYTE_PTSWARM + bool "Sibyte BCM91250PT-PTSWARM" + depends on EXPERIMENTAL + select BOOT_ELF32 + select DMA_COHERENT + select NR_CPUS_DEFAULT_2 + select SIBYTE_SB1250 + select SWAP_IO_SPACE + select SYS_HAS_CPU_SB1 + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_HIGHMEM + select SYS_SUPPORTS_LITTLE_ENDIAN -config MIPS_XXS1500 - bool "MyCable XXS1500 board" - depends on SOC_AU1500 - select DMA_NONCOHERENT +config SIBYTE_LITTLESUR + bool "Sibyte BCM91250C2-LittleSur" + depends on EXPERIMENTAL + select BOOT_ELF32 + select DMA_COHERENT + select NR_CPUS_DEFAULT_2 + select SIBYTE_SB1250 + select SWAP_IO_SPACE + select SYS_HAS_CPU_SB1 + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_HIGHMEM + select SYS_SUPPORTS_LITTLE_ENDIAN -config MIPS_MTX1 - bool "4G Systems MTX-1 board" - depends on SOC_AU1500 - select HW_HAS_PCI - select DMA_NONCOHERENT +config SIBYTE_CRHINE + bool "Sibyte BCM91120C-CRhine" + depends on EXPERIMENTAL + select BOOT_ELF32 + select DMA_COHERENT + select SIBYTE_BCM1120 + select SWAP_IO_SPACE + select SYS_HAS_CPU_SB1 + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_LITTLE_ENDIAN -endchoice +config SIBYTE_CRHONE + bool "Sibyte BCM91125C-CRhone" + depends on EXPERIMENTAL + select BOOT_ELF32 + select DMA_COHERENT + select SIBYTE_BCM1125 + select SWAP_IO_SPACE + select SYS_HAS_CPU_SB1 + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_HIGHMEM + select SYS_SUPPORTS_LITTLE_ENDIAN -config SNI_RM200_PCI - bool "Support for SNI RM200 PCI" - select ARC - select ARC32 +config SNI_RM + bool "SNI RM200/300/400" + select ARC if CPU_LITTLE_ENDIAN + select ARC32 if CPU_LITTLE_ENDIAN + select ARCH_MAY_HAVE_PC_FDC select BOOT_ELF32 select DMA_NONCOHERENT select GENERIC_ISA_DMA select HAVE_STD_PC_SERIAL_PORT + select HW_HAS_EISA select HW_HAS_PCI + select I8253 select I8259 select ISA + select SWAP_IO_SPACE if CPU_BIG_ENDIAN + select SYS_HAS_CPU_R4X00 + select SYS_HAS_CPU_R5000 + select R5000_CPU_SCACHE select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_HIGHMEM + select SYS_SUPPORTS_LITTLE_ENDIAN help - The SNI RM200 PCI was a MIPS-based platform manufactured by Siemens - Nixdorf Informationssysteme (SNI), parent company of Pyramid + The SNI RM200/300/400 are MIPS-based machines manufactured by + Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid Technology and now in turn merged with Fujitsu. Say Y here to support this machine type. +config TOSHIBA_JMR3927 + bool "Toshiba JMR-TX3927 board" + select DMA_NONCOHERENT + select HW_HAS_PCI + select MIPS_TX3927 + select SWAP_IO_SPACE + select SYS_HAS_CPU_TX39XX + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + select TOSHIBA_BOARDS + config TOSHIBA_RBTX4927 - bool "Support for Toshiba TBTX49[23]7 board" + bool "Toshiba TBTX49[23]7 board" select DMA_NONCOHERENT select HAS_TXX9_SERIAL select HW_HAS_PCI select I8259 select ISA select SWAP_IO_SPACE + select SYS_HAS_CPU_TX49XX select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + select TOSHIBA_BOARDS + select GENERIC_HARDIRQS_NO__DO_IRQ + help + This Toshiba board is based on the TX4927 processor. Say Y here to + support this machine type + +config TOSHIBA_RBTX4938 + bool "Toshiba RBTX4938 board" + select HAVE_STD_PC_SERIAL_PORT + select DMA_NONCOHERENT + select GENERIC_ISA_DMA + select HAS_TXX9_SERIAL + select HW_HAS_PCI + select I8259 + select ISA + select SWAP_IO_SPACE + select SYS_HAS_CPU_TX49XX + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_LITTLE_ENDIAN + select SYS_SUPPORTS_BIG_ENDIAN + select TOSHIBA_BOARDS + select GENERIC_HARDIRQS_NO__DO_IRQ help - This Toshiba board is based on the TX4927 processor. Say Y here to + This Toshiba board is based on the TX4938 processor. Say Y here to support this machine type -config TOSHIBA_FPCIB0 - bool "FPCIB0 Backplane Support" - depends on TOSHIBA_RBTX4927 +endchoice +source "arch/mips/ddb5xxx/Kconfig" +source "arch/mips/gt64120/ev64120/Kconfig" +source "arch/mips/jazz/Kconfig" +source "arch/mips/lasat/Kconfig" +source "arch/mips/momentum/Kconfig" +source "arch/mips/pmc-sierra/Kconfig" source "arch/mips/sgi-ip27/Kconfig" source "arch/mips/sibyte/Kconfig" +source "arch/mips/tx4927/Kconfig" source "arch/mips/tx4938/Kconfig" +source "arch/mips/vr41xx/Kconfig" source "arch/mips/philips/pnx8550/common/Kconfig" +source "arch/mips/cobalt/Kconfig" + +endmenu config RWSEM_GENERIC_SPINLOCK bool @@ -864,19 +818,47 @@ config RWSEM_GENERIC_SPINLOCK config RWSEM_XCHGADD_ALGORITHM bool - select HAS_TXX9_SERIAL + +config ARCH_HAS_ILOG2_U32 + bool + default n + +config ARCH_HAS_ILOG2_U64 + bool + default n + +config GENERIC_FIND_NEXT_BIT + bool + default y + +config GENERIC_HWEIGHT + bool + default y config GENERIC_CALIBRATE_DELAY bool default y +config GENERIC_TIME + bool + default y + +config SCHED_NO_NO_OMIT_FRAME_POINTER + bool + default y + +config GENERIC_HARDIRQS_NO__DO_IRQ + bool + default n + # # Select some configuration options automatically based on user selections. # config ARC bool - depends on SNI_RM200_PCI || SGI_IP32 || SGI_IP27 || SGI_IP22 || MIPS_MAGNUM_4000 || OLIVETTI_M700 || ACER_PICA_61 - default y + +config ARCH_MAY_HAVE_PC_FDC + bool config DMA_COHERENT bool @@ -895,51 +877,71 @@ config DMA_NONCOHERENT config DMA_NEED_PCI_MAP_STATE bool +config OWN_DMA + bool + config EARLY_PRINTK bool - depends on MACH_DECSTATION - default y config GENERIC_ISA_DMA bool - depends on SNI_RM200_PCI || MIPS_MAGNUM_4000 || OLIVETTI_M700 || ACER_PICA_61 || MIPS_MALTA - default y config I8259 bool - depends on SNI_RM200_PCI || DDB5477 || DDB5476 || DDB5074 || MACH_JAZZ || MIPS_MALTA || MIPS_COBALT - default y config LIMITED_DMA bool select HIGHMEM + select SYS_SUPPORTS_HIGHMEM config MIPS_BONITO64 bool - depends on MIPS_ATLAS || MIPS_MALTA - default y config MIPS_MSC bool - depends on MIPS_ATLAS || MIPS_MALTA - default y config MIPS_NILE4 bool - depends on LASAT - default y config MIPS_DISABLE_OBSOLETE_IDE bool -config CPU_LITTLE_ENDIAN - bool "Generate little endian code" - default y if ACER_PICA_61 || CASIO_E55 || DDB5074 || DDB5476 || DDB5477 || MACH_DECSTATION || IBM_WORKPAD || LASAT || MIPS_COBALT || MIPS_ITE8172 || MIPS_IVR || SOC_AU1X00 || OLIVETTI_M700 || SNI_RM200_PCI || VICTOR_MPC30X || ZAO_CAPCELLA - default n if MIPS_EV64120 || MIPS_EV96100 || MOMENCO_OCELOT || MOMENCO_OCELOT_G || SGI_IP22 || SGI_IP27 || SGI_IP32 || TOSHIBA_JMR3927 +config GENERIC_ISA_DMA_SUPPORT_BROKEN + bool + +# +# Endianess selection. Sufficiently obscure so many users don't know what to +# answer,so we try hard to limit the available choices. Also the use of a +# choice statement should be more obvious to the user. +# +choice + prompt "Endianess selection" help Some MIPS machines can be configured for either little or big endian - byte order. These modes require different kernels. Say Y if your - machine is little endian, N if it's a big endian machine. + byte order. These modes require different kernels and a different + Linux distribution. In general there is one preferred byteorder for a + particular system but some systems are just as commonly used in the + one or the other endianess. + +config CPU_BIG_ENDIAN + bool "Big endian" + depends on SYS_SUPPORTS_BIG_ENDIAN + +config CPU_LITTLE_ENDIAN + bool "Little endian" + depends on SYS_SUPPORTS_LITTLE_ENDIAN + help + +endchoice + +config SYS_SUPPORTS_APM_EMULATION + bool + +config SYS_SUPPORTS_BIG_ENDIAN + bool + +config SYS_SUPPORTS_LITTLE_ENDIAN + bool config IRQ_CPU bool @@ -947,42 +949,62 @@ config IRQ_CPU config IRQ_CPU_RM7K bool +config IRQ_CPU_RM9K + bool + config IRQ_MV64340 bool config DDB5XXX_COMMON bool - depends on DDB5074 || DDB5476 || DDB5477 - default y config MIPS_BOARDS_GEN bool - depends on MIPS_ATLAS || MIPS_MALTA || MIPS_SEAD - default y config MIPS_GT64111 bool - depends on MIPS_COBALT - default y config MIPS_GT64120 bool - depends on MIPS_EV64120 || MIPS_EV96100 || LASAT || MIPS_ATLAS || MIPS_MALTA || MOMENCO_OCELOT - default y config MIPS_TX3927 bool - depends on TOSHIBA_JMR3927 select HAS_TXX9_SERIAL - default y + +config MIPS_RM9122 + bool + select SERIAL_RM9000 + select GPI_RM9000 + select WDT_RM9000 config PCI_MARVELL bool -config ITE_BOARD_GEN +config SOC_AU1000 bool - depends on MIPS_IVR || MIPS_ITE8172 - default y + select SOC_AU1X00 + +config SOC_AU1100 + bool + select SOC_AU1X00 + +config SOC_AU1500 + bool + select SOC_AU1X00 + +config SOC_AU1550 + bool + select SOC_AU1X00 + +config SOC_AU1200 + bool + select SOC_AU1X00 + +config SOC_AU1X00 + bool + select SYS_HAS_CPU_MIPS32_R1 + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_APM_EMULATION config PNX8550 bool @@ -990,13 +1012,29 @@ config PNX8550 config SOC_PNX8550 bool - select SYS_SUPPORTS_32BIT_KERNEL select DMA_NONCOHERENT select HW_HAS_PCI + select SYS_HAS_CPU_MIPS32_R1 + select SYS_SUPPORTS_32BIT_KERNEL + select GENERIC_HARDIRQS_NO__DO_IRQ config SWAP_IO_SPACE bool +config EMMA2RH + bool + depends on MARKEINS + default y + +config SERIAL_RM9000 + bool + +config GPI_RM9000 + bool + +config WDT_RM9000 + bool + # # Unfortunately not all GT64120 systems run the chip at the same clock. # As the user for the clock rate and try to minimize the available options. @@ -1019,33 +1057,11 @@ config SYSCLK_100 endchoice -config AU1X00_USB_DEVICE - bool - depends on MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000 - default n - -config MIPS_GT96100 - bool - depends on MIPS_EV96100 - default y - help - Say Y here to support the Galileo Technology GT96100 communications - controller card. There is a web page at . - -config IT8172_CIR - bool - depends on MIPS_ITE8172 || MIPS_IVR - default y - -config IT8712 +config ARC32 bool - depends on MIPS_ITE8172 - default y config BOOT_ELF32 bool - depends on MACH_DECSTATION || MIPS_ATLAS || MIPS_MALTA || MOMENCO_JAGUAR_ATX || MOMENCO_OCELOT_3 || SIBYTE_SB1xxx_SOC || SGI_IP32 || SGI_IP22 || SNI_RM200_PCI - default y config MIPS_L1_CACHE_SHIFT int @@ -1053,49 +1069,31 @@ config MIPS_L1_CACHE_SHIFT default "7" if SGI_IP27 default "5" -config ARC32 - bool - depends on MACH_JAZZ || SNI_RM200_PCI || SGI_IP22 || SGI_IP32 - default y - config HAVE_STD_PC_SERIAL_PORT bool config ARC_CONSOLE bool "ARC console support" - depends on SGI_IP22 || SNI_RM200_PCI + depends on SGI_IP22 || SNI_RM config ARC_MEMORY bool - depends on MACH_JAZZ || SNI_RM200_PCI || SGI_IP32 + depends on MACH_JAZZ || SNI_RM || SGI_IP32 default y config ARC_PROMLIB bool - depends on MACH_JAZZ || SNI_RM200_PCI || SGI_IP22 || SGI_IP32 + depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP32 default y config ARC64 bool - depends on SGI_IP27 - default y config BOOT_ELF64 bool - depends on SGI_IP27 - default y - -#config MAPPED_PCI_IO y -# bool -# depends on SGI_IP27 -# default y config TOSHIBA_BOARDS bool - depends on TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 - default y - -endmenu menu "CPU selection" @@ -1105,10 +1103,13 @@ choice config CPU_MIPS32_R1 bool "MIPS32 Release 1" - select CPU_SUPPORTS_32BIT_KERNEL + depends on SYS_HAS_CPU_MIPS32_R1 + select CPU_HAS_LLSC select CPU_HAS_PREFETCH + select CPU_SUPPORTS_32BIT_KERNEL + select CPU_SUPPORTS_HIGHMEM help - Choose this option to build a kernel for release 2 or later of the + Choose this option to build a kernel for release 1 or later of the MIPS32 architecture. Most modern embedded systems with a 32-bit MIPS processor are based on a MIPS32 processor. If you know the specific type of processor in your system, choose those that one @@ -1120,10 +1121,13 @@ config CPU_MIPS32_R1 config CPU_MIPS32_R2 bool "MIPS32 Release 2" - select CPU_SUPPORTS_32BIT_KERNEL + depends on SYS_HAS_CPU_MIPS32_R2 + select CPU_HAS_LLSC select CPU_HAS_PREFETCH + select CPU_SUPPORTS_32BIT_KERNEL + select CPU_SUPPORTS_HIGHMEM help - Choose this option to build a kernel for release 1 or later of the + Choose this option to build a kernel for release 2 or later of the MIPS32 architecture. Most modern embedded systems with a 32-bit MIPS processor are based on a MIPS32 processor. If you know the specific type of processor in your system, choose those that one @@ -1131,9 +1135,12 @@ config CPU_MIPS32_R2 config CPU_MIPS64_R1 bool "MIPS64 Release 1" + depends on SYS_HAS_CPU_MIPS64_R1 + select CPU_HAS_LLSC + select CPU_HAS_PREFETCH select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL - select CPU_HAS_PREFETCH + select CPU_SUPPORTS_HIGHMEM help Choose this option to build a kernel for release 1 or later of the MIPS64 architecture. Many modern embedded systems with a 64-bit @@ -1147,9 +1154,12 @@ config CPU_MIPS64_R1 config CPU_MIPS64_R2 bool "MIPS64 Release 2" + depends on SYS_HAS_CPU_MIPS64_R2 + select CPU_HAS_LLSC + select CPU_HAS_PREFETCH select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL - select CPU_HAS_PREFETCH + select CPU_SUPPORTS_HIGHMEM help Choose this option to build a kernel for release 2 or later of the MIPS64 architecture. Many modern embedded systems with a 64-bit @@ -1159,7 +1169,10 @@ config CPU_MIPS64_R2 config CPU_R3000 bool "R3000" + depends on SYS_HAS_CPU_R3000 + select CPU_HAS_WB select CPU_SUPPORTS_32BIT_KERNEL + select CPU_SUPPORTS_HIGHMEM help Please make sure to pick the right CPU type. Linux/MIPS is not designed to be generic, i.e. Kernels compiled for R3000 CPUs will @@ -1170,20 +1183,24 @@ config CPU_R3000 config CPU_TX39XX bool "R39XX" + depends on SYS_HAS_CPU_TX39XX select CPU_SUPPORTS_32BIT_KERNEL config CPU_VR41XX bool "R41xx" + depends on SYS_HAS_CPU_VR41XX select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL help - The options selects support for the NEC VR41xx series of processors. + The options selects support for the NEC VR4100 series of processors. Only choose this option if you have one of these processors as a kernel built with this option will not run on any other type of processor or vice versa. config CPU_R4300 bool "R4300" + depends on SYS_HAS_CPU_R4300 + select CPU_HAS_LLSC select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL help @@ -1191,6 +1208,8 @@ config CPU_R4300 config CPU_R4X00 bool "R4x00" + depends on SYS_HAS_CPU_R4X00 + select CPU_HAS_LLSC select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL help @@ -1199,11 +1218,16 @@ config CPU_R4X00 config CPU_TX49XX bool "R49XX" + depends on SYS_HAS_CPU_TX49XX + select CPU_HAS_LLSC + select CPU_HAS_PREFETCH select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL config CPU_R5000 bool "R5000" + depends on SYS_HAS_CPU_R5000 + select CPU_HAS_LLSC select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL help @@ -1211,51 +1235,196 @@ config CPU_R5000 config CPU_R5432 bool "R5432" + depends on SYS_HAS_CPU_R5432 + select CPU_HAS_LLSC + select CPU_SUPPORTS_32BIT_KERNEL + select CPU_SUPPORTS_64BIT_KERNEL config CPU_R6000 bool "R6000" depends on EXPERIMENTAL + select CPU_HAS_LLSC + depends on SYS_HAS_CPU_R6000 select CPU_SUPPORTS_32BIT_KERNEL help MIPS Technologies R6000 and R6000A series processors. Note these - processors are extremly rare and the support for them is incomplete. + processors are extremely rare and the support for them is incomplete. + +config CPU_NEVADA + bool "RM52xx" + depends on SYS_HAS_CPU_NEVADA + select CPU_HAS_LLSC + select CPU_SUPPORTS_32BIT_KERNEL + select CPU_SUPPORTS_64BIT_KERNEL + help + QED / PMC-Sierra RM52xx-series ("Nevada") processors. + +config CPU_R8000 + bool "R8000" + depends on EXPERIMENTAL + depends on SYS_HAS_CPU_R8000 + select CPU_HAS_LLSC + select CPU_HAS_PREFETCH + select CPU_SUPPORTS_64BIT_KERNEL + help + MIPS Technologies R8000 processors. Note these processors are + uncommon and the support for them is incomplete. + +config CPU_R10000 + bool "R10000" + depends on SYS_HAS_CPU_R10000 + select CPU_HAS_LLSC + select CPU_HAS_PREFETCH + select CPU_SUPPORTS_32BIT_KERNEL + select CPU_SUPPORTS_64BIT_KERNEL + select CPU_SUPPORTS_HIGHMEM + help + MIPS Technologies R10000-series processors. + +config CPU_RM7000 + bool "RM7000" + depends on SYS_HAS_CPU_RM7000 + select CPU_HAS_LLSC + select CPU_HAS_PREFETCH + select CPU_SUPPORTS_32BIT_KERNEL + select CPU_SUPPORTS_64BIT_KERNEL + select CPU_SUPPORTS_HIGHMEM + +config CPU_RM9000 + bool "RM9000" + depends on SYS_HAS_CPU_RM9000 + select CPU_HAS_LLSC + select CPU_HAS_PREFETCH + select CPU_SUPPORTS_32BIT_KERNEL + select CPU_SUPPORTS_64BIT_KERNEL + select CPU_SUPPORTS_HIGHMEM + select WEAK_ORDERING + +config CPU_SB1 + bool "SB1" + depends on SYS_HAS_CPU_SB1 + select CPU_HAS_LLSC + select CPU_SUPPORTS_32BIT_KERNEL + select CPU_SUPPORTS_64BIT_KERNEL + select CPU_SUPPORTS_HIGHMEM + select WEAK_ORDERING + +endchoice + +config SYS_HAS_CPU_MIPS32_R1 + bool + +config SYS_HAS_CPU_MIPS32_R2 + bool + +config SYS_HAS_CPU_MIPS64_R1 + bool + +config SYS_HAS_CPU_MIPS64_R2 + bool + +config SYS_HAS_CPU_R3000 + bool + +config SYS_HAS_CPU_TX39XX + bool + +config SYS_HAS_CPU_VR41XX + bool + +config SYS_HAS_CPU_R4300 + bool + +config SYS_HAS_CPU_R4X00 + bool + +config SYS_HAS_CPU_TX49XX + bool + +config SYS_HAS_CPU_R5000 + bool + +config SYS_HAS_CPU_R5432 + bool + +config SYS_HAS_CPU_R6000 + bool + +config SYS_HAS_CPU_NEVADA + bool + +config SYS_HAS_CPU_R8000 + bool + +config SYS_HAS_CPU_R10000 + bool + +config SYS_HAS_CPU_RM7000 + bool + +config SYS_HAS_CPU_RM9000 + bool + +config SYS_HAS_CPU_SB1 + bool + +config WEAK_ORDERING + bool +endmenu + +# +# These two indicate any level of the MIPS32 and MIPS64 architecture +# +config CPU_MIPS32 + bool + default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 + +config CPU_MIPS64 + bool + default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 + +# +# These two indicate the revision of the architecture, either Release 1 or Release 2 +# +config CPU_MIPSR1 + bool + default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 + +config CPU_MIPSR2 + bool + default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 + +config SYS_SUPPORTS_32BIT_KERNEL + bool +config SYS_SUPPORTS_64BIT_KERNEL + bool +config CPU_SUPPORTS_32BIT_KERNEL + bool +config CPU_SUPPORTS_64BIT_KERNEL + bool + +menu "Kernel type" -config CPU_NEVADA - bool "RM52xx" - select CPU_SUPPORTS_32BIT_KERNEL - select CPU_SUPPORTS_64BIT_KERNEL - help - QED / PMC-Sierra RM52xx-series ("Nevada") processors. +choice -config CPU_R8000 - bool "R8000" - depends on EXPERIMENTAL - select CPU_SUPPORTS_64BIT_KERNEL + prompt "Kernel code model" help - MIPS Technologies R8000 processors. Note these processors are - uncommon and the support for them is incomplete. + You should only select this option if you have a workload that + actually benefits from 64-bit processing or if your machine has + large memory. You will only be presented a single option in this + menu if your system does not support both 32-bit and 64-bit kernels. -config CPU_R10000 - bool "R10000" - select CPU_SUPPORTS_32BIT_KERNEL - select CPU_SUPPORTS_64BIT_KERNEL +config 32BIT + bool "32-bit kernel" + depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL + select TRAD_SIGNALS help - MIPS Technologies R10000-series processors. - -config CPU_RM7000 - bool "RM7000" - select CPU_SUPPORTS_32BIT_KERNEL - select CPU_SUPPORTS_64BIT_KERNEL - -config CPU_RM9000 - bool "RM9000" - select CPU_SUPPORTS_32BIT_KERNEL - select CPU_SUPPORTS_64BIT_KERNEL - -config CPU_SB1 - bool "SB1" - select CPU_SUPPORTS_32BIT_KERNEL - select CPU_SUPPORTS_64BIT_KERNEL + Select this option if you want to build a 32-bit kernel. +config 64BIT + bool "64-bit kernel" + depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL + help + Select this option if you want to build a 64-bit kernel. endchoice @@ -1283,13 +1452,12 @@ config PAGE_SIZE_8KB config PAGE_SIZE_16KB bool "16kB" - depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX + depends on !CPU_R3000 && !CPU_TX39XX help Using 16kB page size will result in higher performance kernel at the price of higher memory consumption. This option is available on - all non-R3000 family processor. Not that at the time of this - writing this option is still high experimental; there are also - issues with compatibility of user applications. + all non-R3000 family processors. Note that you will need a suitable + Linux distribution to support this. config PAGE_SIZE_64KB bool "64kB" @@ -1298,8 +1466,7 @@ config PAGE_SIZE_64KB Using 64kB page size will result in higher performance kernel at the price of higher memory consumption. This option is available on all non-R3000 family processor. Not that at the time of this - writing this option is still high experimental; there are also - issues with compatibility of user applications. + writing this option is still high experimental. endchoice @@ -1310,6 +1477,13 @@ config IP22_CPU_SCACHE bool select BOARD_SCACHE +# +# Support for a MIPS32 / MIPS64 style S-caches +# +config MIPS_CPU_SCACHE + bool + select BOARD_SCACHE + config R5000_CPU_SCACHE bool select BOARD_SCACHE @@ -1329,16 +1503,80 @@ config SIBYTE_DMA_PAGEOPS config CPU_HAS_PREFETCH bool -config MIPS_MT - bool "Enable MIPS MT" +choice + prompt "MIPS MT options" + +config MIPS_MT_DISABLED + bool "Disable multithreading support." + help + Use this option if your workload can't take advantage of + MIPS hardware multithreading support. On systems that don't have + the option of an MT-enabled processor this option will be the only + option in this menu. + +config MIPS_MT_SMP + bool "Use 1 TC on each available VPE for SMP" + depends on SYS_SUPPORTS_MULTITHREADING + select CPU_MIPSR2_IRQ_VI + select CPU_MIPSR2_SRS + select MIPS_MT + select SMP + select SYS_SUPPORTS_SMP + help + This is a kernel model which is also known a VSMP or lately + has been marketesed into SMVP. + +config MIPS_MT_SMTC + bool "SMTC: Use all TCs on all VPEs for SMP" + depends on CPU_MIPS32_R2 + #depends on CPU_MIPS64_R2 # once there is hardware ... + depends on SYS_SUPPORTS_MULTITHREADING + select CPU_MIPSR2_IRQ_VI + select CPU_MIPSR2_SRS + select MIPS_MT + select NR_CPUS_DEFAULT_2 + select NR_CPUS_DEFAULT_8 + select SMP + select SYS_SUPPORTS_SMP + help + This is a kernel model which is known a SMTC or lately has been + marketesed into SMVP. config MIPS_VPE_LOADER bool "VPE loader support." - depends on MIPS_MT + depends on SYS_SUPPORTS_MULTITHREADING + select MIPS_MT help Includes a loader for loading an elf relocatable object onto another VPE and running it. +endchoice + +config MIPS_MT + bool + +config SYS_SUPPORTS_MULTITHREADING + bool + +config MIPS_MT_FPAFF + bool "Dynamic FPU affinity for FP-intensive threads" + depends on MIPS_MT + default y + +config MIPS_MT_SMTC_INSTANT_REPLAY + bool "Low-latency Dispatch of Deferred SMTC IPIs" + depends on MIPS_MT_SMTC + default y + help + SMTC pseudo-interrupts between TCs are deferred and queued + if the target TC is interrupt-inhibited (IXMT). In the first + SMTC prototypes, these queued IPIs were serviced on return + to user mode, or on entry into the kernel idle loop. The + INSTANT_REPLAY option dispatches them as part of local_irq_restore() + processing, which adds runtime overhead (hence the option to turn + it off), but ensures that IPIs are handled promptly even under + heavy I/O interrupt load. + config MIPS_VPE_LOADER_TOM bool "Load VPE program into memory hidden from linux" depends on MIPS_VPE_LOADER @@ -1351,8 +1589,19 @@ config MIPS_VPE_LOADER_TOM # this should possibly be in drivers/char, but it is rather cpu related. Hmmm config MIPS_VPE_APSP_API - bool "Enable support for AP/SP API (RTLX)" - depends on MIPS_VPE_LOADER + bool "Enable support for AP/SP API (RTLX)" + depends on MIPS_VPE_LOADER + help + +config MIPS_APSP_KSPD + bool "Enable KSPD" + depends on MIPS_VPE_APSP_API + default y + help + KSPD is a kernel daemon that accepts syscall requests from the SP + side, actions them and returns the results. It also handles the + "exit" syscall notifying other kernel modules the SP program is + exiting. You probably want to say yes here. config SB1_PASS_1_WORKAROUNDS bool @@ -1371,71 +1620,31 @@ config SB1_PASS_2_1_WORKAROUNDS config 64BIT_PHYS_ADDR bool "Support for 64-bit physical address space" - depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32_R1 || CPU_MIPS64_R1) && 32BIT - -config CPU_ADVANCED - bool "Override CPU Options" - depends on 32BIT - help - Saying yes here allows you to select support for various features - your CPU may or may not have. Most people should say N here. + depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32 || CPU_MIPS64) && 32BIT config CPU_HAS_LLSC - bool "ll/sc Instructions available" if CPU_ADVANCED - default y if !CPU_ADVANCED && !CPU_R3000 && !CPU_VR41XX && !CPU_TX39XX - help - MIPS R4000 series and later provide the Load Linked (ll) - and Store Conditional (sc) instructions. More information is - available at . - - Say Y here if your CPU has the ll and sc instructions. Say Y here - for better performance, N if you don't know. You must say Y here - for multiprocessor machines. - -config CPU_HAS_LLDSCD - bool "lld/scd Instructions available" if CPU_ADVANCED - default y if !CPU_ADVANCED && !CPU_R3000 && !CPU_VR41XX && !CPU_TX39XX && !CPU_MIPS32_R1 - help - Say Y here if your CPU has the lld and scd instructions, the 64-bit - equivalents of ll and sc. Say Y here for better performance, N if - you don't know. You must say Y here for multiprocessor machines. + bool config CPU_HAS_WB - bool "Writeback Buffer available" if CPU_ADVANCED - default y if !CPU_ADVANCED && CPU_R3000 && MACH_DECSTATION - help - Say N here for slightly better performance. You must say Y here for - machines which require flushing of write buffers in software. Saying - Y is the safe option; N may result in kernel malfunction and crashes. - -menu "MIPSR2 Interrupt handling" - depends on CPU_MIPSR2 && CPU_ADVANCED + bool +# +# Vectored interrupt mode is an R2 feature +# config CPU_MIPSR2_IRQ_VI - bool "Vectored interrupt mode" - help - Vectored interrupt mode allowing faster dispatching of interrupts. - The board support code needs to be written to take advantage of this - mode. Compatibility code is included to allow the kernel to run on - a CPU that does not support vectored interrupts. It's safe to - say Y here. + bool +# +# Extended interrupt mode is an R2 feature +# config CPU_MIPSR2_IRQ_EI - bool "External interrupt controller mode" - help - Extended interrupt mode takes advantage of an external interrupt - controller to allow fast dispatching from many possible interrupt - sources. Say N unless you know that external interrupt support is - required. + bool +# +# Shadow registers are an R2 feature +# config CPU_MIPSR2_SRS - bool "Make shadow set registers available for interrupt handlers" - depends on CPU_MIPSR2_IRQ_VI || CPU_MIPSR2_IRQ_EI - help - Allow the kernel to use shadow register sets for fast interrupts. - Interrupt handlers must be specially written to use shadow sets. - Say N unless you know that shadow register set upport is needed. -endmenu + bool config CPU_HAS_SYNC bool @@ -1443,6 +1652,20 @@ config CPU_HAS_SYNC default y # +# Use the generic interrupt handling code in kernel/irq/: +# +config GENERIC_HARDIRQS + bool + default y + +config GENERIC_IRQ_PROBE + bool + default y + +config IRQ_PER_CPU + bool + +# # - Highmem only makes sense for the 32-bit kernel. # - The current highmem code will only work properly on physically indexed # caches such as R3000, SB1, R7000 or those that look like they're virtually @@ -1451,25 +1674,62 @@ config CPU_HAS_SYNC # where it's known to be safe. This will not offer highmem on a few systems # such as MIPS32 and MIPS64 CPUs which may have virtual and physically # indexed CPUs but we're playing safe. -# - We should not offer highmem for system of which we already know that they -# don't have memory configurations that could gain from highmem support in -# the kernel because they don't support configurations with RAM at physical -# addresses > 0x20000000. +# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we +# know they might have memory configurations that could make use of highmem +# support. # config HIGHMEM bool "High Memory Support" - depends on 32BIT && (CPU_R3000 || CPU_SB1 || CPU_R7000 || CPU_RM9000 || CPU_R10000) && !(MACH_DECSTATION || MOMENCO_JAGUAR_ATX) + depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM + +config CPU_SUPPORTS_HIGHMEM + bool + +config SYS_SUPPORTS_HIGHMEM + bool config ARCH_FLATMEM_ENABLE def_bool y depends on !NUMA +config ARCH_DISCONTIGMEM_ENABLE + bool + default y if SGI_IP27 + help + Say Y to upport efficient handling of discontiguous physical memory, + for architectures which are either NUMA (Non-Uniform Memory Access) + or have huge holes in the physical address space for other reasons. + See for more. + +config ARCH_SPARSEMEM_ENABLE + bool + select SPARSEMEM_STATIC + +config NUMA + bool "NUMA Support" + depends on SYS_SUPPORTS_NUMA + help + Say Y to compile the kernel to support NUMA (Non-Uniform Memory + Access). This option improves performance on systems with more + than two nodes; on two node systems it is generally better to + leave it disabled; on single node systems disable this option + disabled. + +config SYS_SUPPORTS_NUMA + bool + +config NODES_SHIFT + int + default "6" + depends on NEED_MULTIPLE_NODES + source "mm/Kconfig" config SMP bool "Multi-Processing support" - depends on CPU_RM9000 || (SIBYTE_SB1250 && !SIBYTE_STANDALONE) || SGI_IP27 - ---help--- + depends on SYS_SUPPORTS_SMP + select IRQ_PER_CPU + help This enables support for systems with more than one CPU. If you have a system with only one CPU, like most personal computers, say N. If you have a system with more than one CPU, say Y. @@ -1488,12 +1748,37 @@ config SMP If you don't know what to do here, say N. +config SYS_SUPPORTS_SMP + bool + +config NR_CPUS_DEFAULT_2 + bool + +config NR_CPUS_DEFAULT_4 + bool + +config NR_CPUS_DEFAULT_8 + bool + +config NR_CPUS_DEFAULT_16 + bool + +config NR_CPUS_DEFAULT_32 + bool + +config NR_CPUS_DEFAULT_64 + bool + config NR_CPUS int "Maximum number of CPUs (2-64)" range 2 64 depends on SMP - default "64" if SGI_IP27 - default "2" + default "2" if NR_CPUS_DEFAULT_2 + default "4" if NR_CPUS_DEFAULT_4 + default "8" if NR_CPUS_DEFAULT_8 + default "16" if NR_CPUS_DEFAULT_16 + default "32" if NR_CPUS_DEFAULT_32 + default "64" if NR_CPUS_DEFAULT_64 help This allows you to specify the maximum number of CPUs which this kernel will support. The maximum supported value is 32 for 32-bit @@ -1503,6 +1788,77 @@ config NR_CPUS This is purely to save memory - each supported CPU adds approximately eight kilobytes to the kernel image. +# +# Timer Interrupt Frequency Configuration +# + +choice + prompt "Timer frequency" + default HZ_250 + help + Allows the configuration of the timer frequency. + + config HZ_48 + bool "48 HZ" if SYS_SUPPORTS_48HZ + + config HZ_100 + bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ + + config HZ_128 + bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ + + config HZ_250 + bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ + + config HZ_256 + bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ + + config HZ_1000 + bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ + + config HZ_1024 + bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ + +endchoice + +config SYS_SUPPORTS_48HZ + bool + +config SYS_SUPPORTS_100HZ + bool + +config SYS_SUPPORTS_128HZ + bool + +config SYS_SUPPORTS_250HZ + bool + +config SYS_SUPPORTS_256HZ + bool + +config SYS_SUPPORTS_1000HZ + bool + +config SYS_SUPPORTS_1024HZ + bool + +config SYS_SUPPORTS_ARBIT_HZ + bool + default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \ + !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \ + !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \ + !SYS_SUPPORTS_1024HZ + +config HZ + int + default 48 if HZ_48 + default 100 if HZ_100 + default 128 if HZ_128 + default 250 if HZ_250 + default 256 if HZ_256 + default 1000 if HZ_1000 + default 1024 if HZ_1024 + source "kernel/Kconfig.preempt" config RTC_DS1742 @@ -1519,14 +1875,60 @@ config MIPS_INSANE_LARGE This will result in additional memory usage, so it is not recommended for normal users. +config KEXEC + bool "Kexec system call (EXPERIMENTAL)" + depends on EXPERIMENTAL + help + kexec is a system call that implements the ability to shutdown your + current kernel, and to start another kernel. It is like a reboot + but it is indepedent of the system firmware. And like a reboot + you can start any kernel with it, not just Linux. + + The name comes from the similiarity to the exec system call. + + It is an ongoing process to be certain the hardware in a machine + is properly shutdown, so do not be surprised if this code does not + initially work for you. It may help to enable device hotplugging + support. As of this writing the exact hardware interface is + strongly in flux, so no good recommendation can be made. + +config SECCOMP + bool "Enable seccomp to safely compute untrusted bytecode" + depends on PROC_FS && BROKEN + default y + help + This kernel feature is useful for number crunching applications + that may need to compute untrusted bytecode during their + execution. By using pipes or other transports made available to + the process as file descriptors supporting the read/write + syscalls, it's possible to isolate those applications in + their own address space using seccomp. Once seccomp is + enabled via /proc//seccomp, it cannot be disabled + and the task is only allowed to execute a few safe syscalls + defined by each seccomp mode. + + If unsure, say Y. Only embedded should say N here. + +endmenu + config RWSEM_GENERIC_SPINLOCK bool default y -endmenu +config LOCKDEP_SUPPORT + bool + default y + +config STACKTRACE_SUPPORT + bool + default y + +source "init/Kconfig" menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" +config HW_HAS_EISA + bool config HW_HAS_PCI bool @@ -1560,8 +1962,9 @@ config ISA config EISA bool "EISA support" - depends on SGI_IP22 || SNI_RM200_PCI + depends on HW_HAS_EISA select ISA + select GENERIC_ISA_DMA ---help--- The Extended Industry Standard Architecture (EISA) bus was developed as an open alternative to the IBM MicroChannel bus. @@ -1594,10 +1997,7 @@ config MMU bool default y -config MCA - bool - -config SBUS +config I8253 bool source "drivers/pcmcia/Kconfig" @@ -1612,7 +2012,6 @@ source "fs/Kconfig.binfmt" config TRAD_SIGNALS bool - default y if 32BIT config BUILD_ELF64 bool "Use 64-bit ELF format for building" @@ -1631,7 +2030,7 @@ config BUILD_ELF64 config BINFMT_IRIX bool "Include IRIX binary compatibility" - depends on !CPU_LITTLE_ENDIAN && 32BIT && BROKEN + depends on CPU_BIG_ENDIAN && 32BIT && BROKEN config MIPS32_COMPAT bool "Kernel support for Linux/MIPS 32-bit binary compatibility" @@ -1646,6 +2045,11 @@ config COMPAT depends on MIPS32_COMPAT default y +config SYSVIPC_COMPAT + bool + depends on COMPAT && SYSVIPC + default y + config MIPS32_O32 bool "Kernel support for o32 binaries" depends on MIPS32_COMPAT @@ -1671,26 +2075,11 @@ config BINFMT_ELF32 bool default y if MIPS32_O32 || MIPS32_N32 -config SECCOMP - bool "Enable seccomp to safely compute untrusted bytecode" - depends on PROC_FS && BROKEN - default y - help - This kernel feature is useful for number crunching applications - that may need to compute untrusted bytecode during their - execution. By using pipes or other transports made available to - the process as file descriptors supporting the read/write - syscalls, it's possible to isolate those applications in - their own address space using seccomp. Once seccomp is - enabled via /proc//seccomp, it cannot be disabled - and the task is only allowed to execute a few safe syscalls - defined by each seccomp mode. +endmenu - If unsure, say Y. Only embedded should say N here. +menu "Power management options" -config PM - bool "Power Management support (EXPERIMENTAL)" - depends on EXPERIMENTAL && MACH_AU1X00 +source "kernel/power/Kconfig" endmenu @@ -1700,6 +2089,8 @@ source "drivers/Kconfig" source "fs/Kconfig" +source "arch/mips/oprofile/Kconfig" + source "arch/mips/Kconfig.debug" source "security/Kconfig" @@ -1707,18 +2098,3 @@ source "security/Kconfig" source "crypto/Kconfig" source "lib/Kconfig" - -# -# Use the generic interrupt handling code in kernel/irq/: -# -config GENERIC_HARDIRQS - bool - default y - -config GENERIC_IRQ_PROBE - bool - default y - -config ISA_DMA_API - bool - default y