X-Git-Url: http://ftp.safe.ca/?a=blobdiff_plain;f=arch%2Farm%2Fmach-omap2%2Fpowerdomain.c;h=a2904aa7065e6f47d6a4f531d4aca7ea6e9a0411;hb=6f68fbaafbaa033205cd131d3e1f3c4b914e9b78;hp=e9eeaa4fbd47ed7a498b2b92e84f26faf365ffea;hpb=1e3d0d2ba9ce1f975ca59d9a1048175f1e9c01ac;p=safe%2Fjmp%2Flinux-2.6 diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index e9eeaa4..a2904aa 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -5,8 +5,8 @@ * Copyright (C) 2007-2009 Nokia Corporation * * Written by Paul Walmsley - * * Added OMAP4 specific support by Abhijit Pagare + * State counting code by Tero Kristo * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -64,10 +64,10 @@ static u16 pwrstst_reg_offs; #define OMAP_MEM4_ONSTATE_MASK OMAP4430_OCP_NRET_BANK_ONSTATE_MASK /* OMAP3 and OMAP4 Memory Retstate Masks (common across all power domains) */ -#define OMAP_MEM0_RETSTATE_MASK OMAP3430_SHAREDL1CACHEFLATRETSTATE -#define OMAP_MEM1_RETSTATE_MASK OMAP3430_L1FLATMEMRETSTATE -#define OMAP_MEM2_RETSTATE_MASK OMAP3430_SHAREDL2CACHEFLATRETSTATE -#define OMAP_MEM3_RETSTATE_MASK OMAP3430_L2FLATMEMRETSTATE +#define OMAP_MEM0_RETSTATE_MASK OMAP3430_SHAREDL1CACHEFLATRETSTATE_MASK +#define OMAP_MEM1_RETSTATE_MASK OMAP3430_L1FLATMEMRETSTATE_MASK +#define OMAP_MEM2_RETSTATE_MASK OMAP3430_SHAREDL2CACHEFLATRETSTATE_MASK +#define OMAP_MEM3_RETSTATE_MASK OMAP3430_L2FLATMEMRETSTATE_MASK #define OMAP_MEM4_RETSTATE_MASK OMAP4430_OCP_NRET_BANK_RETSTATE_MASK /* OMAP3 and OMAP4 Memory Status bits */ @@ -125,6 +125,10 @@ static int _pwrdm_register(struct powerdomain *pwrdm) for (i = 0; i < PWRDM_MAX_PWRSTS; i++) pwrdm->state_counter[i] = 0; + pwrdm->ret_logic_off_counter = 0; + for (i = 0; i < pwrdm->banks; i++) + pwrdm->ret_mem_off_counter[i] = 0; + pwrdm_wait_transition(pwrdm); pwrdm->state = pwrdm_read_pwrst(pwrdm); pwrdm->state_counter[pwrdm->state] = 1; @@ -134,6 +138,25 @@ static int _pwrdm_register(struct powerdomain *pwrdm) return 0; } +static void _update_logic_membank_counters(struct powerdomain *pwrdm) +{ + int i; + u8 prev_logic_pwrst, prev_mem_pwrst; + + prev_logic_pwrst = pwrdm_read_prev_logic_pwrst(pwrdm); + if ((pwrdm->pwrsts_logic_ret == PWRSTS_OFF_RET) && + (prev_logic_pwrst == PWRDM_POWER_OFF)) + pwrdm->ret_logic_off_counter++; + + for (i = 0; i < pwrdm->banks; i++) { + prev_mem_pwrst = pwrdm_read_prev_mem_pwrst(pwrdm, i); + + if ((pwrdm->pwrsts_mem_ret[i] == PWRSTS_OFF_RET) && + (prev_mem_pwrst == PWRDM_POWER_OFF)) + pwrdm->ret_mem_off_counter[i]++; + } +} + static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag) { @@ -153,6 +176,8 @@ static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag) prev = pwrdm_read_prev_pwrst(pwrdm); if (pwrdm->state != prev) pwrdm->state_counter[prev]++; + if (prev == PWRDM_POWER_RET) + _update_logic_membank_counters(pwrdm); break; default: return -EINVAL; @@ -197,7 +222,7 @@ void pwrdm_init(struct powerdomain **pwrdm_list) { struct powerdomain **p = NULL; - if (cpu_is_omap24xx() | cpu_is_omap34xx()) { + if (cpu_is_omap24xx() || cpu_is_omap34xx()) { pwrstctrl_reg_offs = OMAP2_PM_PWSTCTRL; pwrstst_reg_offs = OMAP2_PM_PWSTST; } else if (cpu_is_omap44xx()) { @@ -486,6 +511,8 @@ int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) */ int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) { + u32 v; + if (!pwrdm) return -EINVAL; @@ -501,9 +528,9 @@ int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) * but the type of value returned is the same for each * powerdomain. */ - prm_rmw_mod_reg_bits(OMAP3430_LOGICL1CACHERETSTATE, - (pwrst << __ffs(OMAP3430_LOGICL1CACHERETSTATE)), - pwrdm->prcm_offs, pwrstctrl_reg_offs); + v = pwrst << __ffs(OMAP3430_LOGICL1CACHERETSTATE_MASK); + prm_rmw_mod_reg_bits(OMAP3430_LOGICL1CACHERETSTATE_MASK, v, + pwrdm->prcm_offs, pwrstctrl_reg_offs); return 0; } @@ -651,8 +678,8 @@ int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) if (!pwrdm) return -EINVAL; - return prm_read_mod_bits_shift(pwrdm->prcm_offs, - pwrstst_reg_offs, OMAP3430_LOGICSTATEST); + return prm_read_mod_bits_shift(pwrdm->prcm_offs, pwrstst_reg_offs, + OMAP3430_LOGICSTATEST_MASK); } /** @@ -675,7 +702,7 @@ int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm) * powerdomain. */ return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST, - OMAP3430_LASTLOGICSTATEENTERED); + OMAP3430_LASTLOGICSTATEENTERED_MASK); } /** @@ -698,7 +725,7 @@ int pwrdm_read_logic_retst(struct powerdomain *pwrdm) * powerdomain. */ return prm_read_mod_bits_shift(pwrdm->prcm_offs, pwrstctrl_reg_offs, - OMAP3430_LOGICSTATEST); + OMAP3430_LOGICSTATEST_MASK); } /** @@ -953,6 +980,34 @@ bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm) } /** + * pwrdm_set_lowpwrstchange - Request a low power state change + * @pwrdm: struct powerdomain * + * + * Allows a powerdomain to transtion to a lower power sleep state + * from an existing sleep state without waking up the powerdomain. + * Returns -EINVAL if the powerdomain pointer is null or if the + * powerdomain does not support LOWPOWERSTATECHANGE, or returns 0 + * upon success. + */ +int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm) +{ + if (!pwrdm) + return -EINVAL; + + if (!(pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) + return -EINVAL; + + pr_debug("powerdomain: %s: setting LOWPOWERSTATECHANGE bit\n", + pwrdm->name); + + prm_rmw_mod_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK, + (1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT), + pwrdm->prcm_offs, pwrstctrl_reg_offs); + + return 0; +} + +/** * pwrdm_wait_transition - wait for powerdomain power transition to finish * @pwrdm: struct powerdomain * to wait for * @@ -977,7 +1032,7 @@ int pwrdm_wait_transition(struct powerdomain *pwrdm) /* XXX Is this udelay() value meaningful? */ while ((prm_read_mod_reg(pwrdm->prcm_offs, pwrstst_reg_offs) & - OMAP_INTRANSITION) && + OMAP_INTRANSITION_MASK) && (c++ < PWRDM_TRANSITION_BAILOUT)) udelay(1);