include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...

[safe/jmp/linux-2.6] / sound / soc / codecs / tlv320dac33.c

diff --git a/sound/soc/codecs/tlv320dac33.c b/sound/soc/codecs/tlv320dac33.c
index c684aa2..d1e0e81 100644 (file)
--- a/sound/soc/codecs/tlv320dac33.c
+++ b/sound/soc/codecs/tlv320dac33.c
@@ -31,6 +31,7 @@
 #include <linux/interrupt.h>
 #include <linux/gpio.h>
 #include <linux/regulator/consumer.h>
+#include <linux/slab.h>
 #include <sound/core.h>
 #include <sound/pcm.h>
 #include <sound/pcm_params.h>
@@ -62,6 +63,7 @@ enum dac33_state {
 enum dac33_fifo_modes {
        DAC33_FIFO_BYPASS = 0,
        DAC33_FIFO_MODE1,
+       DAC33_FIFO_MODE7,
        DAC33_FIFO_LAST_MODE,
 };
 
@@ -90,6 +92,7 @@ struct tlv320dac33_priv {
                                         * this */
        enum dac33_fifo_modes fifo_mode;/* FIFO mode selection */
        unsigned int nsample;           /* burst read amount from host */
+       u8 burst_bclkdiv;               /* BCLK divider value in burst mode */
 
        enum dac33_state state;
 };
@@ -422,7 +425,7 @@ static int dac33_set_fifo_mode(struct snd_kcontrol *kcontrol,
 
 /* Codec operation modes */
 static const char *dac33_fifo_mode_texts[] = {
-       "Bypass", "Mode 1"
+       "Bypass", "Mode 1", "Mode 7"
 };
 
 static const struct soc_enum dac33_fifo_mode_enum =
@@ -556,6 +559,10 @@ static inline void dac33_prefill_handler(struct tlv320dac33_priv *dac33)
                dac33_write16(codec, DAC33_PREFILL_MSB,
                                DAC33_THRREG(dac33->alarm_threshold));
                break;
+       case DAC33_FIFO_MODE7:
+               dac33_write16(codec, DAC33_PREFILL_MSB,
+                               DAC33_THRREG(10));
+               break;
        default:
                dev_warn(codec->dev, "Unhandled FIFO mode: %d\n",
                                                        dac33->fifo_mode);
@@ -574,6 +581,9 @@ static inline void dac33_playback_handler(struct tlv320dac33_priv *dac33)
                dac33_write16(codec, DAC33_NSAMPLE_MSB,
                                DAC33_THRREG(dac33->nsample));
                break;
+       case DAC33_FIFO_MODE7:
+               /* At the moment we are not using interrupts in mode7 */
+               break;
        default:
                dev_warn(codec->dev, "Unhandled FIFO mode: %d\n",
                                                        dac33->fifo_mode);
@@ -691,7 +701,7 @@ static int dac33_hw_params(struct snd_pcm_substream *substream,
 }
 
 #define CALC_OSCSET(rate, refclk) ( \
-       ((((rate * 10000) / refclk) * 4096) + 5000) / 10000)
+       ((((rate * 10000) / refclk) * 4096) + 7000) / 10000)
 #define CALC_RATIOSET(rate, refclk) ( \
        ((((refclk  * 100000) / rate) * 16384) + 50000) / 100000)
 
@@ -725,7 +735,10 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream)
 
        aictrl_a = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_A);
        aictrl_a &= ~(DAC33_NCYCL_MASK | DAC33_WLEN_MASK);
+       /* Read FIFO control A, and clear FIFO flush bit */
        fifoctrl_a = dac33_read_reg_cache(codec, DAC33_FIFO_CTRL_A);
+       fifoctrl_a &= ~DAC33_FIFOFLUSH;
+
        fifoctrl_a &= ~DAC33_WIDTH;
        switch (substream->runtime->format) {
        case SNDRV_PCM_FORMAT_S16_LE:
@@ -766,7 +779,7 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream)
        if (dac33->fifo_mode) {
                /* Generic for all FIFO modes */
                /* 50-51 : ASRC Control registers */
-               dac33_write(codec, DAC33_ASRC_CTRL_A, (1 << 4)); /* div=2 */
+               dac33_write(codec, DAC33_ASRC_CTRL_A, DAC33_SRCLKDIV(1));
                dac33_write(codec, DAC33_ASRC_CTRL_B, 1); /* ??? */
 
                /* Write registers 0x34 and 0x35 (MSB, LSB) */
@@ -788,6 +801,10 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream)
                            DAC33_ATM(DAC33_FIFO_IRQ_MODE_LEVEL));
                dac33_write(codec, DAC33_FIFO_IRQ_MASK, DAC33_MAT);
                break;
+       case DAC33_FIFO_MODE7:
+               /* Disable all interrupts */
+               dac33_write(codec, DAC33_FIFO_IRQ_MASK, 0);
+               break;
        default:
                /* in FIFO bypass mode, the interrupts are not used */
                break;
@@ -807,6 +824,17 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream)
                fifoctrl_a &= ~DAC33_FAUTO;
                aictrl_b &= ~DAC33_BCLKON;
                break;
+       case DAC33_FIFO_MODE7:
+               /*
+                * For mode1:
+                * Disable the FIFO bypass (Enable the use of FIFO)
+                * Select Threshold mode
+                * BCLK is only running when data is needed by DAC33
+                */
+               fifoctrl_a &= ~DAC33_FBYPAS;
+               fifoctrl_a |= DAC33_FAUTO;
+               aictrl_b &= ~DAC33_BCLKON;
+               break;
        default:
                /*
                 * For FIFO bypass mode:
@@ -822,17 +850,37 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream)
        dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_A, aictrl_a);
        dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_B, aictrl_b);
 
+       /*
+        * BCLK divide ratio
+        * 0: 1.5
+        * 1: 1
+        * 2: 2
+        * ...
+        * 254: 254
+        * 255: 255
+        */
+       if (dac33->fifo_mode)
+               dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C,
+                                                       dac33->burst_bclkdiv);
+       else
+               dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 32);
+
        switch (dac33->fifo_mode) {
        case DAC33_FIFO_MODE1:
-               /* 20: BCLK divide ratio */
-               dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 3);
-
                dac33_write16(codec, DAC33_ATHR_MSB,
                              DAC33_THRREG(dac33->alarm_threshold));
                break;
+       case DAC33_FIFO_MODE7:
+               /*
+                * Configure the threshold levels, and leave 10 sample space
+                * at the bottom, and also at the top of the FIFO
+                */
+               dac33_write16(codec, DAC33_UTHR_MSB,
+                       DAC33_THRREG(DAC33_BUFFER_SIZE_SAMPLES - 10));
+               dac33_write16(codec, DAC33_LTHR_MSB,
+                       DAC33_THRREG(10));
+               break;
        default:
-               /* BYPASS mode */
-               dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 32);
                break;
        }
 
@@ -960,6 +1008,7 @@ static int dac33_set_dai_fmt(struct snd_soc_dai *codec_dai,
                             unsigned int fmt)
 {
        struct snd_soc_codec *codec = codec_dai->codec;
+       struct tlv320dac33_priv *dac33 = codec->private_data;
        u8 aictrl_a, aictrl_b;
 
        aictrl_a = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_A);
@@ -972,7 +1021,11 @@ static int dac33_set_dai_fmt(struct snd_soc_dai *codec_dai,
                break;
        case SND_SOC_DAIFMT_CBS_CFS:
                /* Codec Slave */
-               aictrl_a &= ~(DAC33_MSBCLK | DAC33_MSWCLK);
+               if (dac33->fifo_mode) {
+                       dev_err(codec->dev, "FIFO mode requires master mode\n");
+                       return -EINVAL;
+               } else
+                       aictrl_a &= ~(DAC33_MSBCLK | DAC33_MSWCLK);
                break;
        default:
                return -EINVAL;
@@ -986,11 +1039,7 @@ static int dac33_set_dai_fmt(struct snd_soc_dai *codec_dai,
        case SND_SOC_DAIFMT_DSP_A:
                aictrl_a |= DAC33_AFMT_DSP;
                aictrl_b &= ~DAC33_DATA_DELAY_MASK;
-               aictrl_b |= DAC33_DATA_DELAY(1); /* 1 bit delay */
-               break;
-       case SND_SOC_DAIFMT_DSP_B:
-               aictrl_a |= DAC33_AFMT_DSP;
-               aictrl_b &= ~DAC33_DATA_DELAY_MASK; /* No delay */
+               aictrl_b |= DAC33_DATA_DELAY(0);
                break;
        case SND_SOC_DAIFMT_RIGHT_J:
                aictrl_a |= DAC33_AFMT_RIGHT_J;
@@ -1014,7 +1063,7 @@ static void dac33_init_chip(struct snd_soc_codec *codec)
 {
        /* 44-46: DAC Control Registers */
        /* A : DAC sample rate Fsref/1.5 */
-       dac33_write(codec, DAC33_DAC_CTRL_A, DAC33_DACRATE(1));
+       dac33_write(codec, DAC33_DAC_CTRL_A, DAC33_DACRATE(0));
        /* B : DAC src=normal, not muted */
        dac33_write(codec, DAC33_DAC_CTRL_B, DAC33_DACSRCR_RIGHT |
                                             DAC33_DACSRCL_LEFT);
@@ -1153,8 +1202,8 @@ struct snd_soc_dai dac33_dai = {
 };
 EXPORT_SYMBOL_GPL(dac33_dai);
 
-static int dac33_i2c_probe(struct i2c_client *client,
-                          const struct i2c_device_id *id)
+static int __devinit dac33_i2c_probe(struct i2c_client *client,
+                                    const struct i2c_device_id *id)
 {
        struct tlv320dac33_platform_data *pdata;
        struct tlv320dac33_priv *dac33;
@@ -1200,6 +1249,7 @@ static int dac33_i2c_probe(struct i2c_client *client,
        i2c_set_clientdata(client, dac33);
 
        dac33->power_gpio = pdata->power_gpio;
+       dac33->burst_bclkdiv = pdata->burst_bclkdiv;
        dac33->irq = client->irq;
        dac33->nsample = NSAMPLE_MAX;
        /* Disable FIFO use by default */
@@ -1307,7 +1357,7 @@ error_reg:
        return ret;
 }
 
-static int dac33_i2c_remove(struct i2c_client *client)
+static int __devexit dac33_i2c_remove(struct i2c_client *client)
 {
        struct tlv320dac33_priv *dac33;