mempolicy: add bitmap_onto() and bitmap_fold() operations

[safe/jmp/linux-2.6] / include / linux / mtd / nand.h

diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 8b3ef41..c42bc7f 100644 (file)
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -166,6 +166,9 @@ typedef enum {
  * for all large page devices, as they do not support
  * autoincrement.*/
 #define NAND_NO_READRDY                0x00000100
+/* Chip does not allow subpage writes */
+#define NAND_NO_SUBPAGE_WRITE  0x00000200
+
 
 /* Options valid for Samsung large page devices */
 #define NAND_SAMSUNG_LP_OPTIONS \
@@ -193,6 +196,9 @@ typedef enum {
 /* Nand scan has allocated controller struct */
 #define NAND_CONTROLLER_ALLOC  0x80000000
 
+/* Cell info constants */
+#define NAND_CI_CHIPNR_MSK     0x03
+#define NAND_CI_CELLTYPE_MSK   0x0C
 
 /*
  * nand_state_t - chip states
@@ -286,9 +292,7 @@ struct nand_ecc_ctrl {
  * struct nand_buffers - buffer structure for read/write
  * @ecccalc:   buffer for calculated ecc
  * @ecccode:   buffer for ecc read from flash
- * @oobwbuf:   buffer for write oob data
  * @databuf:   buffer for data - dynamically sized
- * @oobrbuf:   buffer to read oob data
  *
  * Do not change the order of buffers. databuf and oobrbuf must be in
  * consecutive order.
@@ -296,9 +300,7 @@ struct nand_ecc_ctrl {
 struct nand_buffers {
        uint8_t ecccalc[NAND_MAX_OOBSIZE];
        uint8_t ecccode[NAND_MAX_OOBSIZE];
-       uint8_t oobwbuf[NAND_MAX_OOBSIZE];
-       uint8_t databuf[NAND_MAX_PAGESIZE];
-       uint8_t oobrbuf[NAND_MAX_OOBSIZE];
+       uint8_t databuf[NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE];
 };
 
 /**
@@ -341,10 +343,12 @@ struct nand_buffers {
  * @options:           [BOARDSPECIFIC] various chip options. They can partly be set to inform nand_scan about
  *                     special functionality. See the defines for further explanation
  * @badblockpos:       [INTERN] position of the bad block marker in the oob area
+ * @cellinfo:          [INTERN] MLC/multichip data from chip ident
  * @numchips:          [INTERN] number of physical chips
  * @chipsize:          [INTERN] the size of one chip for multichip arrays
  * @pagemask:          [INTERN] page number mask = number of (pages / chip) - 1
  * @pagebuf:           [INTERN] holds the pagenumber which is currently in data_buf
+ * @subpagesize:       [INTERN] holds the subpagesize
  * @ecclayout:         [REPLACEABLE] the default ecc placement scheme
  * @bbt:               [INTERN] bad block table pointer
  * @bbt_td:            [REPLACEABLE] bad block table descriptor for flash lookup
@@ -392,6 +396,8 @@ struct nand_chip {
        unsigned long   chipsize;
        int             pagemask;
        int             pagebuf;
+       int             subpagesize;
+       uint8_t         cellinfo;
        int             badblockpos;
 
        nand_state_t    state;
@@ -425,6 +431,8 @@ struct nand_chip {
 #define NAND_MFR_RENESAS       0x07
 #define NAND_MFR_STMICRO       0x20
 #define NAND_MFR_HYNIX         0xad
+#define NAND_MFR_MICRON                0x2c
+#define NAND_MFR_AMD           0x01
 
 /**
  * struct nand_flash_dev - NAND Flash Device ID Structure
@@ -553,6 +561,7 @@ extern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len,
  * @chip_delay:                R/B delay value in us
  * @options:           Option flags, e.g. 16bit buswidth
  * @ecclayout:         ecc layout info structure
+ * @part_probe_types:  NULL-terminated array of probe types
  * @priv:              hardware controller specific settings
  */
 struct platform_nand_chip {
@@ -563,6 +572,7 @@ struct platform_nand_chip {
        struct nand_ecclayout   *ecclayout;
        int                     chip_delay;
        unsigned int            options;
+       const char              **part_probe_types;
        void                    *priv;
 };
 
@@ -571,6 +581,8 @@ struct platform_nand_chip {
  * @hwcontrol:         platform specific hardware control structure
  * @dev_ready:         platform specific function to read ready/busy pin
  * @select_chip:       platform specific chip select function
+ * @cmd_ctrl:          platform specific function for controlling
+ *                     ALE/CLE/nCE. Also used to write command and address
  * @priv:              private data to transport driver specific settings
  *
  * All fields are optional and depend on the hardware driver requirements
@@ -579,9 +591,21 @@ struct platform_nand_ctrl {
        void            (*hwcontrol)(struct mtd_info *mtd, int cmd);
        int             (*dev_ready)(struct mtd_info *mtd);
        void            (*select_chip)(struct mtd_info *mtd, int chip);
+       void            (*cmd_ctrl)(struct mtd_info *mtd, int dat,
+                                   unsigned int ctrl);
        void            *priv;
 };
 
+/**
+ * struct platform_nand_data - container structure for platform-specific data
+ * @chip:              chip level chip structure
+ * @ctrl:              controller level device structure
+ */
+struct platform_nand_data {
+       struct platform_nand_chip       chip;
+       struct platform_nand_ctrl       ctrl;
+};
+
 /* Some helpers to access the data structures */
 static inline
 struct platform_nand_chip *get_platform_nandchip(struct mtd_info *mtd)