net: Avoid extra wakeups of threads blocked in wait_for_packet()

[safe/jmp/linux-2.6] / include / linux / mtd / nand.h

diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 83f6787..7efb9be 100644 (file)
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -43,8 +43,8 @@ extern void nand_wait_ready(struct mtd_info *mtd);
  * is supported now. If you add a chip with bigger oobsize/page
  * adjust this accordingly.
  */
-#define NAND_MAX_OOBSIZE       64
-#define NAND_MAX_PAGESIZE      2048
+#define NAND_MAX_OOBSIZE       128
+#define NAND_MAX_PAGESIZE      4096
 
 /*
  * Constants for hardware specific CLE/ALE/NCE function
@@ -177,7 +177,9 @@ typedef enum {
 #define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING))
 #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG))
 #define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK))
-#define NAND_SUBPAGE_READ(chip) ((chip->ecc.mode == NAND_ECC_SOFT))
+/* Large page NAND with SOFT_ECC should support subpage reads */
+#define NAND_SUBPAGE_READ(chip) ((chip->ecc.mode == NAND_ECC_SOFT) \
+                                       && (chip->page_shift > 9))
 
 /* Mask to zero out the chip options, which come from the id table */
 #define NAND_CHIPOPTIONS_MSK   (0x0000ffff & ~NAND_NO_AUTOINCR)
@@ -246,6 +248,7 @@ struct nand_hw_control {
  * @read_page_raw:     function to read a raw page without ECC
  * @write_page_raw:    function to write a raw page without ECC
  * @read_page: function to read a page according to the ecc generator requirements
+ * @read_subpage:      function to read parts of the page covered by ECC.
  * @write_page:        function to write a page according to the ecc generator requirements
  * @read_oob:  function to read chip OOB data
  * @write_oob: function to write chip OOB data
@@ -332,17 +335,12 @@ struct nand_buffers {
  * @erase_cmd:         [INTERN] erase command write function, selectable due to AND support
  * @scan_bbt:          [REPLACEABLE] function to scan bad block table
  * @chip_delay:                [BOARDSPECIFIC] chip dependent delay for transfering data from array to read regs (tR)
- * @wq:                        [INTERN] wait queue to sleep on if a NAND operation is in progress
  * @state:             [INTERN] the current state of the NAND device
  * @oob_poi:           poison value buffer
  * @page_shift:                [INTERN] number of address bits in a page (column address bits)
  * @phys_erase_shift:  [INTERN] number of address bits in a physical eraseblock
  * @bbt_erase_shift:   [INTERN] number of address bits in a bbt entry
  * @chip_shift:                [INTERN] number of address bits in one chip
- * @datbuf:            [INTERN] internal buffer for one page + oob
- * @oobbuf:            [INTERN] oob buffer for one eraseblock
- * @oobdirty:          [INTERN] indicates that oob_buf must be reinitialized
- * @data_poi:          [INTERN] pointer to a data buffer
  * @options:           [BOARDSPECIFIC] various chip options. They can partly be set to inform nand_scan about
  *                     special functionality. See the defines for further explanation
  * @badblockpos:       [INTERN] position of the bad block marker in the oob area
@@ -396,7 +394,7 @@ struct nand_chip {
        int             bbt_erase_shift;
        int             chip_shift;
        int             numchips;
-       unsigned long   chipsize;
+       uint64_t        chipsize;
        int             pagemask;
        int             pagebuf;
        int             subpagesize;