Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[safe/jmp/linux-2.6] / include / linux / fsl_devices.h
index a7a2b85..d9051d7 100644 (file)
  * option) any later version.
  */
 
-#ifdef __KERNEL__
 #ifndef _FSL_DEVICE_H_
 #define _FSL_DEVICE_H_
 
 #include <linux/types.h>
+#include <linux/phy.h>
 
 /*
  * Some conventions on how we handle peripherals on Freescale chips
 
 struct gianfar_platform_data {
        /* device specific information */
-       u32 device_flags;
-
-       /* board specific information */
-       u32 board_flags;
-       const char *bus_id;
-       u8 mac_addr[6];
+       u32     device_flags;
+       char    bus_id[BUS_ID_SIZE];
+       phy_interface_t interface;
 };
 
 struct gianfar_mdio_data {
        /* board specific information */
-       int irq[32];
+       int     irq[32];
 };
 
-/* Flags related to gianfar device features */
-#define FSL_GIANFAR_DEV_HAS_GIGABIT            0x00000001
-#define FSL_GIANFAR_DEV_HAS_COALESCE           0x00000002
-#define FSL_GIANFAR_DEV_HAS_RMON               0x00000004
-#define FSL_GIANFAR_DEV_HAS_MULTI_INTR         0x00000008
-#define FSL_GIANFAR_DEV_HAS_CSUM               0x00000010
-#define FSL_GIANFAR_DEV_HAS_VLAN               0x00000020
-#define FSL_GIANFAR_DEV_HAS_EXTENDED_HASH      0x00000040
-#define FSL_GIANFAR_DEV_HAS_PADDING            0x00000080
-
 /* Flags in gianfar_platform_data */
 #define FSL_GIANFAR_BRD_HAS_PHY_INTR   0x00000001 /* set or use a timer */
 #define FSL_GIANFAR_BRD_IS_REDUCED     0x00000002 /* Set if RGMII, RMII */
 
 struct fsl_i2c_platform_data {
        /* device specific information */
-       u32 device_flags;
+       u32     device_flags;
 };
 
 /* Flags related to I2C device features */
 #define FSL_I2C_DEV_SEPARATE_DFSRR     0x00000001
 #define FSL_I2C_DEV_CLOCK_5200         0x00000002
 
-#endif                         /* _FSL_DEVICE_H_ */
-#endif                         /* __KERNEL__ */
+enum fsl_usb2_operating_modes {
+       FSL_USB2_MPH_HOST,
+       FSL_USB2_DR_HOST,
+       FSL_USB2_DR_DEVICE,
+       FSL_USB2_DR_OTG,
+};
+
+enum fsl_usb2_phy_modes {
+       FSL_USB2_PHY_NONE,
+       FSL_USB2_PHY_ULPI,
+       FSL_USB2_PHY_UTMI,
+       FSL_USB2_PHY_UTMI_WIDE,
+       FSL_USB2_PHY_SERIAL,
+};
+
+struct fsl_usb2_platform_data {
+       /* board specific information */
+       enum fsl_usb2_operating_modes   operating_mode;
+       enum fsl_usb2_phy_modes         phy_mode;
+       unsigned int                    port_enables;
+};
+
+/* Flags in fsl_usb2_mph_platform_data */
+#define FSL_USB2_PORT0_ENABLED 0x00000001
+#define FSL_USB2_PORT1_ENABLED 0x00000002
+
+struct fsl_spi_platform_data {
+       u32     initial_spmode; /* initial SPMODE value */
+       u16     bus_num;
+       bool    qe_mode;
+       /* board specific information */
+       u16     max_chipselect;
+       void    (*activate_cs)(u8 cs, u8 polarity);
+       void    (*deactivate_cs)(u8 cs, u8 polarity);
+       u32     sysclk;
+};
+
+struct mpc8xx_pcmcia_ops {
+       void(*hw_ctrl)(int slot, int enable);
+       int(*voltage_set)(int slot, int vcc, int vpp);
+};
+
+/* Returns non-zero if the current suspend operation would
+ * lead to a deep sleep (i.e. power removed from the core,
+ * instead of just the clock).
+ */
+int fsl_deep_sleep(void);
+
+#endif /* _FSL_DEVICE_H_ */