Merge branches 'x86/prototypes', 'x86/x2apic' and 'x86/debug' into x86/core
[safe/jmp/linux-2.6] / include / asm-x86 / apic.h
index aa74670..1311c82 100644 (file)
@@ -1,8 +1,10 @@
-#ifndef _ASM_X86_APIC_H
-#define _ASM_X86_APIC_H
+#ifndef ASM_X86__APIC_H
+#define ASM_X86__APIC_H
 
 #include <linux/pm.h>
 #include <linux/delay.h>
+
+#include <asm/alternative.h>
 #include <asm/fixmap.h>
 #include <asm/apicdef.h>
 #include <asm/processor.h>
@@ -12,8 +14,6 @@
 
 #define ARCH_APICTIMER_STOPS_ON_C3     1
 
-#define Dprintk(x...)
-
 /*
  * Debugging macros
  */
@@ -37,7 +37,7 @@ extern void generic_apic_probe(void);
 
 #ifdef CONFIG_X86_LOCAL_APIC
 
-extern int apic_verbosity;
+extern unsigned int apic_verbosity;
 extern int local_apic_timer_c2_ok;
 
 extern int ioapic_force;
@@ -49,25 +49,24 @@ extern int disable_apic;
 #ifdef CONFIG_PARAVIRT
 #include <asm/paravirt.h>
 #else
-#ifndef CONFIG_X86_64
-#define apic_write native_apic_mem_write
-#define apic_write_atomic native_apic_mem_write_atomic
-#define apic_read native_apic_mem_read
-#endif
 #define setup_boot_clock setup_boot_APIC_clock
 #define setup_secondary_clock setup_secondary_APIC_clock
 #endif
 
 extern int is_vsmp_box(void);
+extern void xapic_wait_icr_idle(void);
+extern u32 safe_xapic_wait_icr_idle(void);
+extern u64 xapic_icr_read(void);
+extern void xapic_icr_write(u32, u32);
+extern int setup_profiling_timer(unsigned int);
 
 static inline void native_apic_mem_write(u32 reg, u32 v)
 {
-       *((volatile u32 *)(APIC_BASE + reg)) = v;
-}
+       volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg);
 
-static inline void native_apic_mem_write_atomic(u32 reg, u32 v)
-{
-       (void)xchg((u32 *)(APIC_BASE + reg), v);
+       alternative_io("movl %0, %1", "xchgl %0, %1", X86_FEATURE_11AP,
+                      ASM_OUTPUT2("=r" (v), "=m" (*addr)),
+                      ASM_OUTPUT2("0" (v), "m" (*addr)));
 }
 
 static inline u32 native_apic_mem_read(u32 reg)
@@ -95,16 +94,17 @@ static inline u32 native_apic_msr_read(u32 reg)
        return low;
 }
 
-#ifdef CONFIG_X86_32
-extern void apic_wait_icr_idle(void);
-extern u32 safe_apic_wait_icr_idle(void);
-extern void apic_icr_write(u32 low, u32 id);
-#else
+#ifndef CONFIG_X86_32
+extern int x2apic, x2apic_preenabled;
+extern void check_x2apic(void);
+extern void enable_x2apic(void);
+extern void enable_IR_x2apic(void);
+extern void x2apic_icr_write(u32 low, u32 id);
+#endif
 
 struct apic_ops {
        u32 (*read)(u32 reg);
        void (*write)(u32 reg, u32 v);
-       void (*write_atomic)(u32 reg, u32 v);
        u64 (*icr_read)(void);
        void (*icr_write)(u32 low, u32 high);
        void (*wait_icr_idle)(void);
@@ -115,25 +115,13 @@ extern struct apic_ops *apic_ops;
 
 #define apic_read (apic_ops->read)
 #define apic_write (apic_ops->write)
-#define apic_write_atomic (apic_ops->write_atomic)
 #define apic_icr_read (apic_ops->icr_read)
 #define apic_icr_write (apic_ops->icr_write)
 #define apic_wait_icr_idle (apic_ops->wait_icr_idle)
 #define safe_apic_wait_icr_idle (apic_ops->safe_wait_icr_idle)
-#endif
 
 extern int get_physical_broadcast(void);
 
-#ifdef CONFIG_X86_GOOD_APIC
-# define FORCE_READ_AROUND_WRITE 0
-# define apic_read_around(x)
-# define apic_write_around(x, y) apic_write((x), (y))
-#else
-# define FORCE_READ_AROUND_WRITE 1
-# define apic_read_around(x) apic_read(x)
-# define apic_write_around(x, y) apic_write_atomic((x), (y))
-#endif
-
 #ifdef CONFIG_X86_64
 static inline void ack_x2APIC_irq(void)
 {
@@ -153,11 +141,7 @@ static inline void ack_APIC_irq(void)
         */
 
        /* Docs say use 0 for future compatibility */
-#ifdef CONFIG_X86_32
-       apic_write_around(APIC_EOI, 0);
-#else
-       native_apic_mem_write(APIC_EOI, 0);
-#endif
+       apic_write(APIC_EOI, 0);
 }
 
 extern int lapic_get_maxlvt(void);
@@ -202,4 +186,4 @@ static inline void init_apic_mappings(void) { }
 
 #endif /* !CONFIG_X86_LOCAL_APIC */
 
-#endif /* __ASM_APIC_H */
+#endif /* ASM_X86__APIC_H */