Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6
[safe/jmp/linux-2.6] / include / asm-powerpc / spu.h
index 6b2aea0..c02d105 100644 (file)
 #define _SPU_H
 #ifdef __KERNEL__
 
-#include <linux/config.h>
-#include <linux/kref.h>
 #include <linux/workqueue.h>
+#include <linux/sysdev.h>
 
-#define LS_ORDER (6)           /* 256 kb */
-
-#define LS_SIZE (PAGE_SIZE << LS_ORDER)
+#define LS_SIZE (256 * 1024)
 #define LS_ADDR_MASK (LS_SIZE - 1)
 
 #define MFC_PUT_CMD             0x20
@@ -112,18 +109,20 @@ struct spu {
        char *name;
        unsigned long local_store_phys;
        u8 *local_store;
+       unsigned long problem_phys;
        struct spu_problem __iomem *problem;
        struct spu_priv1 __iomem *priv1;
        struct spu_priv2 __iomem *priv2;
        struct list_head list;
        struct list_head sched_list;
        int number;
+       int nid;
+       unsigned int irqs[3];
        u32 isrc;
        u32 node;
        u64 flags;
        u64 dar;
        u64 dsisr;
-       struct kref kref;
        size_t ls_size;
        unsigned int slb_replace;
        struct mm_struct *mm;
@@ -135,21 +134,32 @@ struct spu {
        int class_0_pending;
        spinlock_t register_lock;
 
-       u32 stop_code;
        void (* wbox_callback)(struct spu *spu);
        void (* ibox_callback)(struct spu *spu);
        void (* stop_callback)(struct spu *spu);
+       void (* mfc_callback)(struct spu *spu);
 
        char irq_c0[8];
        char irq_c1[8];
        char irq_c2[8];
+
+       struct sys_device sysdev;
 };
 
 struct spu *spu_alloc(void);
 void spu_free(struct spu *spu);
 int spu_irq_class_0_bottom(struct spu *spu);
 int spu_irq_class_1_bottom(struct spu *spu);
+void spu_irq_setaffinity(struct spu *spu, int cpu);
 
+/* system callbacks from the SPU */
+struct spu_syscall_block {
+       u64 nr_ret;
+       u64 parm[6];
+};
+extern long spu_sys_callback(struct spu_syscall_block *s);
+
+/* syscalls implemented in spufs */
 extern struct spufs_calls {
        asmlinkage long (*create_thread)(const char __user *name,
                                        unsigned int flags, mode_t mode);
@@ -377,27 +387,22 @@ struct spu_priv1 {
 #define SPU_GET_REVISION_BITS(vr)      (vr & SPU_REVISION_BITS)
        u8  pad_0x28_0x100[0x100 - 0x28];                       /* 0x28 */
 
-
        /* Interrupt Area */
-       u64 int_mask_class0_RW;                                 /* 0x100 */
+       u64 int_mask_RW[3];                                     /* 0x100 */
 #define CLASS0_ENABLE_DMA_ALIGNMENT_INTR               0x1L
 #define CLASS0_ENABLE_INVALID_DMA_COMMAND_INTR         0x2L
 #define CLASS0_ENABLE_SPU_ERROR_INTR                   0x4L
 #define CLASS0_ENABLE_MFC_FIR_INTR                     0x8L
-       u64 int_mask_class1_RW;                                 /* 0x108 */
 #define CLASS1_ENABLE_SEGMENT_FAULT_INTR               0x1L
 #define CLASS1_ENABLE_STORAGE_FAULT_INTR               0x2L
 #define CLASS1_ENABLE_LS_COMPARE_SUSPEND_ON_GET_INTR   0x4L
 #define CLASS1_ENABLE_LS_COMPARE_SUSPEND_ON_PUT_INTR   0x8L
-       u64 int_mask_class2_RW;                                 /* 0x110 */
 #define CLASS2_ENABLE_MAILBOX_INTR                     0x1L
 #define CLASS2_ENABLE_SPU_STOP_INTR                    0x2L
 #define CLASS2_ENABLE_SPU_HALT_INTR                    0x4L
 #define CLASS2_ENABLE_SPU_DMA_TAG_GROUP_COMPLETE_INTR  0x8L
        u8  pad_0x118_0x140[0x28];                              /* 0x118 */
-       u64 int_stat_class0_RW;                                 /* 0x140 */
-       u64 int_stat_class1_RW;                                 /* 0x148 */
-       u64 int_stat_class2_RW;                                 /* 0x150 */
+       u64 int_stat_RW[3];                                     /* 0x140 */
        u8  pad_0x158_0x180[0x28];                              /* 0x158 */
        u64 int_route_RW;                                       /* 0x180 */