rename signalfd_siginfo fields

[safe/jmp/linux-2.6] / include / asm-powerpc / reg.h

diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h
index 0d7f016..e775ff1 100644 (file)
--- a/include/asm-powerpc/reg.h
+++ b/include/asm-powerpc/reg.h
@@ -102,12 +102,8 @@
 #else /* 32-bit */
 /* Default MSR for kernel mode. */
 #ifndef MSR_KERNEL     /* reg_booke.h also defines this */
-#ifdef CONFIG_APUS_FAST_EXCEPT
-#define MSR_KERNEL     (MSR_ME|MSR_IP|MSR_RI|MSR_IR|MSR_DR)
-#else
 #define MSR_KERNEL     (MSR_ME|MSR_RI|MSR_IR|MSR_DR)
 #endif
-#endif
 
 #define MSR_USER       (MSR_KERNEL|MSR_PR|MSR_EE)
 #endif
@@ -453,6 +449,8 @@
 #define SPRN_MMCRA     0x312
 #define   MMCRA_SIHV   0x10000000UL /* state of MSR HV when SIAR set */
 #define   MMCRA_SIPR   0x08000000UL /* state of MSR PR when SIAR set */
+#define   MMCRA_SLOT   0x07000000UL /* SLOT bits (37-39) */
+#define   MMCRA_SLOT_SHIFT     24
 #define   MMCRA_SAMPLE_ENABLE 0x00000001UL /* enable sampling */
 #define   POWER6_MMCRA_SIHV   0x0000040000000000ULL
 #define   POWER6_MMCRA_SIPR   0x0000020000000000ULL
@@ -469,12 +467,94 @@
 #define SPRN_SIAR      780
 #define SPRN_SDAR      781
 
-#define PA6T_SPRN_PMC0 787
-#define PA6T_SPRN_PMC1 788
-#define PA6T_SPRN_PMC2 789
-#define PA6T_SPRN_PMC3 790
-#define PA6T_SPRN_PMC4 791
-#define PA6T_SPRN_PMC5 792
+#define SPRN_PA6T_MMCR0 795
+#define   PA6T_MMCR0_EN0       0x0000000000000001UL
+#define   PA6T_MMCR0_EN1       0x0000000000000002UL
+#define   PA6T_MMCR0_EN2       0x0000000000000004UL
+#define   PA6T_MMCR0_EN3       0x0000000000000008UL
+#define   PA6T_MMCR0_EN4       0x0000000000000010UL
+#define   PA6T_MMCR0_EN5       0x0000000000000020UL
+#define   PA6T_MMCR0_SUPEN     0x0000000000000040UL
+#define   PA6T_MMCR0_PREN      0x0000000000000080UL
+#define   PA6T_MMCR0_HYPEN     0x0000000000000100UL
+#define   PA6T_MMCR0_FCM0      0x0000000000000200UL
+#define   PA6T_MMCR0_FCM1      0x0000000000000400UL
+#define   PA6T_MMCR0_INTGEN    0x0000000000000800UL
+#define   PA6T_MMCR0_INTEN0    0x0000000000001000UL
+#define   PA6T_MMCR0_INTEN1    0x0000000000002000UL
+#define   PA6T_MMCR0_INTEN2    0x0000000000004000UL
+#define   PA6T_MMCR0_INTEN3    0x0000000000008000UL
+#define   PA6T_MMCR0_INTEN4    0x0000000000010000UL
+#define   PA6T_MMCR0_INTEN5    0x0000000000020000UL
+#define   PA6T_MMCR0_DISCNT    0x0000000000040000UL
+#define   PA6T_MMCR0_UOP       0x0000000000080000UL
+#define   PA6T_MMCR0_TRG       0x0000000000100000UL
+#define   PA6T_MMCR0_TRGEN     0x0000000000200000UL
+#define   PA6T_MMCR0_TRGREG    0x0000000001600000UL
+#define   PA6T_MMCR0_SIARLOG   0x0000000002000000UL
+#define   PA6T_MMCR0_SDARLOG   0x0000000004000000UL
+#define   PA6T_MMCR0_PROEN     0x0000000008000000UL
+#define   PA6T_MMCR0_PROLOG    0x0000000010000000UL
+#define   PA6T_MMCR0_DAMEN2    0x0000000020000000UL
+#define   PA6T_MMCR0_DAMEN3    0x0000000040000000UL
+#define   PA6T_MMCR0_DAMEN4    0x0000000080000000UL
+#define   PA6T_MMCR0_DAMEN5    0x0000000100000000UL
+#define   PA6T_MMCR0_DAMSEL2   0x0000000200000000UL
+#define   PA6T_MMCR0_DAMSEL3   0x0000000400000000UL
+#define   PA6T_MMCR0_DAMSEL4   0x0000000800000000UL
+#define   PA6T_MMCR0_DAMSEL5   0x0000001000000000UL
+#define   PA6T_MMCR0_HANDDIS   0x0000002000000000UL
+#define   PA6T_MMCR0_PCTEN     0x0000004000000000UL
+#define   PA6T_MMCR0_SOCEN     0x0000008000000000UL
+#define   PA6T_MMCR0_SOCMOD    0x0000010000000000UL
+
+#define SPRN_PA6T_MMCR1 798
+#define   PA6T_MMCR1_ES2       0x00000000000000ffUL
+#define   PA6T_MMCR1_ES3       0x000000000000ff00UL
+#define   PA6T_MMCR1_ES4       0x0000000000ff0000UL
+#define   PA6T_MMCR1_ES5       0x00000000ff000000UL
+
+#define SPRN_PA6T_UPMC0 771    /* User PerfMon Counter 0 */
+#define SPRN_PA6T_UPMC1 772    /* ... */
+#define SPRN_PA6T_UPMC2 773
+#define SPRN_PA6T_UPMC3 774
+#define SPRN_PA6T_UPMC4 775
+#define SPRN_PA6T_UPMC5 776
+#define SPRN_PA6T_UMMCR0 779   /* User Monitor Mode Control Register 0 */
+#define SPRN_PA6T_SIAR 780     /* Sampled Instruction Address */
+#define SPRN_PA6T_UMMCR1 782   /* User Monitor Mode Control Register 1 */
+#define SPRN_PA6T_SIER 785     /* Sampled Instruction Event Register */
+#define SPRN_PA6T_PMC0 787
+#define SPRN_PA6T_PMC1 788
+#define SPRN_PA6T_PMC2 789
+#define SPRN_PA6T_PMC3 790
+#define SPRN_PA6T_PMC4 791
+#define SPRN_PA6T_PMC5 792
+#define SPRN_PA6T_TSR0 793     /* Timestamp Register 0 */
+#define SPRN_PA6T_TSR1 794     /* Timestamp Register 1 */
+#define SPRN_PA6T_TSR2 799     /* Timestamp Register 2 */
+#define SPRN_PA6T_TSR3 784     /* Timestamp Register 3 */
+
+#define SPRN_PA6T_IER  981     /* Icache Error Register */
+#define SPRN_PA6T_DER  982     /* Dcache Error Register */
+#define SPRN_PA6T_BER  862     /* BIU Error Address Register */
+#define SPRN_PA6T_MER  849     /* MMU Error Register */
+
+#define SPRN_PA6T_IMA0 880     /* Instruction Match Array 0 */
+#define SPRN_PA6T_IMA1 881     /* ... */
+#define SPRN_PA6T_IMA2 882
+#define SPRN_PA6T_IMA3 883
+#define SPRN_PA6T_IMA4 884
+#define SPRN_PA6T_IMA5 885
+#define SPRN_PA6T_IMA6 886
+#define SPRN_PA6T_IMA7 887
+#define SPRN_PA6T_IMA8 888
+#define SPRN_PA6T_IMA9 889
+#define SPRN_PA6T_BTCR 978     /* Breakpoint and Tagging Control Register */
+#define SPRN_PA6T_IMAAT        979     /* Instruction Match Array Action Table */
+#define SPRN_PA6T_PCCR 1019    /* Power Counter Control Register */
+#define SPRN_PA6T_RPCCR        1021    /* Retire PC Trace Control Register */
+
 
 #else /* 32-bit */
 #define SPRN_MMCR0     952     /* Monitor Mode Control Register 0 */