#ifndef __ASM_ARM_ATOMIC_H
#define __ASM_ARM_ATOMIC_H
-#include <linux/config.h>
+#include <linux/compiler.h>
+#include <asm/system.h>
typedef struct { volatile int counter; } atomic_t;
static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
{
- u32 oldval, res;
+ unsigned long oldval, res;
do {
__asm__ __volatile__("@ atomic_cmpxchg\n"
unsigned long tmp, tmp2;
__asm__ __volatile__("@ atomic_clear_mask\n"
-"1: ldrex %0, %2\n"
+"1: ldrex %0, [%2]\n"
" bic %0, %0, %3\n"
-" strex %1, %0, %2\n"
+" strex %1, %0, [%2]\n"
" teq %1, #0\n"
" bne 1b"
: "=&r" (tmp), "=&r" (tmp2)
unsigned long flags;
int val;
- local_irq_save(flags);
+ raw_local_irq_save(flags);
val = v->counter;
v->counter = val += i;
- local_irq_restore(flags);
+ raw_local_irq_restore(flags);
return val;
}
unsigned long flags;
int val;
- local_irq_save(flags);
+ raw_local_irq_save(flags);
val = v->counter;
v->counter = val -= i;
- local_irq_restore(flags);
+ raw_local_irq_restore(flags);
return val;
}
int ret;
unsigned long flags;
- local_irq_save(flags);
+ raw_local_irq_save(flags);
ret = v->counter;
if (likely(ret == old))
v->counter = new;
- local_irq_restore(flags);
+ raw_local_irq_restore(flags);
return ret;
}
{
unsigned long flags;
- local_irq_save(flags);
+ raw_local_irq_save(flags);
*addr &= ~mask;
- local_irq_restore(flags);
+ raw_local_irq_restore(flags);
}
#endif /* __LINUX_ARM_ARCH__ */
+#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
+
static inline int atomic_add_unless(atomic_t *v, int a, int u)
{
int c, old;
#define smp_mb__before_atomic_inc() barrier()
#define smp_mb__after_atomic_inc() barrier()
+#include <asm-generic/atomic.h>
#endif
#endif